Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the amendments filed on 07/13/2026. Currently, claims 12-31 are pending.
DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 12-31 are rejected under 35 U.S.C. 103 as being unpatentable over Allegato et al. (Pub. No. US 2015/0115378 A1, herein Allegato) in view of Cheng et al. (Pub. No. US 2015/0329351 A1, herein Cheng).
Regarding claim 12, Allegato discloses a device, comprising: a first die 34 of semiconductor integrating electronic components (Allegato: Fig. 2 and paragraph [0018]); a second die 36/38 of semiconductor bonded to the first die and forming patterned structures (Allegato: Fig. 2 and paragraph [0023]), the first die having a main surface; internal electrical coupling structures 44/50 electrically coupling the main surface of the first die to the second die (Allegato: Fig. 2 and paragraphs [0020]-[0023]); and external connection regions 46/46 on the main surface of the first die; and a package 94/96 on the main surface of the first die (Allegato: Fig. 2 and paragraphs [0021], [0035]).
Allegato does not specifically show a package on the main surface of the first die, the external connection regions having a portion that protrudes from the package.
However, in the same field of endeavor, Cheng teaches a MEMS device 301 bonded to a CMOS device 501 (Cheng: paragraphs [0024]-[0025]), comprising: a package 1401 on the main surface of the first die 501, the external connection regions 1503-1505 having a portion that protrudes from the package (Cheng: Fig. 15 and paragraph [0037]) enabling reliable electrical and mechanical interconnection with the external components for MEMS devices (Cheng: paragraph [0002]).
Therefore, given the teachings of Cheng, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Allegato in view of Cheng by employing the protruding conductive bumps.
Regarding claim 13, Allegato in view of Cheng teaches the device according to claim 12, wherein the package entirely covers the main surface of the first die (Allegato: Fig. 2 and paragraphs [0009], [0035]).
Regarding claim 14, Allegato in view of Cheng teaches the device according to claim 12, further comprising a bonding layer 54 superimposed on the main surface of the first die (Allegato: Fig. 2 and paragraph [0023]).
Regarding claim 15, Allegato inherently discloses the device according to claim 14, wherein the bonding layer has through openings and the external connection regions traverse the through openings (Allegato: Fig. 2 and paragraphs [0021], [0069]; “It is possible to apply the present manufacturing method also to packages of a different type, such as for example packages of a ball grid array (BGA), quad-flat no-leads (QFN), or chip-scale (CSP) type.” A BGA with this structure uses a bonding layer that has vertical openings or vias, while conductive external connection regions are routed laterally across that layer, sometimes intersecting or connecting through those openings to efficiently link the chip to the solder ball array.).
Regarding claim 16, Allegato discloses a MEMS device, comprising: a first die 34 that includes: a main surface; a body 40 and a passivation layer 42 on the body (Allegato: Fig. 2 and paragraphs [0018]-[0020]); a second die 38 having a first semiconductor layer 62 and an anchoring region 70 on the first semiconductor layer, the second die bonded to the first die by a bonding region and forming patterned structures (Allegato: Fig. 2 and paragraphs [0018]-[0019], [0026]-[0029]); a first contact pad 46 and a second contact pad 48 on the passivation layer (Allegato: Fig. 2 and paragraphs [0021]-[0022]); a fixed portion on the first semiconductor layer opposite to the anchoring region (the layer underneath pad 76); and a third contact pad 76 on the fixed portion (Allegato: Fig. 2 and paragraph [0031]).
Allegato does not specifically show the passivation layer having a first surface opposite the body along a first direction; and a first contact pad and a second contact pad disposed on the first surface of the passivation layer and extending out from the first surface along the first direction.
However, in the same field of endeavor, Cheng teaches a MEMS device 301 bonded to a CMOS device 501 (Cheng: paragraphs [0024]-[0025]), comprising: a body 131-135 (Cheng: Fig. 15 and paragraph [0013]) and a passivation layer 1401 on the body, the passivation layer having a first surface opposite the body along a first direction; and a first contact pad 1503 and a second contact pad 1503 disposed on the first surface of the passivation layer and extending out from the first surface along the first direction (Cheng: Fig. 15 and paragraph [0037]) enabling reliable electrical and mechanical interconnection with the external components for MEMS devices (Cheng: paragraph [0002]).
Therefore, given the teachings of Cheng, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Allegato in view of Cheng by employing the protruding conductive bumps.
Regarding claims 17-18, Allegato in view of Cheng teaches the MEMS device of claim 16, further comprising a first recess 72, a second recess, and a third recess, further comprising a through opening that incorporates a part of the third recess (Allegato: Fig. 2 and paragraphs [0030], [0045]). This limitation appears to be a product-by-process limitation that does not structurally distinguish the claimed invention over the prior art. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is taught by the reference even though the prior product was made by a different process. In re Thorpe, 227 USPQ 964, 966.
Regarding claim 19, Allegato in view of Cheng teaches the device according to claim 16, wherein the passivation layer includes embedded metallizations 44 (Allegato: Fig. 2 and paragraphs [0010], [0020], [0022]).
Regarding claim 20, Allegato in view of Cheng teaches the device according to claim 16 further comprising external connection regions 80 on the first contact pads, the external connection regions protruding partially from the device (Allegato: Fig. 2 and paragraph [0031]).
Regarding claim 21, Allegato discloses a device, comprising: a first die 34 including: a semiconductor body 40; and a passivation layer 42 on the body (Allegato: Fig. 2 and paragraphs [0018]-[0020]); a second die 38 including: a first semiconductor layer 62; and a first anchoring region 70 on the first semiconductor layer; a first bonding region coupled between the semiconductor body and the first anchoring region (Allegato: Fig. 2 and paragraphs [0018]-[0019], [0026]-[0029]); a first contact pad 46 on the passivation layer; a fixed portion on the first semiconductor layer; and a second contact pad 76 on the fixed portion (Allegato: Fig. 2 and paragraphs [0021]-[0022], [0031]; The layer underneath pad 76 is the fixed portion.).
Allegato does not specifically show the passivation layer having a first surface opposite the body along a first direction; and a first contact pad disposed on the first surface of the passivation layer, the first contact pad extending out from the first surface along the first direction.
However, in the same field of endeavor, Cheng teaches a MEMS device 301 bonded to a CMOS device 501 (Cheng: paragraphs [0024]-[0025]), comprising: a body 131-135 (Cheng: Fig. 15 and paragraph [0013]) and a passivation layer 1401 on the body, the passivation layer having a first surface opposite the body along a first direction; and a first contact pad 1503 disposed on the first surface of the passivation layer and extending out from the first surface along the first direction (Cheng: Fig. 15 and paragraph [0037]) enabling reliable electrical and mechanical interconnection with the external components for MEMS devices (Cheng: paragraph [0002]).
Therefore, given the teachings of Cheng, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Allegato in view of Cheng by employing the protruding conductive bumps.
Regarding claim 22, Allegato in view of Cheng teaches the device according to claim 21, wherein the semiconductor body includes a plurality of electronic components (Allegato: Fig. 2 and paragraphs [0022], [0031]).
Regarding claim 23, Allegato in view of Cheng teaches the device according to claim 21, wherein the passivation layer includes a plurality of metallizations 44 forming a redistribution layer (Allegato: Fig. 2 and paragraphs [0020], [0022]).
Regarding claim 24, Allegato in view of Cheng teachesthe device according to claim 21, wherein the second die further includes: a second anchoring region on the first semiconductor layer; and a plurality of suspended structures between the first and second anchoring region (Allegato: Fig. 2 and paragraphs [0026]-[0029]).
Regarding claim 25, Allegato in view of Cheng teaches the device according to claim 21, wherein the first and second contact pads are coupled together with a bonding wire (Allegato: Fig. 2 and paragraphs [0021]-[0022]).
Regarding claim 26, Allegato in view of Cheng teaches the device according to claim 21, further comprising a third contact pad 48 on the passivation layer (Allegato: Fig. 2 and paragraphs [0021]-[0022]).
Regarding claim 27, Allegato in view of Cheng teaches the device according to claim 26, further comprising a metal bump on the third contact pad (Allegato: Fig. 2 and paragraph [0069]).
Regarding claim 28, Allegato in view of Cheng teaches the device according to claim 21, wherein the first anchoring region includes: a dielectric region on the first semiconductor layer; a second semiconductor layer on the dielectric region; and a second bonding region on the second semiconductor layer (Allegato: Fig. 2 and paragraphs [0027]-[0029]).
Regarding claim 29, Allegato in view of Cheng teaches the device according to claim 21, wherein the fixed portion includes: a dielectric region on the first semiconductor layer; a second semiconductor layer on the dielectric region; and the second contact pad 76 on the second semiconductor layer (Allegato: Fig. 2 and paragraphs [0027]-[0029], [0031]).
Regarding claim 30, Allegato in view of Cheng teaches the device according to claim 24, wherein the first die includes a first cavity 72 in a face of the semiconductor body opposite the passivation layer (Allegato: Fig. 2 and paragraphs [0019]-[0020]).
Regarding claim 31, Allegato in view of Cheng teaches the device according to claim 30, wherein the plurality of suspended structures of the second die is aligned with the first cavity in the first die (Allegato: Fig. 2 and paragraphs [0019]-[0020], [0026]).
Response to Arguments
Applicant’s arguments with respect to claims 12-31 have been fully considered, but are found to be moot in view of the new grounds of rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALIHEH MALEK whose telephone number is (571)270-1874. The examiner can normally be reached M/T/W/R/F, 8:30-5.
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August 12, 2026
/MALIHEH MALEK/Primary Examiner, Art Unit 2813
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