DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of invention group II, species 2b in the reply filed on 02/06/2026 is acknowledged.
Response to Amendment
Applicant’s amendment dated 02/06/2026, in which claims 1-6 were cancelled, claims 21-26 were added, has been entered.
Claim Objections
Claims 12, 14, 15 are objected to because of the following informalities: claim 12 recites “a plurality of die” and “the plurality of die” which appears to be mistyping of -- a plurality of dies-- and --the plurality of dies--. Claims 14 and 15 each recites “the plurality of die” which appears to be mistyping of --the plurality of dies--.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 21-26 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 21 recites the limitation "coupling the semiconductor die to the adhesive layer includes aligning a contact pad of the semiconductor die with the opening to overlap the opening with the contact". There is insufficient antecedent basis for the limitation “the contact” in the claim.
For the purpose of this Action, the above limitation will be interpreted and examined as -- coupling the semiconductor die to the adhesive layer includes aligning a contact pad of the semiconductor die with the opening to overlap the opening with the contact pad--.
Claims depending from the rejected claims noted above are rejected at least on the same basis as the claim(s) from which the dependent claims depend.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 7, 11-12, 14, 17-19, 21 and 24 are rejected under 35 U.S.C. 102 (a)(1)/(a)(2) as being anticipated by Tuominen (US Pub. 20160174387).
Tuominen discloses in paragraph [0069], “According to certain embodiments, a separate adhesive is not needed and the component can be directly attached to the conductor material.” Thus, in this rejection, adhesive 7 disclosed in Fig. 6-Fig. 9 of Tuominen is not needed and will be omitted.
Regarding claim 7, Tuominen discloses in Fig. 6-Fig. 9 a method, comprising:
forming an insulating layer [4] on a temporary adhesion layer [3] on a carrier [2][Fig. 6];
forming an adhesive layer [6] on the insulating layer [4][Fig. 3b];
forming an opening [5] extending through the insulating layer [4] and the adhesive layer [6];
coupling a semiconductor die [8] to the adhesive layer [6] including overlapping and aligning a contact pad [10] of the semiconductor die [8] with the opening [5];
forming an encapsulant [11] on the adhesive layer [6], on a surface of the semiconductor die [8], and on a first sidewall of the semiconductor die [8] transverse to the surface of the semiconductor die [8][Fig. 6];
removing the insulating layer [4], the adhesive layer [6], the semiconductor die [8], and the encapsulant [11] from the temporary adhesion layer [3] on the carrier [2] and from the carrier [2] exposing the opening [5/13][Fig. 8]; and
forming a conductive structure [14] in the opening [5/13] and on a surface of the contact pad [10][Fig. 9].
Regarding claim 11, Tuominen discloses in Fig. 3
wherein forming the opening [5] includes forming the opening [5] extending to the temporary adhesion layer [3].
Regarding claims 12, 14, 17, 18, 19, Tuominen discloses in Fig. 6-Fig. 9 a method, comprising:
forming a panel wafer including:
forming an insulating layer [4] on a temporary adhesion layer [3] on a carrier [2][Fig. 6];
forming an adhesive layer [6] on the insulating layer [4][Fig. 3b];
forming a plurality of openings [5] extending through the insulating layer [4] and the adhesive layer [6];
coupling a plurality of dies [8] to the adhesive layer [6], each dies of the plurality of die [8] overlapping at least one opening of the plurality of openings [5]; and
forming an encapsulant [11] on the adhesive layer [6] and on the plurality of dies [8][Fig. 6];
wherein coupling the plurality of dies [8] to the adhesive layer [6] includes aligning a contact pad [10] of each die of the plurality of dies [8] with at least one opening of the plurality of openings [5];
forming a plurality of conductive structures [15] in the plurality of openings [Fig. 10];
removing the panel wafer from the temporary adhesion layer [3] of the carrier [2][Fig. 8].
after removing the panel wafer from the temporary adhesion layer [3], forming a plurality of conductive structures [15] in the plurality of openings, each conductive structure of the plurality of conductive structures [15] being in a corresponding opening of the plurality of openings [Fig. 10].
Regarding claims 21 and 24, Tuominen discloses in Fig. 6-Fig. 9 a method, comprising:
forming an insulating layer [4] on a temporary adhesion layer [3] on a carrier [2][Fig. 6];
forming an adhesive layer [6] on the insulating layer [4][Fig. 3b];
forming an opening [5] extending through the insulating layer [4] and the adhesive layer [6] to the temporary adhesion layer [3];
coupling a semiconductor die [8] to the adhesive layer [6], coupling the semiconductor die [8] to the adhesive layer [6] includes aligning a contact pad [10] of the semiconductor die [8] with the opening [5] to overlap the opening [5] with the contact pad [10], and wherein the opening [5] extends from the contact pad [10] to the temporary adhesion layer [3];
forming an encapsulant [11] on the adhesive layer [6] and on the semiconductor die [8] to enclose the semiconductor die [8] between the adhesive layer [6] and the encapsulant [11][Fig. 6];
removing the insulating layer [4], the adhesive layer [6], the semiconductor die [8], and the encapsulant [11] from the temporary adhesion layer [3] on the carrier [2] and from the carrier [2] exposing the opening [5/13][Fig. 8]; and
forming a conductive structure [14] in the opening [5/13] and on a surface of the contact pad [10][Fig. 9];
wherein forming encapsulant [11] on the semiconductor die [8] further includes forming the encapsulant [11] to cover a plurality of sidewalls of the semiconductor die [8] and cover a surface of the semiconductor die [8] facing away from the insulating layer [4] and the adhesive layer [6].
Claims 7, 10-12, 14-15, 17-19, 21, 24 and 25 are rejected under 35 U.S.C. 102 (a)(1)/(a)(2) as being anticipated by Yu et al. (US Pub. 20190139925).
Regarding claim 7, Yu et al. discloses in Fig. 2C-2G a method, comprising:
forming an insulating layer [116A] on a temporary adhesion layer [114] on a carrier [112][Fig. 2C];
forming an adhesive layer [123A] on the insulating layer [116A][Fig. 2C];
forming an opening [116a and 125A] extending through the insulating layer [116A] and the adhesive layer [123][Fig. 2C];
coupling a semiconductor die [120A] to the adhesive layer [123A] including overlapping and aligning a contact pad [121A] of the semiconductor die [120A] with the opening [116a and 125A];
forming an encapsulant [150] on the adhesive layer [123A], on a surface of the semiconductor die [120A], and on a first sidewall of the semiconductor die [120A] transverse to the surface of the semiconductor die [120A][Fig. 2D];
removing the insulating layer [116A], the adhesive layer [123A], the semiconductor die [120A], and the encapsulant [150] from the temporary adhesion layer [114] on the carrier [112] and from the carrier [112] exposing the opening [116a and 125A][Fig. 2F]; and
forming a conductive structure [M0] in the opening [116a and 125A] and on a surface of the contact pad [121A][Fig. 2G].
Regarding claim 10, Yu et al. discloses in Fig. 2E
removing a portion of the encapsulant [150] to expose the surface of the semiconductor die [120A].
Regarding claim 11, Yu et al. discloses in Fig. 2C
wherein forming the opening [116a and 125A] includes forming the opening [116a and 125A] extending to the temporary adhesion layer [114].
Regarding claim 12, Yu et al. discloses in Fig. 2C-2G a method, comprising:
forming a panel wafer including:
forming an insulating layer [116A] on a temporary adhesion layer [114] on a carrier [112][Fig. 2C];
forming an adhesive layer [123A] on the insulating layer [116A][Fig. 2C];
forming a plurality of openings [116a and 125] extending through the insulating layer [116A] and the adhesive layer [123][Fig. 2C];
coupling a plurality of dies [120] to the adhesive layer [123A], each die of the plurality of dies [120] overlapping at least one opening of the plurality of openings [116a and 125];
forming an encapsulant [150] on the adhesive layer [123A], and on the plurality of dies [120][Fig. 2D].
Regarding claim 14, Yu et al. discloses in Fig. 2C
wherein coupling the plurality of die [120] to the adhesive layer [123A] includes aligning a contact pad [121] of each die of the plurality of die [120] with at least one opening [116a and 125] of the plurality of openings [116a and 125].
Regarding claim 15, Yu et al. discloses in Fig. 2E
removing a portion of the encapsulant [150] exposing respective surfaces of the plurality of die [120] facing away from the adhesive layer [123A] and the insulating layer [116].
Regarding claim 17, Yu et al. discloses Fig. 2G
forming a plurality of conductive structures [M0] in the plurality of openings [116a and 125].
Regarding claim 18, Yu et al. discloses in Fig. 2F
removing the panel wafer from the temporary adhesion layer [114] of the carrier [112].
Regarding claim 19, Yu et al. discloses in Fig. 2G
after removing the panel wafer from the temporary adhesion layer [114], forming a plurality of conductive structures [M0] in the plurality of openings [116a and 125], each conductive structure of the plurality of conductive structures [M0] being in a corresponding opening of the plurality of openings [116a and 125].
Regarding claim 21, Yu et al. discloses in Fig. 2C-2G a method, comprising:
forming an insulating layer [116A] on a temporary adhesion layer [114] on a carrier [112][Fig. 2C];
forming an adhesive layer [123A] on the insulating layer [116A][Fig. 2C];
forming an opening [116a and 125A] extending through the insulating layer [116A] and the adhesive layer [123] to the temporary adhesion layer [114][Fig. 2C];
coupling a semiconductor die [120A] to the adhesive layer [123A], coupling the semiconductor die [120A] to the adhesive layer [123A] including aligning a contact pad [121A] of the semiconductor die [120A] with the opening [116a and 125A] to overlap the opening [116a and 125A] with the contact pad [121A], and wherein the opening [116a and 125A] extends from the contact pad [121A] to the temporary adhesion layer [114];
forming an encapsulant [150] on the adhesive layer [123A], and on the semiconductor die [120A] to enclose the semiconductor die [120A] between the adhesive layer [123A] and the encapsulant [150] [Fig. 2D];
removing the insulating layer [116A], the adhesive layer [123A], the semiconductor die [120A], and the encapsulant [150] from the temporary adhesion layer [114] on the carrier [112] and from the carrier [112] exposing the opening [116a and 125A][Fig. 2F]; and
forming a conductive structure [M0] in the opening [116a and 125A] and on a surface of the contact pad [121A][Fig. 2G].
Regarding claim 24, Yu et al. discloses in Fig. 2D
wherein forming encapsulant [150] on the semiconductor die [120] further includes forming the encapsulant [150] to cover a plurality of sidewalls of the semiconductor die [150] and cover a surface of the semiconductor die [150] facing away from the insulating layer [116A] and the adhesive layer [123A].
Regarding claim 25, Yu et al. discloses in Fig. 2E
grinding a portion of the encapsulant [150] to expose the surface of the semiconductor die [120].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 7-15, 17-19, 21, 24-25 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US Pub. 20190139925), in view of Tuominen (US Pub. 20160174387).
Regarding claim 7, Yu et al. discloses in Fig. 2A-Fig. 2G a method, comprising:
forming a dielectric adhesive layer [116] on a temporary adhesion layer [114] on a carrier [112][Fig. 2A, paragraph [0017]];
forming an opening [116a] extending through the dielectric adhesive layer [116][Fig. 2B];
coupling a semiconductor die [120] to the dielectric adhesive layer [116] including overlapping and aligning a contact pad [121] of the semiconductor die [120] with the opening [116a][Fig. 2C];
forming an encapsulant [150] on the dielectric adhesive layer [116], on a surface of the semiconductor die [120], and on a first sidewall of the semiconductor die [120] transverse to the surface of the semiconductor die [120][Fig. 2D];
removing the dielectric adhesive layer [116], the semiconductor die [120], and the encapsulant [150] from the temporary adhesion layer [114] on the carrier [112] and from the carrier [112] exposing the opening [116a][Fig. 2F]; and
forming a conductive structure [M0] in the opening [116a] and on a surface of the contact pad [121][Fig. 2G].
Yu et al. fails to disclose
forming the dielectric adhesive layer on the temporary adhesion layer comprising:
forming an insulating layer on the temporary adhesion layer on the carrier;
forming an adhesive layer on the insulating layer.
However, Yu et al. discloses in paragraph [0017] that “the bonding layer 116 may be a photosensitive adhesive layer made of a photosensitive adhesive material, such as polyimide, benzocyclobutene (BCB), SINR, or combinations thereof.”
Tuominen discloses in Fig. 14, Fig. 15
forming the dielectric adhesive layer [4, 6,17 and 7] on the temporary adhesion layer [3] comprising:
forming an insulating layer [4 and 6] on the temporary adhesion layer [3] on the carrier [2];
forming an adhesive layer [17 and 7] on the insulating layer [4].
Tuominen further discloses in Fig. 17
coupling the semiconductor die [8] to the adhesive layer [7 and 17];
forming the encapsulant [11] on the adhesive layer [7 and 17];
removing the insulating layer [4 and 6], the adhesive layer [7 and 17], the semiconductor die [8], and the encapsulant [11] from the temporary adhesion layer [3] on the carrier [2] and from the carrier [2].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Tuominen into the method of Yu et al. to include forming the dielectric adhesive layer on the temporary adhesion layer comprising: forming an insulating layer on the temporary adhesion layer on the carrier; forming an adhesive layer on the insulating layer. The ordinary artisan would have been motivated to modify Yu et al. in the above manner for the purpose of providing suitable configuration of the dielectric adhesive layer to avoid any voids in the insulation between conductive structures and the semiconductor die, to adjust or set the dielectric properties of the insulating layer between the semiconductor die and the conductive structures and/or to adjust or set the distance between the semiconductor die and the conductive structures [paragraph [0076] of Tuominen].
Incorporating the dielectric adhesive layer disclosed by Tuominen into the method of Yu et al. would result to the limitations “forming the opening through the insulating layer and the adhesive layer; coupling the semiconductor die to the adhesive layer; forming the encapsulant on the adhesive layer; removing the insulating layer, the adhesive layer, the semiconductor die, and the encapsulant from the temporary adhesion layer on the carrier and from the carrier exposing the opening.”
Regarding claim 8, Yu et al. fails to disclose
wherein forming the opening through the insulating layer and the adhesive layer to the temporary adhesion layer by exposing the insulating layer and the adhesive layer to a laser.
However, Yu et al. discloses in Fig. 2B
forming the opening through the dielectric adhesive layer [116] to the temporary adhesion layer [114].
Tuominen discloses
the dielectric adhesive layer [4, 6,17 and 7] comprising the insulating layer [4 and 6] and the adhesive layer [7 and 17].
Tuominen further discloses in paragraph [0068], [0081]
an opening [5/13] is formed by exposing the insulating layer [4 and 6] and the adhesive layer [7 and 17] to a laser.
Thus, the combination of Yu et al. and Tuominen discloses “forming the opening through the insulating layer and the adhesive layer to the temporary adhesion layer by exposing the insulating layer and the adhesive layer to a laser.”
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Tuominen into the method of Yu et al. to include forming the opening through the insulating layer and the adhesive layer to the temporary adhesion layer by exposing the insulating layer and the adhesive layer to a laser. The ordinary artisan would have been motivated to modify Yu et al. in the above manner for the purpose of providing suitable method for forming the opening through the dielectric adhesive layer. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 9, Yu et al. discloses exposing the dielectric adhesive layer [116] to an etching includes stopping the etching once the etching reaches the temporary adhesion layer [114].
Tuominen discloses the dielectric adhesive layer [4, 6,17 and 7] comprising the insulating layer [4 and 6] and the adhesive layer [7 and 17].
Tuominen further discloses in paragraph [0068], [0081]
etching the insulating layer [4 and 6] and the adhesive layer [7 and 17] by exposing the insulating layer [4 and 6] and the adhesive layer [7 and 17] to the laser.
Thus, the combination of Yu et al. and Tuominen would result to “wherein exposing the insulating layer and the adhesive layer to the laser includes stopping the laser once the laser reaches the temporary adhesion layer.”
Regarding claim 10, Yu et al. discloses in Fig. 2E
removing a portion of the encapsulant [150] to expose the surface of the semiconductor die [120A].
Regarding claim 11, Yu et al. discloses in Fig. 2C
wherein forming the opening [116a] includes forming the opening [116a] extending to the temporary adhesion layer [114].
Regarding claim 12, Yu et al. discloses in Fig. 2A-Fig. 2G a method, comprising:
forming a panel wafer including:
forming a dielectric adhesive layer [116] on a temporary adhesion layer [114] on a carrier [112][Fig. 2A, paragraph [0017]];
forming a plurality of openings [116a] extending through the dielectric adhesive layer [116][Fig. 2B];
coupling a plurality of die [120] to the dielectric adhesive layer [116], each die of the plurality of dies overlapping at least one opening of the plurality of openings [116a][Fig. 2C]; and
forming an encapsulant [150] on the dielectric adhesive layer [116], on a surface of the semiconductor die [120], and on a first sidewall of the semiconductor die [120] transverse to the surface of the semiconductor d the plurality of dies [120][Fig. 2D];
Yu et al. fails to disclose
forming the dielectric adhesive layer on the temporary adhesion layer comprising:
forming an insulating layer on the temporary adhesion layer on the carrier;
forming an adhesive layer on the insulating layer.
However, Yu et al. discloses in paragraph [0017] that “the bonding layer 116 may be a photosensitive adhesive layer made of a photosensitive adhesive material, such as polyimide, benzocyclobutene (BCB), SINR, or combinations thereof.”
Tuominen discloses in Fig. 14, Fig. 15
forming the dielectric adhesive layer [4, 6,17 and 7] on the temporary adhesion layer [3] comprising:
forming an insulating layer [4 and 6] on the temporary adhesion layer [3] on the carrier [2];
forming an adhesive layer [17 and 7] on the insulating layer [4].
Tuominen further discloses in Fig. 17
coupling the plurality of dies [8] to the adhesive layer [7 and 17];
forming the encapsulant [11] on the adhesive layer [7 and 17];
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Tuominen into the method of Yu et al. to include forming the dielectric adhesive layer on the temporary adhesion layer comprising: forming an insulating layer on the temporary adhesion layer on the carrier; forming an adhesive layer on the insulating layer. The ordinary artisan would have been motivated to modify Yu et al. in the above manner for the purpose of providing suitable configuration of the dielectric adhesive layer to avoid any voids in the insulation between conductive structures and the semiconductor die, to adjust or set the dielectric properties of the insulating layer between the semiconductor die and the conductive structures and/or to adjust or set the distance between the semiconductor die and the conductive structures [paragraph [0076] of Tuominen].
Incorporating the dielectric adhesive layer disclosed by Tuominen into the method of Yu et al. would result to the limitations “forming the plurality of openings through the insulating layer and the adhesive layer; coupling the plurality of dies to the adhesive layer; forming the encapsulant on the adhesive layer”.
Regarding claim 13, Yu et al. fails to disclose
wherein forming the plurality of openings including exposing the adhesive layer and the insulating layer to a laser.
However, Yu et al. discloses in Fig. 2B
forming the plurality of openings including exposing the dielectric adhesive layer [116] to an etching.
Tuominen discloses
the dielectric adhesive layer [4, 6,17 and 7] comprising the insulating layer [4 and 6] and the adhesive layer [7 and 17].
Tuominen further discloses in paragraph [0068], [0081]
a plurality of openings opening [13] is formed by exposing the insulating layer [4 and 6] and the adhesive layer [7 and 17] to a laser.
Thus, the combination of Yu et al. and Tuominen would result “wherein forming the plurality of openings including exposing the adhesive layer and the insulating layer to a laser.”
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Tuominen into the method of Yu et al. to include wherein forming the plurality of openings including exposing the adhesive layer and the insulating layer to a laser. The ordinary artisan would have been motivated to modify Yu et al. in the above manner for the purpose of providing suitable method for forming the opening through the dielectric adhesive layer. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 14, Yu et al. discloses in Fig. 2C
wherein coupling the plurality of die [120A] to the dielectric adhesive layer [116] includes aligning a contact pad [121] of each die of the plurality of die [120] with at least one opening [116a] of the plurality of openings [116a].
Tuominen discloses in Fig. 17
the dielectric adhesive layer [4, 6,17 and 7] comprising the insulating layer [4 and 6] and the adhesive layer [7 and 17]; and
coupling the plurality of dies [8] to the adhesive layer [7 and 17].
Thus, the combination of Yu et al. and Tuominen would result “wherein coupling the plurality of die to the adhesive layer includes aligning a contact pad of each die of the plurality of die with at least one opening of the plurality of openings.”
Regarding claim 15, Yu et al. discloses in Fig. 2E
removing a portion of the encapsulant [150] exposing respective surfaces of the plurality of die [120] facing away from the dielectric adhesive layer [116].
Tuominen discloses in Fig. 17
the dielectric adhesive layer [4, 6,17 and 7] comprising the insulating layer [4 and 6] and the adhesive layer [7 and 17].
Thus, the combination of Yu et al. and Tuominen would result to “removing a portion of the encapsulant exposing respective surfaces of the plurality of die facing away from the adhesive layer and the insulating layer.”
Regarding claim 17, Yu et al. discloses Fig. 2G
forming a plurality of conductive structures [M0] in the plurality of openings [116a].
Regarding claim 18, Yu et al. discloses in Fig. 2F removing the panel wafer from the temporary adhesion layer [114] of the carrier [112].
Regarding claim 19, Yu et al. discloses in Fig. 2G
after removing the panel wafer from the temporary adhesion layer [114], forming a plurality of conductive structures [M0] in the plurality of openings [116a], each conductive structure of the plurality of conductive structures [M0] being in a corresponding opening of the plurality of openings [116a].
Regarding claim 21, Yu et al. discloses in Fig. 2A-Fig. 2G a method, comprising:
forming a dielectric adhesive layer [116] on a temporary adhesion layer [114] on a carrier [112][Fig. 2A, paragraph [0017]];
forming an opening [116a] extending through the dielectric adhesive layer [116] to the temporary adhesion layer [114] [Fig. 2B];
coupling a semiconductor die [120] to the dielectric adhesive layer [116], coupling the semiconductor die [120] to the dielectric adhesive layer [116] includes aligning a contact pad [121] of the semiconductor die [120] with the opening [116a] to overlap the opening [116a] with the contact pad [121], wherein the opening [116a] extends from the contact pad [121] to the temporary adhesion layer [114][Fig. 2C];
forming an encapsulant [150] on the dielectric adhesive layer [116] and on the semiconductor die [120] to enclose the semiconductor die [120] between the dielectric adhesive layer [116] and the encapsulant [150][Fig. 2D];
removing the dielectric adhesive layer [116], the semiconductor die [120], and the encapsulant [150] from the temporary adhesion layer [114] on the carrier [112] and from the carrier [112] exposing the opening [116a][Fig. 2F]; and
forming a conductive structure [M0] in the opening [116a] and on a surface of the contact pad [121][Fig. 2G].
Yu et al. fails to disclose
forming the dielectric adhesive layer on the temporary adhesion layer comprising:
forming an insulating layer on the temporary adhesion layer on the carrier;
forming an adhesive layer on the insulating layer;
wherein the opening extends from the contact pad to the temporary adhesion layer.
However, Yu et al. discloses in paragraph [0017] that “the bonding layer 116 may be a photosensitive adhesive layer made of a photosensitive adhesive material, such as polyimide, benzocyclobutene (BCB), SINR, or combinations thereof.”
Tuominen discloses in Fig. 4, Fig. 5, Fig. 14, Fig. 15
forming the dielectric adhesive layer [4, 6, 7 and 17] on the temporary adhesion layer [3] comprising:
forming an insulating layer [4 and/or 6] on the temporary adhesion layer [3] on the carrier [2];
forming an adhesive layer [7 and 17] on the insulating layer [4 and/or 6].
Tuominen further discloses in Fig. 5, paragraph [0067], [0069]
wherein the opening [5] extends from the contact pad [10] to the temporary adhesion layer [3][when adhesive layer 7 is not needed and when the die does not have a separate adhesive layer as disclosed in paragraph [0069] of Touminen].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Tuominen into the method of Yu et al. to include forming the dielectric adhesive layer on the temporary adhesion layer comprising: forming an insulating layer on the temporary adhesion layer on the carrier; forming an adhesive layer on the insulating layer; wherein the opening extends from the contact pad to the temporary adhesion layer. The ordinary artisan would have been motivated to modify Yu et al. in the above manner for the purpose of providing suitable alternative of semiconductor die; providing suitable configuration of the dielectric adhesive layer to avoid any voids in the insulation between conductive structures and the semiconductor die, to adjust or set the dielectric properties of the insulating layer between the semiconductor die and the conductive structures and/or to adjust or set the distance between the semiconductor die and the conductive structures [paragraph [0076] of Tuominen].
Incorporating the dielectric adhesive layer and the semiconductor die disclosed by Tuominen into the method of Yu et al. would result to the limitations “forming the opening through the insulating layer and the adhesive layer to the temporary adhesion layer; coupling the semiconductor die to the adhesive layer; forming the encapsulant on the adhesive layer and on the semiconductor die to enclose the semiconductor die between the adhesive layer and the encapsulant; removing the insulating layer, the adhesive layer, the semiconductor die, and the encapsulant from the temporary adhesion layer on the carrier and from the carrier exposing the opening.”
Regarding claim 24, Yu et al. discloses in Fig. 2D
wherein forming encapsulant [150] on the semiconductor die [120] further includes forming the encapsulant [150] to cover a plurality of sidewalls of the semiconductor die [150] and cover a surface of the semiconductor die [150] facing away from the dielectric adhesive layer [116].
Tuominen discloses in Fig. 17
the dielectric adhesive layer [4, 6,17 and 7] comprising the insulating layer [4 and 6] and the adhesive layer [7 and 17].
Thus, the combination of Yu et al. and Tuominen would result to “wherein forming encapsulant on the semiconductor die further includes forming the encapsulant to cover a plurality of sidewalls of the semiconductor die and cover a surface of the semiconductor die facing away from the adhesive layer and the insulating layer.”
Regarding claim 25, Yu et al. discloses in Fig. 2E
grinding a portion of the encapsulant [150] to expose the surface of the semiconductor die [120].
Claims 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US Pub. 20190139925) in view of Tuominen (US Pub. 20160174387) as applied to claim 15 and claim 19 above and further in view of Chew (US Pub. 20200203188).
Regarding claim 16, Yu et al. and Tuominen fails to disclose
singulating the panel wafer along a plurality of singulation lines, and wherein removing the portion of the encapsulant occurs before singulating the panel wafer along the plurality of singulation lines.
Chew discloses in Fig. 9a-9b, Fig. 14, Fig. 15b, paragraph [0134],
singulating the panel wafer along a plurality of singulation lines [cutting line], and wherein removing the portion of the encapsulant [123] occurs before singulating the panel wafer along the plurality of singulation lines [cutting line].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Chew into the method of Yu et al. and Tuominen to include singulating the panel wafer along a plurality of singulation lines, and wherein removing the portion of the encapsulant occurs before singulating the panel wafer along the plurality of singulation lines. The ordinary artisan would have been motivated to modify Yu et al. and Tuominen in the above manner for the purpose of providing packaged chip. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 20, Yu et al. and Tuominen fails to disclose
after forming the plurality of conductive structures, singulating the panel wafer along a plurality of singulation lines, each singulation line of the plurality of singulation lines being between at least a pair of adjacent die of the plurality of die.
Chew discloses in Fig. 14, paragraph [0134],
after forming the plurality of conductive structures [111], singulating the panel wafer along a plurality of singulation lines [cutting line], each singulation line of the plurality of singulation lines being between at least a pair of adjacent die [106] of the plurality of dies [106].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Chew into the method of Yu et al. and Tuominen to include after forming the plurality of conductive structures, singulating the panel wafer along a plurality of singulation lines, each singulation line of the plurality of singulation lines being between at least a pair of adjacent die of the plurality of die. The ordinary artisan would have been motivated to modify Yu et al. and Tuominen in the above manner for the purpose of providing packaged chip. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claims 22-23 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US Pub. 20190139925) in view of Tuominen (US Pub. 20160174387) as applied to claim 21 and claim 24 above and further in view of Keser et al. (US Pub. 20170271289).
Regarding claims 22-23, Yu et al. discloses in Fig. 2G
wherein forming the conductive structure [M0] in the opening [116a] and on the surface of the contact pad [121] includes:
forming a first portion of the conductive structure [M0] in the opening.
Yu et al. fails to disclose
forming a second portion of the conductive structure along a surface of the insulating layer, and the surface of the insulating layer facing away from the semiconductor die;
forming a solder ball on the second portion of the conductive structure.
Keser et al. discloses in Fig. 3E, paragraph [0029]-[0030]
forming a second portion of the conductive structure [220] along a surface [bottom surface] of the insulating layer [240], and the surface [bottom surface] of the insulating layer [240] facing away from the semiconductor die [210];
forming a solder ball [230] on the second portion of the conductive structure [220].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Keser et al. into the method of Yu et al. to include forming a second portion of the conductive structure along a surface of the insulating layer, and the surface of the insulating layer facing away from the semiconductor die; forming a solder ball on the second portion of the conductive structure. The ordinary artisan would have been motivated to modify Yu et al. in the above manner for the purpose of providing suitable configuration of the conductive structure and providing suitable subsequent process to form fan-out interconnect [paragraph [0030] of Keser et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 26, Yu et al. and Tuominen fails to disclose
singulating the insulating layer, the adhesive layer, and the encapsulant forming respective sidewalls of the insulating layer, the adhesive layer, and the encapsulant, and wherein the respective sidewalls of the insulating layer, the adhesive layer, and the encapsulant are coplanar with each other.
Keser et al. discloses in Fig. 3E, Fig. 3F, paragraph [0038]
singulating the dielectric adhesive layer [240], and the encapsulant [250] forming respective sidewalls of the dielectric adhesive layer [240], and the encapsulant [250], and wherein the respective sidewalls of the dielectric adhesive layer [240], and the encapsulant [250] are coplanar with each other.
Tuominen discloses in Fig. 17
the dielectric adhesive layer [4, 6,17 and 7] comprising the insulating layer [4 and 6] and the adhesive layer [7 and 17].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Keser et al. into the method of Yu et al. and Tuominen to include singulating the insulating layer, the adhesive layer, and the encapsulant forming respective sidewalls of the insulating layer, the adhesive layer, and the encapsulant, and wherein the respective sidewalls of the insulating layer, the adhesive layer, and the encapsulant are coplanar with each other. The ordinary artisan would have been motivated to modify Yu et al. and Tuominen in the above manner for the purpose of providing packaged chip. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited art discloses similar materials, devices and methods.
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/SOPHIA T NGUYEN/Primary Examiner, Art Unit 2893