Prosecution Insights
Last updated: July 17, 2026
Application No. 18/489,890

MICRO LIGHT-EMITTING DIODE DISPLAY DEVICE

Non-Final OA §103
Filed
Oct 19, 2023
Priority
Oct 25, 2022 — TW 111140484
Examiner
LOPEZ, JORGE ANDRES
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
AUO Corporation
OA Round
1 (Non-Final)
97%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 97% — above average
97%
Career Allowance Rate
29 granted / 30 resolved
+28.7% vs TC avg
Minimal +4% lift
Without
With
+4.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
34 currently pending
Career history
65
Total Applications
across all art units

Statute-Specific Performance

§103
93.3%
+53.3% vs TC avg
§102
6.7%
-33.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 30 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant's claim for priority under 35 U.S.C. 119(a)-(d) or (f), 365(a) or (b), or 386(a) based upon an application filed in the COUNTRY OF TAIWAN on 10/25/2022. Election/Restrictions Applicant's election without traverse of “Species D (claims 1-5,7,13-18, and 20)” in the reply filed on 03/11/2026, is acknowledged. Claims 6,8-12 and 19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3,5,7,13-17 and 20 are rejected under 35 U.S.C. 103 as being obvious over US 12,094,858 B2; Lo et al.; 09/2024; (“858”) in view of US 10,615,186 B2; Kang et al.; 04/2020; (“186”). Regarding Claim 1. 858 teaches in Fig. 4 about a micro light-emitting diode display device, comprising: a substrate (item 110); a first planarization layer (item 113) disposed on the substrate (item 113 is disposed on item 110) and having a first opening (item 101), wherein the first opening has a first opening inner wall (wall items 113b or 113c); a first light-emitting element (item 1201) disposed on the substrate (item 1201 is disposed on item 110), in the first opening, and separated from the first opening inner wall (item 1201 is within item 101, and separated from items 113b or 113c). 858 does not teach about a micro light-emitting diode display device, comprising: a second planarization layer disposed on the substrate and between the first planarization layer and the first light-emitting element, wherein the second planarization layer is in contact with the first light-emitting element. 186 teaches in Fig. 3 about a micro light-emitting diode display device, comprising: a second planarization layer (item 140) disposed on the substrate (item 140 is disposed on item 100) and between the first planarization layer and the first light-emitting element (item 140 is between first planarization layer item 110 and first light-emitting element item 300), wherein the second planarization layer is in contact with the first light-emitting element (items 140 and 300 are in contact). Thus, it would have been obvious to try by one of ordinary skill in the art, at the time the invention was made, to consider utilizing the second planarization layer between the first planarization layer and the first light-emitting element of 186 to fill the opening between the first planarization layer and the first light-emitting element in 858 in order to “bury a peripheral space of the light emitting device 300 disposed in the concave portion 130” as taught by 186 in Fig. 3 and Col. 14, Ln. 2-3. Regarding Claim 2. 186 teaches in Fig. 3 about a micro light-emitting diode display device, wherein the second planarization layer is in contact with the first opening inner wall (item 140 is in contact with the inner wall of item 130). Regarding Claim 3. 186 teaches in Fig. 2 about a micro light-emitting diode display device, wherein the second planarization layer surrounds the first light-emitting element (item 130 which is filled by the second planarization layer surrounds item 300). Regarding Claim 5. 186 teaches in Fig. 3 about a micro light-emitting diode display device, wherein the second planarization layer extends from the first opening and at least partially overlaps a top surface of the first planarization layer (item 140 overlaps a top surface of item 110). Regarding Claim 7. 858 teaches in Fig. 4 about a micro light-emitting diode display device, comprising a first light-emitting element disposed in the first opening. 858 does not teach about a micro light-emitting diode display device, comprising a second light-emitting element and a third light-emitting element, wherein the second light-emitting element and the third light-emitting element are disposed in the first opening. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to duplicate a first light-emitting element and place the duplicates within the same opening, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. In re Harza, 124 USPQ 378. See MPEP 2144.04. Regarding Claim 13. 186 teaches in Fig. 3 about a micro light-emitting diode display device, wherein at least one of the first planarization layer and the second planarization layer comprises a light-transmitting material (at least the second planarization layer item 140 comprises a light-transmitting material to allow transmission of light from item 300). Regarding Claim 14. 186 teaches in Figs. 3 and 13 about a micro light-emitting diode display device, wherein the first planarization layer (Fig. 3, light transmits through item 140) and the second planarization layer (Fig. 13, light transmits through item 110) are light transmissive. 186 does not teach about a micro light-emitting diode display device, wherein a light transmission of the first planarization layer and a light transmission of the second planarization layer are in a range of 95% and 99%. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to experiment with different transparency ranges for the first and second planarization layers, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding Claim 15. 186 teaches in Figs. 3 and 13 about a micro light-emitting diode display device, wherein the first planarization layer comprises acrylic resin (“planarization layer 110 according to an embodiment may be formed of … photo acryl”, Col. 10, Ln. 53-56). 186 does not teach about a micro light-emitting diode display device, wherein the second planarization layer comprises acrylic resin. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use the same acrylic resin material of the first planarization layer for the material of the second planarization layer, to achieve the light transmissivity for the second planarization layer as described in Fig. 13, since it has been held to be within the general skill of worker in the art to select known material on the basis of its suitability for the intended use as a matter of obvious design variation and choice. In re Leshin, 125 USPQ 416. Regarding Claim 16. 858 teaches in Fig. 4 about a micro light-emitting diode display device, comprising: a substrate (item 110); a first planarization layer (item 113) disposed on the substrate (item 113 is disposed on item 110) and having a plurality of openings (opening items 101) with corresponding opening inner walls (wall items 113b or 113c of each corresponding item 101); a plurality of light-emitting elements (items 1201) disposed on the substrate (items 1201 are disposed on item 110) and separated from the corresponding opening inner walls of the plurality of openings (items 1201 are separated from corresponding items 113b or 113c of the plurality of items 101). 858 does not teach about a micro light-emitting diode display device, comprising: a second planarization layer disposed in the plurality of openings, wherein the second planarization layer is in contact with the corresponding opening inner walls of the plurality of openings, the second planarization layer laterally wraps the plurality of light-emitting elements, and the second planarization layer is in contact with each of the plurality of light-emitting elements. 186 teaches in Figs. 2 and 3 about a micro light-emitting diode display device, comprising: a second planarization layer (Fig. 3, item 140) disposed in the plurality of openings (Fig. 3, item 140 is disposed within display items 130), wherein the second planarization layer is in contact with the corresponding opening inner walls of the plurality of openings (Fig. 3, item 140 is in contact with the inner wall of each item 130), the second planarization layer laterally wraps the plurality of light-emitting elements (Fig. 2, item 130 which is filled by the second planarization layer surrounds items 300), and the second planarization layer is in contact with each of the plurality of light-emitting elements (Fig. 3, items 140 and 300 are in contact). Thus, it would have been obvious to try by one of ordinary skill in the art, at the time the invention was made, to consider utilizing the second planarization layer between the first planarization layer and the first light-emitting elements of 186 to fill the opening between the first planarization layer and the first light-emitting elements in 858 in order to “bury a peripheral space of the light emitting device 300 disposed in the concave portion 130” as taught by 186 in Fig. 3 and Col. 14, Ln. 2-3. Regarding Claim 17. 858 teaches in Fig. 4 about a micro light-emitting diode display device, wherein a top surface of the first planarization layer is substantially level with a top surface of at least one of the plurality of light-emitting elements (items 113a and 121 are substantially level). Regarding Claim 20. 186 teaches in Fig. 3 about a micro light-emitting diode display device, wherein a first light-emitting element disposed in the first opening, and the second planarization layer is disposed between the light-emitting element and the opening inner walls. 858 does not teach about a micro light-emitting diode display device, wherein at least two of the plurality of light-emitting elements are disposed in one of the plurality of openings, and the second planarization layer is disposed between any adjacent two light-emitting elements in the one of the plurality of openings. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to duplicate a first light-emitting element and place the duplicates within the same opening, while maintaining a second planarization layer surrounding each duplicate light-emitting element (as taught in Fig. 3 for the single light-emitting device), since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. In re Harza, 124 USPQ 378. See MPEP 2144.04. Allowable Subject Matter Claims 4 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art does not teach or suggest the claimed limitations. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORGE ANDRES LOPEZ whose telephone number is (571)272-5763. The examiner can normally be reached M-F (8:30am to 5:00pm). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached on 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897 /JORGE ANDRES LOPEZ/Examiner, Art Unit 2897
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Prosecution Timeline

Oct 19, 2023
Application Filed
Jun 03, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
97%
Grant Probability
99%
With Interview (+4.5%)
3y 5m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 30 resolved cases by this examiner. Grant probability derived from career allowance rate.

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