DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined
under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-8 and 9-11 in the reply filed on 04/02/2026 is acknowledged.
Response to Amendments
Applicant's response of 07/24/2026 has been acknowledged. No new matter has been added.
This office action considers claims 1-11 pending for prosecution and are examined on their merits.
Response to Arguments
Applicant's arguments of 07/24/2026 with respect to the rejections of claims have
been fully considered but are moot in view of the new grounds of rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Notes: when present, hyphen separated fields within the hyphens (- -) represent, for example, as (30A - Fig 2B - [0128]) = (element 30A - Figure No. 2B - Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The same conventions apply to Column and Sentence, for example (19:14-20) = (column19:sentences 14-20). These conventions are used throughout this document.
Claims 1-11 are rejected under 35 U.S.C. 103 as being unpatentable over Yamazaki (US 20140008647 A1 – hereinafter Yamazaki) in view of Shank et al. (US 20210336005 A1 – hereinafter Shank).
Regarding independent claim 1, Yamazaki teaches:
(Original) A display device ([0225] – “A semiconductor device having a
display function (also referred to as a display device)”- hereinafter ‘DD’), comprising:
a first transistor (4010 – Fig. 12B – [0235] – “transistor 4010 provided in the
pixel portion 4002 is electrically connected to a display element to form a display panel”);
a pixel electrode (4034 – Fig. 12B – [0246] – “first electrode layer 4034 having
an opening pattern and serving as a pixel electrode”) electrically connected to the first transistor (4010 – Fig. 12B shows this); and
a second transistor (4011 – Fig. 12B – [0237] – “transistor 4011”) electrically
connected to the first transistor (4010),
wherein a nitrogen content per unit area of an active layer of the second
transistor is greater than a nitrogen content per unit area of an active layer of the first transistor.
Yamazaki does not expressly disclose the other limitations of claim 1.
However, in an analogous art, Shank teaches
wherein a nitrogen ([0030] – “dopants may include, e.g., nitrogen (N.sub.2)
ions” – hereinafter ‘N’) content per unit area (the phrase “dopant concentration” is used and is interpreted to imply the content per unit area at the surface of the doping are when specifying “concentration”, hereinafter ‘PUA’) of an active layer (142b – Fig. 7 – [0046] – “second channel region 142b”) of the second transistor (150b – Fig. 7 – [0046] – “second transistor 150b”) is greater (142b – Fig. 7 – [0046] – “first transistor 150a may have first channel region 142a with a substantially lower dopant concentration than second channel region 142b for second transistor 150b”) than a nitrogen (N) content per unit area (PUA) of an active layer (142a – Fig. 7 – [0046] – “first channel region 142a”) of the first transistor (150a – Fig. 7 – [0046] – “first transistor 150a”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the nitrogen content structure as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result [0003] – “To accommodate high voltage and power requirements, stacks of FETs (i.e., several transistors coupled together at their source/drain terminals) are often deployed in a series combination. The multiple transistors may be structured to act as a single switch between two high voltage nodes of a circuit. During operation, however, the FETs in the stack often exhibit an asymmetrical voltage distribution across their source and drain terminals. In some cases, the asymmetrical voltage may cause premature breakdown of FETs that are located closest to the output signal, i.e., where the voltage drop from source to drain is likely to be highest. Conventional approaches to mitigate this problem may rely on using a stack of FETs with higher breakdown voltage levels. However, such designs often exhibit higher resistance when turned on, and/or higher capacitance when turned off, and thus create other technical obstacles.”
Regarding claim 2, Yamazaki as modified by Shank, teaches claim 1 from which claim 2 depends. Yamazaki does not expressly disclose the limitations of claim 2.
However, in an analogous art, Shank teaches
(Previously Presented) The display device of claim 1, wherein
the active layer of the first transistor comprises (142a) a first channel region (142a – this is also interpreted as the channel region due to the transistor configuration with multiple areas of 142a) the active layer of the second transistor (142b) comprises a second channel region (142b – this is also interpreted as the channel region due to the transistor configuration with multiple areas of 142b), and
a nitrogen (N) content per unit area (PUA) of the second channel region (142b) is greater (142b – Fig. 7 – [0046] – “first transistor 150a may have first channel region 142a with a substantially lower dopant concentration than second channel region 142b for second transistor 150b”) than a nitrogen (N) content per unit area (PUA) of the first channel region (142a).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the transistor structure as taught by into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result of a transistor with nitrogen content as stated above in claim 1.
To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D.
Regarding claim 3, Yamazaki as modified by Shank, teaches claim 1 from which claim 3 depends. Yamazaki does not expressly disclose the limitations of claim 3.
However, in an analogous art, Shank teaches
(Previously Presented) The display device of claim 1, wherein
the active layer (142a) of the first transistor (150a) comprises a first source region and a first drain region (144 – Fig. 7 – [0034] – “pairs of source/drain regions 144”),
the active layer (142b) of the second transistor (150b) comprises a second source region and a second drain region (144 – this is the source/drain region for each transistor), and
a nitrogen (N) content per unit area (PUA) of the second source region (144) is greater (nitrogen implantation is done for the area of the active semiconductor material forming both the source/drain regions and the channel region thus [0046] – “first transistor 150a may have first channel region 142a with a substantially lower dopant concentration than second channel region 142b for second transistor 150b” pertains to the source/drain regions as well) than a nitrogen (N) content per unit area (PUA) of the first source region (E11 - [0014]) ([0034] – “Further processing may include implanting active semiconductor material 140 with one or more dopants, e.g., through the upper surface thereof, to form pairs of source/drain regions 144. The implanting may include one or more implanting processes”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the transistor structure as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result of a transistor with nitrogen content as stated above in claim 1.
To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D.
Regarding claim 4, Yamazaki as modified by Shank, teaches claim 3 from which claim 4 depends. Yamazaki does not expressly disclose the limitations of claim 4.
However, in an analogous art, Shank teaches
(Original) The display device of claim 3, wherein a nitrogen (N) content per
unit area (PUA) area of the second drain region (144 – this is the source/drain region for each transistor) is greater (nitrogen implantation is done for the area of the active semiconductor material forming both the source/drain regions and the channel region thus [0046] – “first transistor 150a may have first channel region 142a with a substantially lower dopant concentration than second channel region 142b for second transistor 150b” pertains to the source/drain regions as well) than a nitrogen (N) content per unit area (PUA) of the first drain region ([0034] – “Further processing may include implanting active semiconductor material 140 with one or more dopants, e.g., through the upper surface thereof, to form pairs of source/drain regions 144. The implanting may include one or more implanting processes”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the nitrogen content structure as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result of a transistor with nitrogen content as stated above in claim 1.
Regarding claim 5, Yamazaki as modified by Shank, teaches claim 1 from which claim 5 depends. Yamazaki teaches
(Previously Presented) The display device of claim 1, wherein
the active layer of the first transistor (4010) comprises a first active layer
overlapping (403 – Fig. 3A – [0096] – “stack 403 of oxide semiconductor layers – this corresponds to an active layer) a first gate electrode (401 – Fig. 3A – [0075] – “gate electrode layer 401”) of the first transistor (4010) in a plan view (Fig. 3B annotated, see below, shows this),
the active layer of the second transistor (4010) comprises a second
active layer overlapping a second gate electrode of the second transistor in a plan view (Fig. 12A shows the structure with two transistors), and
a nitrogen content per unit area of the second active layer is greater
than the nitrogen content per unit area of the first active layer.
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Yamazaki does not expressly disclose the other limitations of claim 5.
However, in an analogous art, Shank teaches
a nitrogen (N) content per unit area (PUA) of the second active layer (142b)
is greater (142b – Fig. 7 – [0046] – “first transistor 150a may have first channel region 142a with a substantially lower dopant concentration than second channel region 142b for second transistor 150b”) than the nitrogen (N) content per unit area (PUA) of the first active layer (142a).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the nitrogen content structure as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result of a transistor with nitrogen content as stated above in claim 1.
Regarding claim 6, Yamazaki as modified by Shank, teaches claim 5 from which claim 6 depends. Yamazaki does not expressly disclose the limitations of claim 6.
However, in an analogous art, Shank teaches
(Previously Presented) The display device of claim 5, wherein the first
active layer (142a) and the second active layer (142) are disposed on a same layer (126 – Fig. 7 – [0025] – “insulator layer 126” – elements 142a and b are implanted in element 140 that is disposed on layer 126).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the nitrogen content structure as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result of a transistor as stated above in claim 2.
Regarding claim 7, Yamazaki as modified by Shank, teaches claim 1 from which claim 7 depends. Yamazaki does not expressly disclose the limitations of claim 7.
However, in an analogous art, Shank teaches
(Original) The display device of claim 1, wherein a threshold voltage of the
second transistor (150b) is greater ([0039] – “the threshold voltage of second transistor 150b may be greater than all other transistors 150a, 150c, 150d, 150e of FET stack 110”) than a threshold voltage of the first transistor (150a).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the threshold voltage as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result as stated above in claim 1.
Regarding claim 8, Yamazaki as modified by Shank, teaches claim 1 from which claim 8 depends. Yamazaki teaches
(Previously Presented) The display device of claim 1, wherein each
of the active layer (403a – [0101] – “oxide semiconductor layer 403a”) of the first transistor (4010) and the active layer (403a – both transistors contain the same active layer structure) of the second transistor (4011) further comprises at least one of indium-gallium-zinc oxide and indium-gallium-zinc-tin oxide ([0101] – “oxide semiconductor layer 403a, an In--Ga--Zn-based oxide film” – transistors 4010 and 4011 are formed the same way as the transistor containing 403a).
Regarding independent claim 9, Yamazaki teaches:
(Previously Presented) A display device ([0225] – “A semiconductor
device having a display function (also referred to as a display device)”- hereinafter ‘DD’), comprising:
an active layer (403 – Fig. 3A – [0096] – “stack 403 of oxide semiconductor
layers – this corresponds to an active layer);
a first transistor (4010 – Fig. 12B – [0235] – “transistor 4010 provided in the
pixel portion 4002 is electrically connected to a display element to form a display panel”) comprising a first gate electrode (401 – Fig. 3A – [0075] – “gate electrode layer 401”) overlapping a first channel region (Fig. 12B annotated, see below – hereinafter ‘403-4010’) of the active layer (403) in the plan view (Fig. 11B shows this);
a second transistor (4011 – Fig. 12B – [0237] – “transistor 4011”) comprising a second gate electrode (Fig. 12B annotated, see below – [0075] – “gate electrode layer 401” – hereinafter 401-4011) overlapping a second channel region (Fig. 12B annotated, see below – hereinafter ‘403-4011’) of the active layer (403) in plan view (Fig. 11B shows this); and
a pixel electrode (4034 – Fig. 12B – [0246] – “first electrode layer 4034 having an opening pattern and serving as a pixel electrode”) electrically connected to the first transistor (4010 – Fig. 12B shows this),
wherein a nitrogen content per unit area of the second channel region is greater than a nitrogen content per unit area of the first channel region.
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Yamazaki does not expressly disclose the other limitations of claim 9.
However, in an analogous art, Shank teaches
wherein a nitrogen ([0030] – “dopants may include, e.g., nitrogen (N.sub.2)
ions” – hereinafter ‘N’) content per unit area (the phrase “dopant concentration” is used and is interpreted to imply the content per unit area at the surface of the doping are when specifying “concentration”, hereinafter ‘PUA’) of the second channel region (142b – this is also interpreted as the channel region due to the transistor configuration with multiple areas of 142b) is greater (142b – Fig. 7 – [0046] – “first transistor 150a may have first channel region 142a with a substantially lower dopant concentration than second channel region 142b for second transistor 150b”) than a nitrogen (N) content per unit area (PUA) of the first channel region (142a).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the nitrogen content structure as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result as stated above in claim 1.
Regarding claim 10, Yamazaki as modified by Shank, teaches claim 9 from which claim 10 depends. Yamazaki does not expressly disclose the limitations of claim 10.
However, in an analogous art, Shank teaches
(Original) The display device of claim 9, wherein
the active layer (142a – Fig. 7 – [0046] – “first channel region 142a” – this is also interpreted as the channel region due to the transistor configuration with multiple areas of 142a) comprises:
a first source region (144 – Fig. 7 – [0034] – “pairs of source/drain regions 144”) of the first transistor (150a – Fig. 7 – [0046] – “first transistor 150a”);
a first drain region (144) of the first transistor (150a);
a second source region (144) of the second transistor (150b – Fig. 7 – [0046] – “second transistor 150b”); and
a second drain region (144) of the second transistor (150b), and
a nitrogen (N) content per unit area (PUA) of the second source region (nitrogen implantation is done for the area of the active semiconductor material forming both the source/drain regions and the channel region thus [0046] – “first transistor 150a may have first channel region 142a with a substantially lower dopant concentration than second channel region 142b for second transistor 150b” pertains to the source/drain regions as well) than a nitrogen content per unit area of the first source region ([0034] – “Further processing may include implanting active semiconductor material 140 with one or more dopants, e.g., through the upper surface thereof, to form pairs of source/drain regions 144. The implanting may include one or more implanting processes”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the transistor structure as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result of a transistor with nitrogen content as stated above in claim 2.
Regarding claim 11, Yamazaki as modified by Shank, teaches claim 10 from which claim 11 depends. Yamazaki does not expressly disclose the limitations of claim 11.
However, in an analogous art, Shank teaches
(Original) The display device of claim 10, wherein a nitrogen (N) content per
unit area (PUA) of the second drain region (144 – this is the source/drain region for each transistor) is greater (nitrogen implantation is done for the area of the active semiconductor material forming both the source/drain regions and the channel region thus [0046] – “first transistor 150a may have first channel region 142a with a substantially lower dopant concentration than second channel region 142b for second transistor 150b” pertains to the source/drain regions as well) than a nitrogen (N) content per unit area (PUA) of the first drain region ([0034] – “Further processing may include implanting active semiconductor material 140 with one or more dopants, e.g., through the upper surface thereof, to form pairs of source/drain regions 144. The implanting may include one or more implanting processes”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the nitrogen content as taught by Shank into Yamazaki.
An ordinary artisan would have been motivated to use the known technique of Shank in the manner set forth above to produce the predictable result of a transistor with nitrogen content as stated above in claim 1.
Conclusion
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/GRA/
Examiner, Art Unit 2897
/CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
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