DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/20/2023 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The disclosure is objected to because of the following informalities: In page 8, the description of “The third doped regions 50 of the first conductivity type are disposed in the first doped regions 30” should be corrected into “The third doped regions 50 of the second conductivity type are disposed in the first doped regions 30”. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lichtenwalner (US 2021/0343834) in view of Hsu (US 2004/0145011), and further in view of Rahimo (US 2021/0257460).
Regarding claim 1, Lichtenwalner discloses, in at least figures 4A-4C and related text, a silicon carbide semiconductor device, comprising:
a silicon carbide substrate (410, [73]);
a drift layer (420, [73]) of a first conductivity type (n-type, [73]) disposed on the silicon carbide substrate (410, [73]), the drift layer (420, [73]) has a main surface (upper surface of 420, figures);
a plurality of first doped regions (470, [73]) of a second conductivity type (p-type, [73]) opposite to the first conductivity type (n-type, [73]) disposed in the drift layer (420, [73]), the first doped regions (470, [73]) comprising a plurality of first sub-portions (470 under 490, [77], figures) and a plurality of first extending portions (470 between adjacent 490s in Y direction, figures) extended horizontally along a first horizontal direction (Y direction, figures) from the first sub-portions (470 under 490, [77], figures), the first doped regions (470, [73]) forming a plurality of first p-n junctions with the drift layer (420, [73]);
a plurality of second doped regions (460, [73]) of the first conductivity type (n-type, [73]), the second doped regions (460, [73]) comprising a plurality of second sub-portions (460 under 490, [77], figures) and a plurality of second extending portions (460 between adjacent 490s in Y direction, figures) extended horizontally along the first horizontal direction (Y direction, figures) from the second sub-portions (460 under 490, [77], figures), the second doped regions (460, [73]) forming a plurality of second p-n junctions with the first doped regions (470, [73]), a plurality of channel regions (region of 470 close to 478, [78], figures) being provided between the first p-n junctions and the second p-n junctions along the main surface (upper surface of 420, figures);
a plurality of third doped regions (444, [76]) of the second conductivity type (p-type, [76]) disposed in the first sub-portions (470 under 490, [77], figures) of the first doped regions (470, [73]) and adjacent to the second sub-portions (460 under 490, [77], figures) of the second doped regions (460, [73]);
a plurality of trenches (481, [71]) penetrating from the main surface (upper surface of 420, figures) into the drift layer (420, [73]), the plurality of trenches (481, [71]) running horizontally (figures); and
a gate electrode (484, [81]) disposed on the main surface (upper surface of 420, figures) and in the trenches (481, [71]), the gate electrode (484, [81]) being electrically isolated from the drift layer (420, [73]) by a gate insulating layer (482, [80]).
Lichtenwalner does not explicitly disclose the first doped regions forming a plurality of JFET regions with the drift layer; a plurality of second doped regions of the first conductivity type disposed within the first doped regions; the plurality of trenches running horizontally through at least a portion of the JFET regions.
Hsu teaches, in at least figures 2C, 2H, 2I, and related text, the device comprising the first doped regions (105, [30]) forming a plurality of JFET regions (regions of interface of 105 with 100B, [32], [41], figures) with the drift layer (100B, [30], [41]); the plurality of trenches (120, [32]) running horizontally through at least a portion of the JFET regions (regions of interface of 105 with 100B, figures) with the drift layer (100B, [30], [41]) (figures), for the purpose of providing a trench MOSFET of accumulation channel type so as to increase the electron mobility and thus reduce the specific on-resistance, Ron,sp ([10]).
Rahimo teaches, in at least figures 7A, 7B, 8, and related text, the device comprising a plurality of second doped regions (7, [57]) of the first conductivity type ([57]) disposed within the first doped regions (9, [57]), for the purpose of providing a transistor cell layout for a power semiconductor device offering reduced on-state losses, low drainage of holes, stable gate parameters, improved blocking capability, and good controllability, such as an Insulated Gate Bipolar Transistor (IGBT) with improved electrical characteristics ([11]).
Lichtenwalner, Hsu, and Rahimo are analogous art because they all are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lichtenwalner with the specified features of Hsu and Rahimo because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lichtenwalner to have the first doped regions forming a plurality of JFET regions with the drift layer; the plurality of trenches running horizontally through at least a portion of the JFET regions, as taught by Hsu and the plurality of second doped regions of the first conductivity type disposed within the first doped regions, as taught by Rahimo, for the purpose of providing a trench MOSFET of accumulation channel type so as to increase the electron mobility and thus reduce the specific on-resistance, Ron,sp ([10], Hsu) and providing a transistor cell layout for a power semiconductor device offering reduced on-state losses, low drainage of holes, stable gate parameters, improved blocking capability, and good controllability, such as an Insulated Gate Bipolar Transistor (IGBT) with improved electrical characteristics ([11], Rahimo).
Regarding claim 2, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Lichtenwalner further discloses, in at least figures 4A-4C and related text, each of the first sub-portions (470 under 490, [77], figures) and each of the second sub-portions (460 under 490, [77], figures) are connected by one or more first extending portions (470 between adjacent 490s in Y direction, figures) and one or more second extending portions (460 between adjacent 490s in Y direction, figures), respectively.
Regarding claim 3, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Rahimo further teaches, in at least figures 7A, 7B, 8, and related text, each of the first sub-portions (portion of 9 under 14, [57], [64], figures) and each of the second sub-portions (7 under 14, [57], [64], figures) are connected by at least four first extending portions (portion of 9 at left, right, upper and lower side of 14, figures) and at least four second extending portions (portion of 7 at left, right, upper and lower side of 14, figures), respectively, for the purpose of providing a transistor cell layout for a power semiconductor device offering reduced on-state losses, low drainage of holes, stable gate parameters, improved blocking capability, and good controllability, such as an Insulated Gate Bipolar Transistor (IGBT) with improved electrical characteristics ([11]).
Regarding claim 4, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Lichtenwalner further discloses, in at least figures 4A-4C and related text, the first extending portions (470 between adjacent 490s in Y direction, figures) of the first doped regions (470, [73]) and the second extending portions (460 between adjacent 490s in Y direction, figures) of the second doped regions (460, [73]) extend along the first horizontal direction (Y direction, figures), and the trenches (481, [71]) run substantially parallelly to the first extending portions (470 between adjacent 490s in Y direction, figures) and the second extending portions (460 between adjacent 490s in Y direction, figures).
Regarding claim 5, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Rahimo further teaches, in at least figures 7A, 7B, 8, and related text, the trenches (trench of 11/12’, [58], figures) run along a second horizontal direction orthogonal (horizontal direction, figures 7A, 7B) to the first horizontal direction (vertical direction, figures 7A, 7B), for the purpose of providing a transistor cell layout for a power semiconductor device offering reduced on-state losses, low drainage of holes, stable gate parameters, improved blocking capability, and good controllability, such as an Insulated Gate Bipolar Transistor (IGBT) with improved electrical characteristics ([11]).
Regarding claim 6, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Rahimo further teaches, in at least figures 7A, 7B, 8, and related text, the trenches (trench of 11, [58], figures) include a first group (trench of 11 in vertical direction, figures 7A, 7B) and a second group (trench of 11 in horizontal direction, figures 7A, 7B), which run substantially along the first horizontal direction (vertical direction, figures 7A, 7B) and a second horizontal direction (horizontal direction, figures 7A, 7B) orthogonal to the first horizontal direction (vertical direction, figures 7A, 7B), for the purpose of providing a transistor cell layout for a power semiconductor device offering reduced on-state losses, low drainage of holes, stable gate parameters, improved blocking capability, and good controllability, such as an Insulated Gate Bipolar Transistor (IGBT) with improved electrical characteristics ([11]).
Regarding claim 7, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Rahimo further teaches, in at least figures 7A, 7B, 8, and related text, the first doped region (9, [57], figures) and the second doped region (9, [57], figures) further comprise a plurality of first connecting portions (portion of 9 at left and right side of 14, figures) and a plurality of second connecting portions (portion of 7 at left and right side of 14, figures) respectively, the first connecting portions (portion of 9 at left and right side of 14, figures) and the second connecting portions (portion of 7 at left and right side of 14, figures) extend horizontally along a second horizontal direction (horizontal direction, figures 7A, 7B) from the first sub-portions (portion of 9 under 14, [57], [64], figures) and the second sub-portions (portion of 7 under 14, [57], [64], figures), for the purpose of providing a transistor cell layout for a power semiconductor device offering reduced on-state losses, low drainage of holes, stable gate parameters, improved blocking capability, and good controllability, such as an Insulated Gate Bipolar Transistor (IGBT) with improved electrical characteristics ([11]).
Regarding claim 8, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Lichtenwalner further discloses, in at least figures 4A-4C and related text, a bottom of the trench (481, [71]) is deeper than a bottom of the first doped region (470, [73]).
Regarding claim 9, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Lichtenwalner further discloses, in at least figures 4A-4C and related text, a plurality of shielding regions (440, [75], [76]) having the second conductivity type ([75]) disposed at a bottom of the trenches (481, [71]), the shielding regions (440, [75], [76]) being electrically coupled to the first doped region (470, [76]).
Regarding claim 10, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 4 as described above.
Hsu further teaches, in at least figures 2C, 2H, 2I, and related text, a distance between a sidewall of the trench (120, [32]) and the first extending portion (portion of 105 at outside of contact opening of 200 in horizontal directions, [30], [38], figures) is equal to or larger than 1 nm ([30], [41]) (figures), for the purpose of providing a trench MOSFET of accumulation channel type so as to increase the electron mobility and thus reduce the specific on-resistance, Ron,sp ([10]).
Claim(s) 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lichtenwalner (US 2021/0343834) in view of Hsu (US 2004/0145011), Rahimo (US 2021/0257460), and further in view of Arai (US 2016/0099316).
Regarding claim 11, Lichtenwalner in view of Hsu and Rahimo discloses the silicon carbide semiconductor device of claim 1 as described above.
Lichtenwalner in view of Hsu and Rahimo does not explicitly disclose a current spreading layer of the first conductivity type, the current spreading layer is proximate to the main surface and has a doping concentration higher than that of a remaining portion of the drift layer.
Arai teaches, in at least figure 1 and related text, the device comprising a current spreading layer (NI, [47]) of the first conductivity type ([47]), the current spreading layer (NI, [47]) is proximate to the main surface (upper surface of Nea, figure) and has a doping concentration higher than that of a remaining portion of the drift layer (Nea, [46]) ([46], [47]), for the purpose of inhibiting the operating characteristic of the silicon carbide semiconductor device from varying ([61]).
Lichtenwalner, Hsu, Rahimo, and Arai are analogous art because they all are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lichtenwalner in view of Hsu and Rahimo with the specified features of Arai because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lichtenwalner in view of Hsu and Rahimo to have a current spreading layer of the first conductivity type, the current spreading layer being proximate to the main surface and having a doping concentration higher than that of a remaining portion of the drift layer, as taught by Arai, for the purpose of inhibiting the operating characteristic of the silicon carbide semiconductor device from varying ([61], Arai).
Regarding claim 12, Lichtenwalner in view of Hsu, Rahimo, and Arai discloses the silicon carbide semiconductor device of claim 11 as described above.
Arai further teaches, in at least figure 1 and related text, a bottom of the current spreading layer (NI, [47]) is deeper than a bottom of the first doped region (PB, [48]) and shallower than a bottom of a shielding region (PI, [55]) (figure), for the purpose of inhibiting the operating characteristic of the silicon carbide semiconductor device from varying ([61]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
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/TONG-HO KIM/ Primary Examiner, Art Unit 2811