Prosecution Insights
Last updated: April 19, 2026
Application No. 18/491,089

SEMICONDUCTOR LIGHT-EMITTING DEVICE

Non-Final OA §103
Filed
Oct 20, 2023
Examiner
KEAGY, ROSE ALYSSA
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tianjin Sanan Optoelectronics Co., Ltd.
OA Round
1 (Non-Final)
96%
Grant Probability
Favorable
1-2
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 96% — above average
96%
Career Allow Rate
24 granted / 25 resolved
+28.0% vs TC avg
Moderate +7% lift
Without
With
+7.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
24 currently pending
Career history
49
Total Applications
across all art units

Statute-Specific Performance

§103
54.1%
+14.1% vs TC avg
§102
29.5%
-10.5% vs TC avg
§112
16.4%
-23.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 25 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 2 is objected to because of the following informalities: Regarding Claim 2, the last subparagraph recites in step (c) – “the second recess structure extending through said transparent insulating layer.” The word “extending” is not appropriate because it implies an active step. An amendment is suggested to change the last subparagraph of Claim 2 to “in step (c), the second recess structure extends through said transparent insulating layer.” Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Sung et al. (Sung”), US 2016/0197235 (listed in the IDS), in view of Hata, US 2006/0226434 (listed in the IDS). Regarding Claim 1, Sung discloses a method for manufacturing at least one semiconductor light-emitting device (Fig. 1; ¶ 0030-0031), comprising the steps of: (a) providing a semiconductor light-emitting structure (Fig. 4; ¶ 0156) that includes a bonding substrate (10; Fig. 4; ¶ 0054) having an upper surface (upper surface of 10; Fig. 4) and a lower surface opposite to the upper surface (lower surface of 10; Fig. 4); a multi-layered metal unit (15, 20, 30, 40; Fig. 4; ¶ 0056, 0058-0062) disposed on the upper surface of the bonding substrate (Fig. 4); and a semiconductor lighting unit (70, 72, 74, 76; Fig. 4; ¶ 0071) disposed on the multi-layered metal unit (Fig. 4; ¶ 0070 “disposed on the ohmic layer 40”) opposite to the bonding substrate (Fig. 4); (b) removing a portion of the semiconductor lighting unit to form a first recess structure on the multi-layered metal unit (Fig. 7; ¶ 0193 “perform separation into a plurality of light emitting structures 70”, ¶ 0194); (d) dicing the bonding substrate along the exposed region of the bonding substrate (Fig. 8; ¶ 0198-0199), so as to obtain the semiconductor light-emitting device from the semiconductor light-emitting structure (¶ 0198). Sung does not disclose (c) removing a portion of the multi-layered metal unit along the first recess structure to form a second recess structure that extends through the multi-layered metal unit to expose an exposed region of the bonding substrate. Hata discloses (c) removing a portion of the multi-layered metal unit (Fig. 4; ¶ 0038 “Separating unbonded region 9b from bonded region 9a in multilayered metal layer 39”) along the first recess structure (9b; Fig. 4; ¶ 0038) to form a second recess structure (Fig. 4) that extends through the multi-layered metal unit (Fig. 4) to expose an exposed region (20, 20a, 20b; Fig. 4) of the bonding substrate (1; Fig. 4; ¶ 0037). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for Sung to have (c) removing a portion of the multi-layered metal unit along the first recess structure to form a second recess structure that extends through the multi-layered metal unit to expose an exposed region of the bonding substrate, as taught by Hata, in order to have the semiconductor light-emitting device “manufactured in lower costs” (Hata ¶ 0061) and “a highly reliable light emitting device” (Hata ¶ 0038, 0050, 0061, 0062). Regarding Claim 3, Sung discloses wherein step (d) is implemented by one of a laser scribing and breaking process and a laser stealth dicing process (¶ 0199). Allowable Subject Matter Claims 2 and 4-5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims (and the above objection being overcome). Regarding Claim 2, the prior art does not teach or render obvious wherein: in step (a), the semiconductor light-emitting structure further includes a transparent insulating layer disposed between the multi-layered metal unit and the semiconductor lighting unit; and in step (c), a portion of the transparent insulating layer is removed, the second recess structure extending through said transparent insulating layer. Therefore, the combination of the features of Claims 1 and 2 is considered to be allowable. Claims 4-5 incorporate all of the limitations of allowable Claim 2. Therefore, they are also allowable. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Seong, US 2011/0114984, discloses a method of forming a light-emitting device that includes removing a portion of the semiconductor lighting unit to form a first recess structure on the multi-layered metal unit, and dicing the bonding substrate. Li et al., US 2013/0210178, discloses a method of forming a light-emitting device that includes removing a portion of the semiconductor lighting unit to form a first recess structure on the multi-layered metal unit. Chen et al., US 20110193119, discloses a method of forming a light-emitting device that includes removing a portion of the semiconductor lighting unit to form a first recess structure on the multi-layered metal unit. Chen et al., US 2014/0014994, discloses a method of forming a light-emitting device that includes removing a portion of the semiconductor lighting unit to form a first recess structure on the multi-layered metal unit. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Rose Keagy whose telephone number is (571) 270-3455. The examiner can normally be reached Mon-Fri. 8am-5pm (CT). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /R.K./Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Oct 20, 2023
Application Filed
Jan 02, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
96%
Grant Probability
99%
With Interview (+7.1%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 25 resolved cases by this examiner. Grant probability derived from career allow rate.

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