Prosecution Insights
Last updated: April 19, 2026
Application No. 18/491,833

DISPLAY DEVICE AND DISPLAY SYSTEM

Non-Final OA §102§103§DP
Filed
Oct 23, 2023
Examiner
LEBENTRITT, MICHAEL
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Magnolia White Corporation
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
98%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
916 granted / 992 resolved
+24.3% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
25 currently pending
Career history
1017
Total Applications
across all art units

Statute-Specific Performance

§101
3.3%
-36.7% vs TC avg
§103
40.8%
+0.8% vs TC avg
§102
30.2%
-9.8% vs TC avg
§112
10.1%
-29.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 992 resolved cases

Office Action

§102 §103 §DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 10/23/2023 was filed after the mailing date of the first action on the merits. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-5 and 7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kurasawa et al, US 2019/0072827 A1. Kurasawa teaches: A display device comprising: an array substrate (71); and a counter substrate (72) facing the array substrate (71), wherein the array substrate comprises: a plurality of signal lines (25) arrayed in a first direction in a manner spaced apart from each other; a plurality of scanning lines (24) arrayed in a second direction in a manner spaced apart from each other; a plurality of pixel electrodes (31) provided to respective openings of pixels each surrounded by two adjacent signal lines and two adjacent scanning lines; a plurality of semiconductors (92) provided to the respective pixels; and a common electrode (32) overlapping the pixel electrodes (31) with an insulating film interposed (744) between the common electrode and the pixel electrodes, a slit of the common electrode (32) has a polygonal shape (figure 18) and has a first side and a second side facing the first side and longer than the first side, and the second side overlaps the signal line or the scanning line in plan view. (figure 18) Kurasawa further teaches: 2. The display device according to claim 1, wherein the slit of the common electrode (32) has a third side and a fourth side connecting the first side and the second side, and an end of the scanning line (24) with which the second side overlaps intersects the third side and the fourth side in plan view. (figure 3) 3. The display device according to claim 2, comprising a conductive layer (76a) overlapping the signal lines (25) and the scanning lines (24) and having a grid shape in plan view, wherein the second side overlaps the conductive layer in plan view. (figure 2 and 3) 4. The display device according to claim 1, wherein the slit of the common electrode (32) has a third side and a fourth side connecting the first side and the second side, and an end of the signal line (24) with which the second side overlaps intersects the third side and the fourth side in plan view. (figure 3) 5. The display device according to claim 4, comprising a conductive layer (76a) overlapping the signal lines (25) and the scanning lines (24) and having a grid shape in plan view, wherein the second side overlaps the conductive layer in plan view. (figure 2 and 3) 7. A display system comprising: a lens (532); a display device according to claim 1; and a control device configured to output an image to the display device. Para 0190 Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kurasawa as applied to claim 1 above, and further in view of Jeong et al (US 20190171069 A1. Kurasawa et al does not disclose wherein the slit of the common electrode includes a trapezoidal. Jeong et al (Fig. 3) discloses wherein the slit of the common electrode (270) includes a trapezoidal shape in the opening (270a) of each of the pixels [0049]. It would have been obvious to one of ordinary skill in the art to modify Kurasawa et al to include Jeong et al's slit of the common electrode includes a trapezoidal shape because it provides the display with high-speed response, improved transmittance, and reduced driving voltage. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claim 1 and 6-7 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1, and 6-7 of copending Application No. 18/918,233 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because similar subject matter is claimed. This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Claim 1 (instant application) A display device comprising: an array substrate; and a counter substrate facing the array substrate , wherein the array substrate comprises: a plurality of signal lines arrayed in a first direction in a manner spaced apart from each other; a plurality of scanning lines arrayed in a second direction in a manner spaced apart from each other; a plurality of pixel electrodes provided to respective openings of pixels each surrounded by two adjacent signal lines and two adjacent scanning lines; a plurality of semiconductors provided to the respective pixels; and a common electrode overlapping the pixel electrodes with an insulating film interposed between the common electrode and the pixel electrodes, a slit of the common electrode has a polygonal shape and has a first side and a second side facing the first side and longer than the first side, and the second side overlaps the signal line or the scanning line in plan view. ‘238: A display device comprising: an array substrate; a counter substrate facing the array substrate; and a liquid crystal layer including liquid crystal molecules between the array substrate and the counter substrate, wherein the array substrate comprises: a plurality of signal lines arrayed in a first direction so as to be spaced apart from each other; a scanning lines arrayed in a second direction so as to be spaced apart from each other; a plurality of pixel electrodes disposed respectively in openings of pixels each of which is surrounded by two adjacent signal lines and two adjacent scanning lines; a plurality of semiconductors provided respectively to the pixels; and a common electrode overlapping the pixel electrodes with an insulating film interposed between the common electrode and the pixel electrodes, an end of each of the pixel electrodes overlaps the opening of a corresponding one of the pixels, a slit of the common electrode has a polygonal shape. It is well known in the art, that a display device comprises a liquid crystal layer containing molecules. (claims 6 and 7) are identical and not repeated here for brevity of office action. Conclusion . Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL LEBENTRITT whose telephone number is (571)272-1873. The examiner can normally be reached IFP Mon- Fri 8:30 am- 6 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MICHAEL . LEBENTRITT Primary Examiner Art Unit 2893 /MICHAEL LEBENTRITT/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Oct 23, 2023
Application Filed
Feb 23, 2026
Non-Final Rejection — §102, §103, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
98%
With Interview (+6.0%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 992 resolved cases by this examiner. Grant probability derived from career allow rate.

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