Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application No. 18/491,926 filed on March 13, 2026.
Priority
3. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Specification
4. The title of the invention has been as “Light Emitting Diode Structure Comprising Protecting Electrodes”.
Claim Objections
5. The objections on claims 1, 5-8 have been withdrawn per the applicant’s response dated on 03/13/2026.
Claim Rejections - 35 USC § 102
6. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
7. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
8. Claims 1-5, 7-9, 11 are rejected under 35 U.S.C. 102(a)(1)/ (a)(2) as being anticipated by Chen et al. (US 2021/0305456 A1).
Regarding independent claim 1, Chen et al. teaches a light emitting diode structure (10, Fig. 1B), including:
a substrate (100 called base, para [0017]);
a semiconductor light emitting structure (103, para [0017]: SLED) located on the substrate (100) including a top surface (upper surface of the SLED 103);
an electrode (106 called contact layer, para [0017]) located on the top surface (upper surface) including a pad portion (middle portion: see the annotated figure below) and at least one extension portion (end segment: see the annotated figure below), one end of the at least one extension portion being connected to the pad portion, wherein the pad portion is configured for wire bonding (this is a functional limitation/an intended use) and includes a first maximum height (h1: see the annotated figure below) away from the top surface (upper surface); and
a protection structure (107 called insulating layer, para [0017]: right segment) located on the top surface (upper surface) and connected to the electrode (106), including a second maximum height (h2: see the annotated figure below) away from the top surface, wherein the second maximum height (h2) is greater than (h2>h1, see the annotated figure below) the first maximum height (h1).
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Regarding claim 2, Chen et al. teaches wherein (Fig. 1B), the protection structure (107: right segment) and the pad portion (middle portion) are integrally formed (product-by-process).
Regarding claim 3, Chen et al. teaches wherein (Fig. 1B), the pad portion (middle portion) and the at least one extension portion (end segment) form at least one overlapping area, and the protection structure (107 right segment) is a portion structure of the pad portion overlapped with the at least one extension portion (see annotated figure in claim 1) in the at least one overlapping area.
Regarding claim 4, Chen et al. teaches wherein (Fig. 1B), the protection structure (107 right segment) overlaps (see the annotated figure below) a portion area of the pad portion (middle portion) and the at least one extension portion (see annotated figure in claim 1).
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Regarding claim 5, Chen et al. teaches wherein (Fig. 1B), the pad portion (middle) and the at least one extension portion (end segment) have a same height.
Regarding claim 7, Chen et al. teaches wherein (Fig. 1B), further including a passivation layer (107: left segment) overlapping a portion of the semiconductor light emitting structure (103) and the electrode (106), wherein the protection structure (107 right segment) and the passivation layer (107 left segment) are integrally formed (product-by-process).
Regarding claim 8, Chen et al. teaches wherein (Fig. 1B), the pad portion (middle portion) and the passivation layer (107: left segment) form an overlapping area (see figure below) and the protection structure (107: right segment) is a portion structure of the passivation layer (107 left segment) overlapped with the pad portion in the overlapping area.
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Regarding claim 9, Chen et al. teaches wherein (Fig. 1B), the passivation layer (107 left segment) is formed by an insulation material (silicon oxide/SiOx, para [0027]).
Regarding claim 11, Chen et al. teaches wherein (Fig. 1B), the protection structure (107 right segment) is formed by metal materials or oxide materials (AlOx, para [0027]).
Claim Rejections - 35 USC § 103
9. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
10. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
11. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
12. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
a. Determining the scope and contents of the prior art.
b. Ascertaining the differences between the prior art and the claims at issue.
c. Resolving the level of ordinary skill in the pertinent art.
d. Considering objective evidence present in the application indicating obviousness or non-obviousness.
13. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 2021/0305456 A1) as applied to claim 1 above, and further in view of in view of Lee et al. (US 2019/0067538 A1).
Regarding claim 6, Chen et al. teaches all of the limitations of claim 1 from which this claim depends.
Chen et al. is explicitly silent of disclosing wherein, the protection structure and the at least one extension portion have a same height.
Lee et al. discloses wherein (Fig. 2), the protection structure (121 1st insulating layer, para [0031]) and the at least one extension portion (137 electrode structure, para [0053]) have a same height (see Fig. 2).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Lee et al., and modify the vertical height of the insulating layer along with the electrode on the light emitting structure of Chen et al., in order to reduce the vertical height of the packaged light-emitting module.
14. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 2021/0305456 A1) as applied to claim 1 above.
Regarding claim 10, Chen et al. teaches all of the limitations of claim 1 from which this claim depends.
Chen et al. teaches wherein (Fig. 1B), the second maximum height (h2, see the annotated figure in claim 1) of the protection structure (107 right segment) possesses a certain height as shown in the figure, see claim 1.
However, Chen et al. is explicitly silent of disclosing wherein the second maximum height of the protection structure is not less than 0.5μm. It would have been obvious to select intended ‘height of the protection structure’ so that the height to be within the quoted range of less than 0.5μm, to optimize the vertical height of the packaged device. In addition, to an ordinary artisan practicing the invention, absent evidence of disclosure of criticality for the range giving unexpected results, it is not inventive to discover optimal or workable ranges by routine experimentation. In re Aller, 220 F. 2d 454, 105 USPQ 233, 235 (CCPA 1955). Furthermore, the specification contains no disclosure of either the critical nature of the claimed height or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen height or upon another variable recited in a claim, the Applicant must show that the chosen height is critical. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990).
Response to Arguments
15. It has been acknowledged that the applicant amended independent claims 1, 5-8, per the response dated on 03/13/2026.
Applicant’s arguments in pages 1-3 of the remark section have been reviewed thoroughly, but the examiner disagrees respectfully, because the ‘pad’ or ‘electrode’ is a broad element which is not defined by any specific ‘term’ in the semiconductor domain, therefore, any metal or alloy or conductive material can be considered as the pad or electrode. In this instance, the contact layer/structure 106 is being considered as the pad or pad portion.
In addition, the amended limitation of claim 1 “….the pad portion is configured for wire bonding….” which indicates a functional limitation/has limited weight per the device claim. It is suggested to amend the claim (s) languages per the structure of the invention rather than the functional limitation (s) that would differentiate from the prior art (s).
Conclusion
16. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
17. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIDARUL MAZUMDER whose telephone number is (571)272-8823. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
18. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DIDARUL A MAZUMDER/Primary Examiner, Art Unit 2812
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