Prosecution Insights
Last updated: April 19, 2026
Application No. 18/492,051

HIGH-FREQUENCY MODULE AND COMMUNICATION DEVICE

Non-Final OA §103
Filed
Oct 23, 2023
Examiner
CORNELY, JOHN PATRICK
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co. Ltd.
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
3y 5m
To Grant
92%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
49 granted / 67 resolved
+5.1% vs TC avg
Strong +19% interview lift
Without
With
+19.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
22 currently pending
Career history
89
Total Applications
across all art units

Statute-Specific Performance

§103
49.6%
+9.6% vs TC avg
§102
25.3%
-14.7% vs TC avg
§112
22.0%
-18.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 67 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. An English language translation of the non-English language foreign application has not been received. Status of Claims Claim s 1-15 are pending. Claim s 1-15 are original. Claims 1- 15 are rejected herein. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: HIGH-FREQUENCY MODULE INCLUDING ELECTROMAGNETIC SHIELD LAYER AND COMMUNICATION DEVICE . The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1 -2 , 4- 11 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Nakajima ( US 20200020645 A1 ) in view of Otsubo ( WO 2020017582 A1 ) . Note, the rejections herein referring to “ Otsubo ” are based on WO 2020017582 A1 , published 01 /23/ 2020 . However, the citations herein relating to Otsubo are made with respect to US 20210136917 A1 , which is a corresponding English language document that is being used solely for translation purposes. Regarding claim 1 , Nakajima discloses (see generally, e.g., FIGS. 1 and 2A-2B) : A high-frequency module (100) comprising: a mounting substrate (20) that has a first main surface (211) and a second main surface (bottom surface) facing each other; a first electronic component ( generally referred to herein by “EC1” ) and a second electronic component ( generally referred to herein as by “EC2” ) on the first main surface (211) of the mounting substrate (20) ; a resin layer (50) that is on the first main surface (211) of the mounting substrate (20) , and that covers at least a part of an outer peripheral surface (side surface) of the first electronic component ( EC1 ) and at least a part of an outer peripheral surface (side surface) of the second electronic component ( EC2 ) ; and a metal electrode layer (60) that covers at least a part of the resin layer (50) , and that overlaps at least a part of the first electronic component ( EC1 ) and at least a part of the second electronic component ( EC2 ) in a plan view (FIG. 2A) in a thickness direction (Z-direction) of the mounting substrate (20) , wherein the first electronic component ( EC1 ) comprises a first signal terminal ( see, e.g., FIG. 1 ) , wherein the second electronic component ( EC2 ) comprises a second signal terminal ( see, e.g., FIG. 1 ) , and wherein the metal electrode layer (60) has a through-portion (600) between the first signal terminal and the second signal terminal in the plan view (FIG. 2A) in the thickness direction (Z-direction) of the mounting substrate (20) . Note, EC1 and EC2 are taken as any combination of two electronic components (i.e., identified by reference characters 30-39) on opposite sides of one of the slits (610, 620, 630), e.g., as shown in FIG. 2A. Note also , as shown in FIG. 1, the first and second electronic components ( EC1 and EC2 ) are electrically connected to various other components for transmitting and/or receiving electrical signals. H ence , as claimed, the first and second electronic components ( EC1 and EC2 ) necessarily comprise first and second signal terminals, respectively, e.g., to make such electrical connections. More over , insomuch as the through-portion (600) is between the first and second electronic components ( EC 1 and EC2 ) as shown, e.g., in FIG. 2A, the through portion (600) is also necessarily between the first and second signal terminals as claimed . Nakajima does not explicitly disclose wherein at least a part of a main surface of the first electronic component opposite to a mounting substrate side is in contact with the metal electrode layer . However, in analogous art, Otsubo (see generally, e.g., FIG. 2) discloses wherein at least a part of a main surface (top surface) of the first electronic component (41) opposite to a mounting substrate side (bottom side) is in contact with the metal electrode layer (6) . It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made at least a part of a main surface (top surface) of the first electronic component ( EC1 ) of Nakajima opposite to a mounting substrate side (bottom side) be in contact with the metal electrode layer ( 60 ) of Nakajima as taught by Otsubo according to known methods to yield predictable results, for example, to aid in the efficient release and/or dissipation of heat (see, e.g., paragraphs [0031]-[0032] of Otsubo ) . Regarding claim 2 , Nakajima in view of Otsubo as applied to claim 1 discloses t he high-frequency module according to c laim 1 . Nakajima does not explicitly disclose wherein at least a part of a main surface of the second electronic component opposite to the mounting substrate side is in contact with the metal electrode layer. However, in analogous art, Otsubo (see generally, e.g., FIG. 2) discloses wherein at least a part of a main surface (top surface) of the second electronic component (42) opposite to a mounting substrate side (bottom side) is in contact with the metal electrode layer (6). It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made at least a part of a main surface (top surface) of the second electronic component ( EC2 ) of Nakajima opposite to a mounting substrate side (bottom side) be in contact with the metal electrode layer (60) of Nakajima as taught by Otsubo according to known methods to yield predictable results, for example, to aid in the efficient release and/or dissipation of heat (see, e.g., paragraphs [0031]-[0032] of Otsubo ) . Regarding claim 4 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima further discloses wherein each of the first electronic component ( EC 1 – see, e.g., the electronic component 31 ) and the second electronic component ( EC2 – see, e.g., the electronic component 33 ) is a high-frequency component in a signal path through which a transmission signal passes (see, e.g., paragraphs [0021] -[ 0028] ) . Regarding claim 5 , Nakajima in view of Otsubo as applied to claim 4 discloses the high-frequency module according to claim 4 . Nakajima further discloses wherein the high-frequency component is a transmission filter (see, e.g., the electronic component 33 and paragraph [0026]) , a transmission and reception filter (see, e.g., the electronic component 33 and paragraph [0026]) , or a power amplifier (see, e.g., the electronic component 31) . Regarding claim 6 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima further discloses: wherein the first electronic component (EC1) is a first inductor (see, e.g., a first electronic component 39) in a signal path through which a transmission signal passes, and wherein the second electronic component (EC2) is a second inductor (see, e.g., a second electronic component 39) in a signal path through which a reception signal passes. Regarding claim 7 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima further discloses wherein a length of the through-portion (600 – see, e.g., slit 610 in particular) in one direction (Y-direction) intersecting with the thickness direction (Z-direction) of the mounting substrate (20) is longer than a length of the first electronic component ( EC1 ) in the one direction (Y-direction) . See, e.g., FIG. 2A. Regarding claim 8 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima further discloses wherein a length of the through-portion (600 – see, e.g., slit 610 in particular) in one direction (Y-direction) intersecting with the thickness direction (Z-direction) of the mounting substrate (20) is longer than a length of the second electronic component ( EC2 ) in the one direction (Y-direction) . See, e.g., FIG. 2A. Regarding claim 9 , Nakajima discloses (see generally, e.g., FIGS. 1 , 2A-2B , 7 and 8 ): A high-frequency module (100) comprising: a mounting substrate (20) that has a first main surface (211) and a second main surface (bottom surface) facing each other; an electronic component (38 – see, e.g., FIGS. 7 and 8) on the first main surface (211) of the mounting substrate (20); a resin layer (50) that is on the first main surface (211) of the mounting substrate (20), and that covers at least a part of an outer peripheral surface (side surface) of the electronic component (50); and a metal electrode layer (60) that covers at least a part of the resin layer (50), and that overlaps at least a part of the electronic component (38) in a plan view in a thickness direction (Z-direction) of the mounting substrate (20), wherein the electronic component (38) comprises: a first signal terminal, and a second signal terminal, and wherein the metal electrode layer (600) has a through-portion (600) between the first signal terminal and the second signal terminal in the plan view in the thickness direction (Z-direction) of the mounting substrate (20) . Note, the electronic component (38) is disclosed as a capacitor, which inherently comprises at least two terminals, i.e., a first signal terminal and a second signal terminal, as claimed. Moreover, insomuch as FIGS. 7 and 8 alternately show the through-portion (600 – i.e., including the slit 610 ) extending laterally and longitudinally, respectively, over the electronic component (38) , the through-portion (600) is necessarily between the first and second signal terminal s in at least one disclosed embodiment regardless of whether the terminals of the electronic component (38) are on the ends or the sides of the electronic component (38) . Nakajima does not explicitly disclose wherein at least a part of a main surface of the electronic component opposite to a mounting substrate side is in contact with the metal electrode layer . However, in analogous art, Otsubo (see generally, e.g., FIG. 2) discloses wherein at least a part of a main surface (top surface) of the electronic component (41) opposite to a mounting substrate side (bottom side) is in contact with the metal electrode layer (6). It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made at least a part of a main surface (top surface) of the electronic component (38) of Nakajima opposite to a mounting substrate side (bottom side) be in contact with the metal electrode layer (60) of Nakajima as taught by Otsubo according to known methods to yield predictable results, for example, to aid in the efficient release and/or dissipation of heat (see, e.g., paragraphs [0031]-[0032] of Otsubo ) . Regarding claim 10 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima further discloses wherein the through-portion (600) is formed over a total length of the mounting substrate (20) in one direction (Y-direction) intersecting with the thickness direction (Z-direction) of the mounting substrate (20) . See, e.g., slit (610) in FIG. 2A, which is part of the claimed through-portion (600). Regarding claim 11 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima further discloses wherein the through-portion (600) is L-shaped in the plan view in the thickness direction (Z-direction) of the mounting substrate (20). See, e.g., slit s 6 2 0 and 630 ) in FIG. 2A, which are part of the claimed through-portion (600). Regarding claim 14 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima further discloses: a metal electrode (40) on the first main surface (211) of the mounting substrate (20), and connected to ground (see, e.g., paragraph [0039] and FIG. 2B), wherein the metal electrode (40) does not overlap the through-portion (600) in the plan view in the thickness direction (Z-direction) of the mounting substrate (20). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Nakajima ( US 20200020645 A1 ) in view of Morikita ( US 20110013349 A1 ) . Regarding claim 3 , Nakajima discloses (see generally, e.g., FIGS. 1 and 2A-2B): A high-frequency module (100) comprising: a mounting substrate (20) that has a first main surface (211) and a second main surface (bottom surface) facing each other; a first electronic component (38) and a second electronic component (39) on the first main surface (211) of the mounting substrate (20) ; a resin layer (50) that is on the first main surface (211) of the mounting substrate (20) , and that covers at least a part of an outer peripheral surface (side surface) of the first electronic component (38) , at least a part of an outer peripheral surface (side surface) of the second electronic component (39) ; and a metal electrode layer (60) that covers at least a part of the resin layer (50) , wherein the first electronic component (38) comprises a first signal terminal, wherein the second electronic component (39) comprises a second signal terminal, and the metal electrode layer (60) has a through-portion (600) between the first signal terminal and the second signal terminal in the plan view (FIG. 2A) in the thickness direction (Z-direction) of the mounting substrate (20) . Note, the first electronic component (38) is disclosed as a capacitor and the second electronic component (39) is disclosed as an inductor (see, e.g., paragraph [0037]). A capacitor (e.g., such as the first electronic component 38) inherently includes at least one terminal, which reads on the claimed first signal terminal; and an inductor (e.g., such as the second electronic component 39) inherently includes at least one terminal, which read on the claimed second signal terminal. Moreover, insomuch as the through-portion (600) is between the first and second electronic components (38 and 39) as shown, e.g., in FIG. 2A, the through portion (600) is also necessarily between the first and second signal terminals as claimed. Nakajima does not explicitly disclose: a first metal member on a main surface of the first electronic component opposite to a mounting substrate side; or a second metal member on a main surface of the second electronic component opposite to the mounting substrate side ; arranged such that: the resin layer is on at least a part of an outer peripheral surface of the first metal member, and at least a part of an outer peripheral surface of the second metal member ; the metal electrode layer overlaps at least a part of the first metal member and at least a part of the second metal member in a plan view in a thickness direction of the mounting substrate ; at least a part of a main surface of the first metal member opposite to the mounting substrate side is in contact with the metal electrode layer; and at least a part of a main surface of the second metal member opposite to the mounting substrate side is in contact with the metal electrode layer. However, in analogous art, Morikita discloses (see, e.g., FIG. 1) : a first metal member ( i.e., the metal member 6 on the left ) on a main surface (upper surface) of the first electronic component ( i.e., the electronic component 3 on the left ) opposite to a mounting substrate side (bottom side) ; and a second metal member ( i.e., the metal member 6 on the right ) on a main surface (upper surface) of the second electronic component ( i.e., the electronic component 3 on the right ) opposite to the mounting substrate side (bottom side); arranged such that: the resin layer (4) is on at least a part of an outer peripheral surface (side surface) of the first metal member (6) , and at least a part of an outer peripheral surface (side surface) of the second metal member (6) ; the metal electrode layer (5) overlaps at least a part of the first metal member (6) and at least a part of the second metal member (6) in a plan view in a thickness direction (vertical direction) of the mounting substrate (1) ; at least a part of a main surface (upper surface) of the first metal member (6) opposite to the mounting substrate side (bottom side) is in contact with the metal electrode layer (5) ; and at least a part of a main surface (upper surface) of the second metal member (6) opposite to the mounting substrate side (bottom side) is in contact with the metal electrode layer (5) . It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included the first and second metal members (6) as disclosed by Morikita in the high-frequency module (100) of Nakajima according to known methods to yield predictable results, for example, to provide electrical connections between the first and second electronic components (38 and 39) of Nakajima and the metal electrode layer (60) of Nakajima . See, e.g., paragraph [0028] of Morikita . Claim s 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Nakajima in view of Otsubo as applied to claim 1 above, and further in view of Nomura ( WO 2019216299 A1 ) . Note, the rejections herein referring to “ Nomura ” are based on WO 2019216299 A1 , published 11/ 1 4/ 20 19. However, the citations herein relating to Nomura are made with respect to US 20210043583 A1 , which is a corresponding English language document that is being used solely for translation purposes. Regarding claim 12 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima does not explicitly disclose: a metal electrode on the first main surface of the mounting substrate, and connected to a ground, wherein the metal electrode overlaps the through-portion in the plan view in the thickness direction of the mounting substrate. However, in analogous art, Nomura discloses (see, e.g., FIG. 2B ) : a metal electrode (8) on the first main surface (upper surface) of the mounting substrate (2) , and connected to a ground (paragraph [0033]) , wherein the metal electrode (8) overlaps the through-portion (5a) in the plan view in the thickness direction (vertical direction) of the mounting substrate (2) . It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included a metal electrode as taught by Nomura in the high-frequency module (100) of Nakajima according to known methods to yield predictable results, for example, to provide for and access to a ground electrode . Regarding claim 13 , Nakajima in view of Otsubo and Nomura as applied to claim 1 2 discloses the high-frequency module according to claim 1 2 . Nomura further discloses wherein the metal electrode (8) is exposed from the metal electrode layer (6) in the thickness direction (vertical direction) of the mounting substrate (2) . Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Nakajima in view of Otsubo as applied to claim 1 above, and further in view of Yamaguchi ( WO 2020184613 A1 ) . Note, the rejections herein referring to “ Yamaguchi ” are based on WO 2020184613 A1 , published 09 / 17 / 2020 . However, the citations herein relating to Yamaguchi are made with respect to US 20210409046 A1 , which is a corresponding English language document that is being used solely for translation purposes. Regarding claim 15 , Nakajima in view of Otsubo as applied to claim 1 discloses the high-frequency module according to claim 1. Nakajima further discloses a communication device (paragraph [0021]) comprising the high-frequency module (i.e., the high-frequency module 100 of Nakajima as modified in accordance with the teachings of Otsubo as described herein); and a n external device connected to the high-frequency module (e.g., via terminals 101 and 104) . Nakajima does not explicitly disclose that the external device is a signal processing circuit. However, in analogous art, Yamaguchi discloses (see, e.g., FIG. 1) a communication device (5) comprising a high-frequency module (1) and a signal processing circuit (3, 4) connected to the high-frequency module (1). It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used a signal processing circuit as taught by Yamaguchi for the external device of Nakajima according to known methods to yield predictable results, for example, to provide suitable inputs and/or processed signals to the terminals (101 and 104) of Nakajima . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT JOHN P CORNELY whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-4172 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT Monday - Thursday 8:30 AM - 4:00 PM . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT Davienne Monbleau can be reached at FILLIN "SPE Phone?" \* MERGEFORMAT (571) 272-1945 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. FILLIN "Examiner Stamp" \* MERGEFORMAT JOHN P. CORNELY Examiner Art Unit 2812 /J.P.C./ Examiner, Art Unit 2812 /DAVIENNE N MONBLEAU/ Supervisory Patent Examiner, Art Unit 2812
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Prosecution Timeline

Oct 23, 2023
Application Filed
Mar 05, 2026
Non-Final Rejection — §103
Apr 10, 2026
Interview Requested

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
92%
With Interview (+19.0%)
3y 5m
Median Time to Grant
Low
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