Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Invention I, Species A (Fig 3A), claims 1-16 in the reply filed on 1/6/2026 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 8-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 8 recites the limitation "the respective bank layer" and “the respective structure” in lines 11-12. There is insufficient antecedent basis for this limitation in the claim. Claims 9-16 are indefinite because of their dependence on claim 8. Claim 10 is also indefinite because it recites “a bank layer” while claim 8 already recites “a bank layer.” It is unclear if this is another bank layer or is referring back to the bank layer of claim 8.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US Pub. No. 2023/0180506 A1), hereafter referred to as Lee.
As to claim 8, Lee discloses a display device ([0017]) comprising:
a substrate (fig 1B, 102) having a plurality of sub-pixel areas (fig 1E, sub-pixel areas 118);
a plurality of power connection lines (lines of 112) on the substrate (102);
a plurality of structures (122), each of the plurality of structures included in each of the plurality of sub-pixel areas (fig 1E, 118 on left and right side) and is on a power connection line (112) from the plurality of power connection lines (lines of 112), and includes an undercut exposing a portion of the power connection line (142 exposing 112);
a bank layer (110) on the power connection line (112), the bank layer including a first opening that exposes the undercut (fig 1B, opening in 110 exposing undercut 142); and
an organic light-emissive layer (120), a cathode electrode layer (124) on the organic light-emissive layer (120), and a passivation layer (126) on the cathode electrode layer (124) that cover the respective bank layer (110) and the respective structure (122),
wherein the power connection line (112) is electrically connected to the cathode electrode layer (124) at the undercut (142),
wherein organic light-emissive layers of sub-pixel areas from the plurality of sub-pixel areas that are adjacent to each other are disconnected from each other (120 is disconnected between the left and right sub-pixels at 148),
wherein cathode electrode layers of the sub-pixel areas adjacent to each other are disconnected from each other (124 is disconnected between the left and right sub-pixels at 148),
wherein passivation layers of the sub-pixel areas adjacent to each other are disconnected from each other (126 is disconnected between the left and right sub-pixels at 148).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 and 4-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Im et al. (US Pub. No. 2019/0198806 A1), hereafter referred to as Im.
As to claim 1, Lee discloses a display device ([0017]) comprising:
a plurality of sub-pixels (fig 1E, 118); and
a plurality of power connection lines electrically connecting the plurality of sub-pixels to a circuit (fig 1B, power connection line 112 in each sub-pixel 118; [0021]),
wherein each of the plurality of sub-pixels (118) includes an organic light-emissive layer (120; [0023]), a cathode electrode layer (124; [0024]) on the organic light-emissive layer (120), and a passivation layer (126; [0026]) on the cathode electrode layer (124),
wherein organic light-emissive layers of sub-pixels from the plurality of sub-pixels that are adjacent to each other are disconnected from each other (fig 1E, sub-pixels 118 on left and right side of 148 show organic light-emissive layers 120 are disconnected as shown in cross section shown in fig 1B),
wherein cathode electrode layers of the sub-pixels adjacent to each other are disconnected from each other (cathodes 124 are disconnected between adjacent sub-pixels at structure 148),
wherein passivation layers of the sub-pixels adjacent to each other are disconnected from each other (passivation layers 126 are disconnected between adjacent sub-pixels at structure 148),
wherein each of the sub-pixels includes a structure including an undercut (contact overhang 122 includes an undercut),
wherein each of the plurality of power connection lines (112) overlaps the structure (122) such that the power connection line is electrically connected to a cathode electrode layer from the cathode electrode layers at the undercut (cathode electrode 124 electrically connected to 112).
Lee does not disclose a power line that applies a voltage to the plurality of sub-pixels.
Nonetheless, Im discloses a similar display device (fig 1, 10; [0033]) comprising a power line (EVL) that applied voltage ([0056]) to a plurality of sub-pixels ([0034]) through a power connection line (AE).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to include a power line in Lee as taught by Im since this will allow for the improved connection of a low potential power voltage from a power generating part to the sub-pixels.
As to claim 4, Lee in view of Im disclose the display device of claim 1 (paragraphs above).
Lee further discloses wherein the plurality of sub-pixels are arranged in a matrix form along a first direction and a second direction intersecting the first direction (sub-pixels 118),
wherein each of the plurality of power connection lines (112) extends in the first direction so as to electrically connect the plurality of sub-pixels arranged in the first direction to the power line (112 connected to EVL of Im as presented above).
As to claim 5, Lee in view of Im disclose the display device of claim 1 (paragraphs above).
Lee further discloses wherein each of the plurality of sub-pixels includes an outermost boundary of the organic light-emissive layer, an outermost boundary of the cathode electrode layer, and an outermost boundary of the passivation layer (fig 1B, outermost boundary of 120, 124 and 126),
wherein the outermost boundary of the organic light-emissive layer is positioned inwardly of the outermost boundary of the passivation layer (120 is inward of 126),
wherein the outermost boundary of the cathode electrode layer (124) is disposed between the outermost boundary of the organic light-emissive layer (120) and the outermost boundary of the passivation layer (126).
As to claim 6, Lee in view of Im disclose the display device of claim 5 (paragraphs above).
Lee further discloses wherein the structure included in each of the plurality of sub-pixels is positioned inwardly of the outermost boundary of the organic light-emissive layer, the outermost boundary of the cathode electrode layer, and the outermost boundary of the passivation layer (122 is positioned inward of outermost boundary of 120, 124, 126).
As to claim 7, Lee in view of Im disclose the display device of claim 1 (paragraphs above).
Im further discloses wherein the power line is a low-potential voltage (VSS) line, and a low-potential voltage is applied to the cathode electrode layer included in each of the plurality of sub-pixels via the power connection line ([0056]).
Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Kim et al. (US Pub. No. 2022/0208902 A1), hereafter referred to as Kim.
As to claim 9, Lee discloses the display device of claim 8 (paragraphs above),
Lee does not disclose wherein the display device further comprises:
a plurality of thin-film transistors on the substrate, wherein each of the plurality of thin-film transistors is included in each of the plurality of sub-pixel areas, and includes source and drain electrodes; and
a plurality of data lines on the substrate,
wherein the plurality of power connection lines, the source and drain electrodes, and the plurality of data lines are in a same layer, and are made of a same material.
Nonetheless, Kim discloses a plurality of thin-film transistors (fig 4A, DT) on a substrate (SUB), wherein each of the plurality of thin-film transistors (DT( is included in each of the plurality of sub-pixel areas (pixel), and includes source (DS) and drain electrodes (DD); and
a plurality of data lines (DL) on the substrate (SUB),
wherein the plurality of power connection lines, the source and drain electrodes, and the plurality of data lines are in a same layer, and are made of a same material ([0067]).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to include the thin-film transistors and data lines of Kim in the display of Lee since this will improve the active control of the sub-pixels of the display.
As to claim 10, Lee in view of Kim disclose the display device of claim 9 (paragraphs above).
Kim further discloses wherein a bank layer (fig 4A, BA2) is on a data line (DL) from the plurality of data lines and overlaps the data line (DL),
wherein the data line is non-overlapping with the cathode electrode layer ([0099]).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to include data lines non-overlapping with cathode electrode of Lee in view of Im as taught by Kim since this will prevent parasitic capacitance between the cathode electrode and the data line (Kim, [0099]).
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Kim and further in view of Im.
As to claim 16, Lee discloses the display device of claim 8 (paragraphs above),
Lee does not disclose wherein the display device further comprises a power line as a low-potential voltage (VSS) line, and a low-potential voltage is applied to the cathode electrode layer included in each of the plurality of sub-pixel areas via the power connection line electrically connected to the power line.
Nonetheless, Im discloses wherein the display device further comprises a power line as a low-potential voltage (VSS) line, and a low-potential voltage is applied to the cathode electrode layer included in each of the plurality of sub-pixel areas via the power connection line electrically connected to the power line ([0056]).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to include a power line in Lee as taught by Im since this will allow for the improved connection of a low potential power voltage from a power generating part to the sub-pixels.
Claim(s) 2-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Im and further in view of Kim.
As to claim 2, Lee in view of Im disclose the display device of claim 1 (paragraphs above).
Lee in view of Im do not disclose wherein the display device further comprises a plurality of data lines, each of the plurality of data lines between the sub-pixels adjacent to each other,
wherein each of the plurality of data lines is non-overlapping with the cathode electrode layer.
Nonetheless, Kim discloses wherein a display device comprises a plurality of data lines (fig 5A, DL), each of the plurality of data lines (DL) between sub-pixels adjacent to each other ([0055]),
wherein each of the plurality of data lines is non-overlapping with a cathode electrode layer ([0099]).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to include data lines non-overlapping with cathode electrode of Lee in view of Im as taught by Kim since this will prevent parasitic capacitance between the cathode electrode and the data line (Kim, [0099]).
As to claim 3, Lee in view of Im and Kim disclose the display device of claim 2 (paragraphs above).
Kim further discloses wherein the plurality of data lines (DL) and a plurality of power connection lines (VDD) are alternately arranged with each other and extend in a first direction (y-direction),
wherein the plurality of data lines (DL) and the plurality of power connection lines (VDD) are arranged so as to be non-overlapping with each other (DL and VDD do not overlap).
Allowable Subject Matter
Claims 11-15 would be objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, as well as, overcoming the indefinite rejections made above.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record fails to teach or suggest an overcoat layer on the source and drain electrodes; and an anode electrode layer between the overcoat layer and the bank layer, the anode electrode layer electrically connected to the source and drain electrodes, wherein at least one of the plurality of structures includes a first structure layer, a second structure layer, and a third structure layer stacked sequentially, wherein the first structure layer and the overcoat layer are in a same layer and are made of a same material, wherein the second structure layer and the anode electrode layer are in a same layer and are made of a same material, wherein the third structure layer and the bank layer are in a same layer, and are made of a same material, as recited in claim 11 and including the limitations of claims 8 and 9 from which claim 11 depends. Claims 12-15 are allowable because of their dependence from claim 11.
Pertinent Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub. No. 2021/0376283 A1.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAUN M CAMPBELL whose telephone number is (571)270-3830. The examiner can normally be reached on MWFS: 7:30-6pm Thurs 1-2pm.
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/SHAUN M CAMPBELL/Primary Examiner, Art Unit 2893 1/28/2026