DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 3 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites the limitation "a second tie bar". However, prior to “a second tie bar” there is no antecedent for “a first tie bar”. As such, there is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-13, 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Goida et al. (US 2014/0217566 A1 hereinafter referred to as “Goida”).
With respect to claim 1, Goida discloses, in Figs.1A-9, an electronic device, comprising: opposite first and second sides/(top and bottom sides); opposite third and fourth sides/(opposing outer lead portion sides) (7) spaced apart from one another along a first direction/(horizontal direction); opposite fifth and sixth sides/(inner portions sides) (5) spaced apart from one another along a second direction/(vertical direction) that is orthogonal to the first direction, the first and second sides spaced apart from one another along a third direction/(in-out direction) that is orthogonal to the first and second directions (see Par.[0048] wherein the second leads 3b can include inner portions 5 embedded within the package 1 and integral outer portions 7 extending from the body of the package 1); a molded package structure (9) (see Par.[0040] wherein the leadframe 8 shown in FIGS. 1A-1B is a pre-molded leadframe, in which the metallic leadframe skeleton is embedded or molded in a molding material 9; the molding material 9 can provide the structural support to the leadframe 8 and provide surfaces that contribute to sealing devices within, in conjunction with lid(s) and/or encapsulant; for example, in some embodiments, the molding material 9 can be formed from an insulating material, such as a liquid crystal polymer (LCP), polyether ether ketone (PEEK) or polyphenylene sulfide (PPS)); conductive metal first leads (3b) exposed outside the molded package structure (9) along the first side/(bottom level side), and individual ones of the first leads (3b) extending outward from the molded package structure (9) along a respective one of the third and fourth sides/(opposing outer lead portion sides) (7); and conductive metal second leads (3a) exposed outside the molded package structure along the first side/(bottom level side), individual ones of the second leads (3a) having a lateral side exposed outside the molded package structure along a respective one of the fifth and sixth sides/(inner portions sides) (5), and the lateral side of the individual second leads (3a) being flush with a respective side of the molded package structure (9) along the respective one of the fifth and sixth sides/(inner portions sides) (5) (see Figs.3A-3B, 5A, Par.[0041] wherein the leadframe 8 can include a first set 3a and a second set 3b of leads, which may be referred to hereinafter as "first leads 3a" and "second leads 3b," respectively; the first leads 3a may include an inner lead portion (see, e.g., FIG. 1D); the first leads 3a may be cut or otherwise truncated such that they do not extend outside the body of the package 1, and are shown flush with the body partially defined by the molding material 9; the second leads 3b may include both an inner lead portion (see, e.g., FIG. 1C) and an outer lead portion 7; the outer lead portion 7 of the leads in the second set 3b may extend outwardly to protrude from the body of the package 1 and may be bent downwardly to electrically couple to a system board of the larger electronic system).
With respect to claim 2, Goida discloses, in Figs.1A-9, the electronic device, comprising: a die attach pad (11); and a tie bar (29) connected to the die attach pad (11) and exposed outside the molded package structure along the fifth side/(inner portions sides) (5) (see Par.[0061] wherein as shown in FIGS. 4B-4C, tie bars 29 may also be formed in the leadframe 8 to support the die attach pad 11 before singulation. The tie bars 29 may extend from the die attach pad 11 to an outer frame member of the leadframe 8).
With respect to claim 3, Goida discloses, in Figs.1A-9, the electronic device, comprising a second tie bar/(another tie bar) spaced apart from the tie bar and exposed outside the molded package structure along the fifth side/(inner portions sides) (5) (see Par.[0061] wherein as shown in FIGS. 4B-4C, tie bars 29 may also be formed in the leadframe 8 to support the die attach pad 11 before singulation. The tie bars 29 may extend from the die attach pad 11 to an outer frame member of the leadframe 8).
With respect to claim 4, Goida discloses, in Figs.1A-9, the electronic device, comprising: a third tie bar (29) exposed outside the molded package structure along the sixth side; and a fourth tie bar (29) spaced apart from the third tie bar and exposed outside the molded package structure along the sixth side (see Fig.4C wherein two pairs of tie bars 29 with each pair exposed in opposing sides of the package are shown).
With respect to claim 5, Goida discloses, in Figs.1A-9, the electronic device, wherein: a first set of the second leads (3a) are spaced apart from one another along the first direction/(horizontal direction) and have respective lateral sides exposed outside the molded package structure (9) along the fifth side/(inner portions sides) (5); the tie bar (29) is exposed outside the molded package structure (9) along the fifth side/(inner portions sides) (5) between a first corner of the molded package structure (9) and the first set of the second leads (39); the second tie bar (29) is exposed outside the molded package structure (9) along the fifth side/(inner portions sides) (5) between a second corner of the molded package structure (9) and the first set of the second leads (3a); a second set of the second leads (3a) are spaced apart from one another along the first direction/(horizontal direction) and have respective lateral sides exposed outside the molded package structure (9) along the sixth side/(inner portions sides) (5); the third tie bar (9) is exposed outside the molded package structure (9) along the sixth side/(inner portions sides) (5) between a third corner of the molded package structure (9) and the second set of the second leads (9); and the fourth tie bar (29) is exposed outside the molded package structure (9) along the sixth side/(inner portions sides) (5) between a fourth corner of the molded package structure (9) and the second set of the second leads (3a) (see Fig.4C, wherein the four tie bars 29 are disposed between the four corners of package and leads 3a in opposing fifth and sixth sides).
With respect to claim 6, Goida discloses, in Figs.1A-9, the electronic device, wherein: a first set of the second leads (3a) are spaced apart from one another along the first direction/(horizontal direction) and have respective lateral sides exposed outside the molded package structure (9) along the fifth side; and a second set of the second leads (3a) are spaced apart from one another along the first direction/(horizontal direction) and have respective lateral sides exposed outside the molded package structure (9) along the sixth side (see Fig.4C, wherein the four tie bars 29 are disposed between the four corners of package and leads 3a in opposing fifth and sixth sides).
With respect to claim 7, Goida discloses, in Figs.1A-9, the electronic device, wherein: a first set of the first leads (3b) are spaced apart from one another along the second direction/(vertical direction) and have respective lateral sides exposed outside the molded package structure (9) along the third side/(opposing outer lead portion sides) (7); and a second set the first leads (3b) are spaced apart from one another along the second direction/(vertical direction) and have respective lateral sides exposed outside the molded package structure (9) along the fourth side/(opposing outer lead portion sides) (7) (see Figs.3A-3B, 5A, Par.[0041] wherein the leadframe 8 can include a first set 3a and a second set 3b of leads, which may be referred to hereinafter as "first leads 3a" and "second leads 3b," respectively; the first leads 3a may include an inner lead portion (see, e.g., FIG. 1D); the first leads 3a may be cut or otherwise truncated such that they do not extend outside the body of the package 1, and are shown flush with the body partially defined by the molding material 9; the second leads 3b may include both an inner lead portion (see, e.g., FIG. 1C) and an outer lead portion 7; the outer lead portion 7 of the leads in the second set 3b may extend outwardly to protrude from the body of the package 1 and may be bent downwardly to electrically couple to a system board of the larger electronic system).
With respect to claim 8, Goida discloses, in Figs.1A-9, the electronic device, comprising a semiconductor die (12, 15, 18) electrically coupled to one of the first leads (3b) and to one of the second leads (3a) (see Par.[0044] wherein a processor die 18 can be mounted to the top side 21 of the substrate, and an inertial motion sensor die, e.g., an accelerometer die 12, can be mounted to the opposite, bottom side 23 of the substrate).
With respect to claim 9, Goida discloses, in Figs.1A-9, the electronic device, wherein: a first set of the second leads (3a) are spaced apart from one another along the first direction/(horizontal direction) and have respective lateral sides exposed outside the molded package structure (9) along the fifth side; and a second set of the second leads (3b) are spaced apart from one another along the first direction and have respective lateral sides exposed outside the molded package structure (9) along the sixth side (see Figs.3A-3B, 5A, Par.[0041] wherein the leadframe 8 can include a first set 3a and a second set 3b of leads, which may be referred to hereinafter as "first leads 3a" and "second leads 3b," respectively; the first leads 3a may include an inner lead portion (see, e.g., FIG. 1D); the first leads 3a may be cut or otherwise truncated such that they do not extend outside the body of the package 1, and are shown flush with the body partially defined by the molding material 9; the second leads 3b may include both an inner lead portion (see, e.g., FIG. 1C) and an outer lead portion 7; the outer lead portion 7 of the leads in the second set 3b may extend outwardly to protrude from the body of the package 1 and may be bent downwardly to electrically couple to a system board of the larger electronic system).
With respect to claim 10, Goida discloses, in Figs.1A-9, the electronic device, wherein: a first set of the first leads (3b) are spaced apart from one another along the second direction/(vertical direction) and have respective lateral sides exposed outside the molded package structure (9) along the third side; and a second set the first leads (3b) are spaced apart from one another along the second direction and have respective lateral sides exposed outside the molded package structure (9) along the fourth side (see Figs.3A-3B, 5A, Par.[0041] wherein the leadframe 8 can include a first set 3a and a second set 3b of leads, which may be referred to hereinafter as "first leads 3a" and "second leads 3b," respectively; the first leads 3a may include an inner lead portion (see, e.g., FIG. 1D); the first leads 3a may be cut or otherwise truncated such that they do not extend outside the body of the package 1, and are shown flush with the body partially defined by the molding material 9; the second leads 3b may include both an inner lead portion (see, e.g., FIG. 1C) and an outer lead portion 7; the outer lead portion 7 of the leads in the second set 3b may extend outwardly to protrude from the body of the package 1 and may be bent downwardly to electrically couple to a system board of the larger electronic system).
With respect to claim 11, Goida discloses, in Figs.1A-9, the electronic device, wherein: a first set of the first leads (3b) are spaced apart from one another along the second direction/(vertical direction) and have respective lateral sides exposed outside the molded package structure (9) along the third side; and a second set the first leads (3b) are spaced apart from one another along the second direction/(vertical direction) and have respective lateral sides exposed outside the molded package structure (9) along the fourth side (see Figs.3A-3B, 5A, Par.[0041] wherein the leadframe 8 can include a first set 3a and a second set 3b of leads, which may be referred to hereinafter as "first leads 3a" and "second leads 3b," respectively; the first leads 3a may include an inner lead portion (see, e.g., FIG. 1D); the first leads 3a may be cut or otherwise truncated such that they do not extend outside the body of the package 1, and are shown flush with the body partially defined by the molding material 9; the second leads 3b may include both an inner lead portion (see, e.g., FIG. 1C) and an outer lead portion 7; the outer lead portion 7 of the leads in the second set 3b may extend outwardly to protrude from the body of the package 1 and may be bent downwardly to electrically couple to a system board of the larger electronic system).
With respect to claim 12, Goida discloses, in Figs.1A-9, the electronic device, comprising a semiconductor die (12, 15, 18) electrically coupled to one of the first leads and to one of the second leads (see Par.[0044] wherein a processor die 18 can be mounted to the top side 21 of the substrate, and an inertial motion sensor die, e.g., an accelerometer die 12, can be mounted to the opposite, bottom side 23 of the substrate).
With respect to claim 13, Goida discloses, in Figs.1A-9, the electronic device, wherein the second leads (3a) have a bottom side exposed outside the molded package structure (9) along the first side/(bottom side), and the second leads (3a) have a uniform thickness along the third direction (see Fig.5B wherein uniform thickness leads 3a in z-direction are shown).
With respect to claim 15, Goida discloses, in Figs.1A-9, the electronic device, wherein the second leads have a nonuniform thickness along the third direction and include a top side half etch/(lead cut portion) feature with no pullback (see Fig.5A show lead 3a with cut portion).
Moreover, regarding the limitation “include a top side half etch”, it is submitted that such limitation does not further define the structure as instantly claimed, nor serve to distinguish over Goida. Therefore, the said claimed limitation is a “product by process” limitation. Applicant attention is thereby directed to the fact that a "product by process" claim is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); In re Marosi et al, 218 USPQ 289; and particularly In re Thorpe, 227 USPQ 964, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in "product by process" claims or not. Note that applicant has the burden of proof in such cases, as the above case law make clear.
Claims 1-13, 15-17, 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takahashi (US 2018/0040487 A1).
With respect to claim 1, Takahashi discloses, in Figs.1-32, an electronic device, comprising: opposite first (MRb) and second (MRt) sides (see Par.[0056] wherein the sealing body MR has an upper surface (sealing body upper surface) MRt, a lower surface (back surface, mounting surface, sealing body lower surface) MRb (see FIG. 2) opposite to the upper surface MRt and side surfaces (sealing body side surfaces) MRs positioned between the upper surface MRt and the lower surface MRb); opposite third (MRs1) and fourth (MRs2) sides spaced apart from one another along a first direction/(Y-direction); opposite fifth (MRs3) and sixth (MRs4) sides spaced apart from one another along a second direction/(X-direction) that is orthogonal to the first direction/(Y-direction), the first (MRb) and second (MRt) sides spaced apart from one another along a third direction/(in-out direction or Z-direction) that is orthogonal to the first/(Y-direction) and second/(X-direction) directions (see Par.[0057]-[0058] wherein the sealing body MR has a long side (side) MRs1 extending in an X direction, a long side (side) MRs2 positioned opposite to the long side MRs1, a short side (side) MRs3 extending in a Y direction intersecting the X direction and a short side (side) MRs4 positioned opposite to the short side MRs3 in plan view); a molded (MR) package structure (PKG1) (see Par.[0054] wherein the semiconductor device PKG1 includes a sealing body (resin body) MR that seals the semiconductor chip CP, the plurality of wires BW, and a part of the plurality of leads LD); conductive metal first leads (LD) exposed outside the molded package structure (MR) along the first side (MRb), and individual ones of the first leads (LD) extending outward from the molded package structure (MR) along a respective one of the third (MRs1) and fourth (MRs2) sides (see Par.[0053]-[0054] wherein leads LD, and wires BW are not provided, but are indicated by broken lines for explicitly showing the height relationship between suspension leads TL and the leads LD); and conductive metal second leads (TL) exposed outside the molded package structure (PGK1) along the first side (MRb), individual ones of the second leads (TL) having a lateral side exposed outside the molded package structure (MR) along a respective one of the fifth (MRs3) and sixth (MRs4) sides, and the lateral side of the individual second leads (TL) being flush with a respective side of the molded package structure (PGK1) along the respective one of the fifth (MRs3) and sixth (MRs4) sides (see Par.[0053] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines).
With respect to claim 2, Takahashi discloses, in Figs.1-32, the electronic device, comprising: a die attach pad (DP) (see Par.[0053]-[0054] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines); and a tie bar (LFtb) connected to the die attach pad (DP) and exposed outside the molded package structure (PGK1) along the fifth (MRs3) side (see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 3, Takahashi discloses, in Figs.1-32, the electronic device, comprising a second tie bar (LFtb) spaced apart from the tie bar and exposed outside the molded package structure (PGK1) along the fifth side (MRs3) (see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 4, Takahashi discloses, in Figs.1-32, the electronic device, comprising: a third tie bar (LFtb) exposed outside the molded package structure (PGK1) along the sixth (MRs4) side; and a fourth tie bar (LFtb) spaced apart from the third tie bar (LFtb) and exposed outside the molded package structure (PGK1) along the sixth (MRs4) side (see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 5, Takahashi discloses, in Figs.1-32, the electronic device, wherein: a first set of the second leads (TL) are spaced apart from one another along the first direction/(Y-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the fifth side (MRs3); the tie bar (LFtb) is exposed outside the molded package structure (PGK1) along the fifth side (MRs3) between a first corner of the molded package structure (PGK1) and the first set of the second leads (TL); the second tie bar (LFtb) is exposed outside the molded package structure (PGK1) along the fifth side (MRs3) between a second corner of the molded package structure (PGK1) and the first set of the second leads (TL); a second set of the second leads (TL) are spaced apart from one another along the first direction/(Y-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the sixth side (MRs4); the third tie bar (LFtb) is exposed outside the molded package structure (PGK1) along the sixth side (MRs4) between a third corner of the molded package structure (PGK1) and the second set of the second leads (TL); and the fourth tie bar (LFtb) is exposed outside the molded package structure (PGK1) along the sixth side (MRs4) between a fourth corner of the molded package structure (PGK1) and the second set of the second leads (LFtb) (see Par.[0053] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines; see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 6, Takahashi discloses, in Figs.1-32, the electronic device, wherein: a first set of the second leads (TL) are spaced apart from one another along the first direction/(Y-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the fifth side (MRs3); and a second set of the second leads (TL) are spaced apart from one another along the first direction/(Y-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the sixth side (MRs4) (see Par.[0053] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines; see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 7, Takahashi discloses, in Figs.1-32, the electronic device, wherein: a first set of the first leads (LD) are spaced apart from one another along the second direction/(X-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the third side (MRs1); and a second set the first leads (LD) are spaced apart from one another along the second direction/(X-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the fourth side (MRs2) (see Par.[0053] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines; see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 8, Takahashi discloses, in Figs.1-32, the electronic device, comprising a semiconductor die (CP) electrically coupled to one of the first leads (LD) and to one of the second leads (TL) (see Par.[0054] wherein he plurality of leads LD and the plurality of pads (electrodes, bonding pads) PD (see FIGS. 3 and 4) of the semiconductor chip CP are electrically connected to each other via the plurality of wires (conductive members) BW (see FIGS. 4 and 5)).
With respect to claim 9, Takahashi discloses, in Figs.1-32, the electronic device, wherein: a first set of the second leads (TL) are spaced apart from one another along the first direction/(Y-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the fifth side (MRs3); and a second set of the second leads (TL) are spaced apart from one another along the first direction/(Y-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the sixth side (MRs4) (see Par.[0053] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines; see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 10, Takahashi discloses, in Figs.1-32, the electronic device, wherein: a first set of the first leads (LD) are spaced apart from one another along the second direction/(X-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the third side (MRs1); and a second set the first leads (LD) are spaced apart from one another along the second direction/(X-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the fourth side (MRs2) (see Par.[0053] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines; see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 11, Takahashi discloses, in Figs.1-32, the electronic device, wherein: a first set of the first leads (LD) are spaced apart from one another along the second direction/(X-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the third side (MRs1); and a second set the first leads (LD) are spaced apart from one another along the second direction/(X-direction) and have respective lateral sides exposed outside the molded package structure (PGK1) along the fourth side (MRs2) (see Par.[0053] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines; see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
With respect to claim 12, Takahashi discloses, in Figs.1-32, the electronic device, comprising a semiconductor die (CP) electrically coupled to one of the first leads (LD) and to one of the second leads (TL) (see Par.[0054] wherein he plurality of leads LD and the plurality of pads (electrodes, bonding pads) PD (see FIGS. 3 and 4) of the semiconductor chip CP are electrically connected to each other via the plurality of wires (conductive members) BW (see FIGS. 4 and 5)).
With respect to claim 13, Takahashi discloses, in Figs.1-32, the electronic device, wherein the second leads have a bottom side exposed outside the molded package structure (PGK1) along the first side (MRb), and the second leads (TL) have a uniform thickness along the third direction/(Z-direction) (see, for example, Fig.5 wherein uniform thickness of Tl are shown).
With respect to claim 16, Takahashi discloses, in Figs.1-32, a method of fabricating an electronic device, the method comprising: mounting a semiconductor die (CP) in a unit area/(areas between LFd in Y-direction) of a lead frame (DP) (see Fig.4, Par.[0072] wherein the semiconductor chip CP is mounted at the center of the upper surface DPt of the die pad DP; as shown in FIG. 5, the semiconductor chip CP is mounted on the die pad DP via the die bonding material (adhesive material) DB (see FIG. 4) in a state where a back surface CPb faces the upper surface DPt of the die pad DP; see Fig.11, wherein areas between LFd in Y-direction are shown); electrically connecting the semiconductor die (CP) to prospective first leads (LD) along two opposite lateral sides (MRs1, MRs2) of the unit area/(areas between LFd in Y-direction) that are spaced apart from one another along a first direction/(Y-direction); electrically connecting the semiconductor die (CP) to prospective second leads (TL) along two opposite lateral ends (MRs3, MRs4) of the unit area/(areas between LFd in Y-direction) that are spaced apart from one another along a second direction/(X-direction) that is orthogonal to the first direction/(Y-direction) (see Par.[0053]-[0054] wherein a semiconductor chip CP (see FIGS. 3 to 5) mounted on the die pad DP via a die bonding material DB (see FIGS. 4 and 5); in addition, the semiconductor device PKG1 has a plurality of leads (terminals, external terminals) LD arranged around the semiconductor chip CP (die pad DP); the plurality of suspension leads TL (see FIGS. 3 and 5) are connected to the die pad DP); forming a molded package structure (PGK1) that extends through multiple unit areas/(areas between LFd in Y-direction) along a column of the lead frame, exposes portions of the prospective first leads (LD) in the unit area, and encloses the prospective second leads (TL) in the unit area; separating the column from an adjacent second column of the lead frame along the second direction to form first leads along the two opposite lateral sides of the unit area; and separating an electronic device of the unit area from the lead frame along the first direction/(Y-direction) to cut through the molded package structure (PGK1) and the prospective second leads (TL) to form second leads along the two opposite lateral ends (MRs3, MRs4) of the unit area (see Par.[0119] wherein the support members SPP around the device regions LFd are metal members integrally formed of the same metal material as the plurality of leads LD (see FIG. 12), the die pad DP (see FIG. 12) and the outer frames LFf; the support members SPP are cut off in the singulation process shown in FIG. 10 and separated from the device regions LFd; see Par.[0151] wherein in the sealing process, after the sealing body MR is formed, the connection sections of the gate resin MRgt (see FIG. 19) and the vent resin MRvt (see FIG. 19) connected to the sealing body MR are broken (i.e.; cut) to be separated from the main body of the sealing body MR (gate break process); see Par.[0177] wherein the plurality of leads LD are separated respectively, and parts other than the suspension leads TL (see FIGS. 23 and 25) are separated from the support member SPP).
With respect to claim 17, Takahashi discloses, in Figs.1-32, the method, wherein the lead frame has a thickness of 0.1 mm or more and 3.0 mm or less, and separating the column from an adjacent second column of the lead frame includes performing a punching process that forms the first leads along the two opposite lateral sides of the unit area (see Par.[0178], [0181] wherein as a method of dividing the plurality of leads LD, for example, the plurality of leads LD can be divided by press working using a punch (cutting blade) and a die (supporting member); the lead frame LF can be cut by press working using a punch (cutting blade) and a die (supporting member); see Par.[0069] wherein the length of the inclined section OLD3 of the lead LD is larger than half (e.g., 1.3 mm) of the thickness (e.g., 2.6 mm) of the sealing body MR).
With respect to claim 20, Takahashi discloses, in Figs.1-32, a lead frame, comprising: unit areas/(areas between LFd in Y-direction) arranged in an array with rows along a first direction/(Y-direction) and columns along an orthogonal second direction/(X-direction), the respective unit areas having a die attach pad (DP), prospective first leads (LD) along two opposite lateral sides (MRs1, MRs2) of the unit area that are spaced apart from one another along the first direction/(Y-direction), and prospective second leads (TL) along two opposite lateral ends (MRs3, MRs4) of the unit area that are spaced apart from one another along the second direction/(X-direction); first tie bars (LFtb) connected to the prospective first leads (LD) of the unit areas along a column of the array; second tie bars (LFtb) connected to the prospective second leads (TL) along adjacent rows of the array; and third tie bars (LFtb) connected between the die attach pad (DP) and an adjacent one of the second tie bars of the unit areas along the column of the array (see Fig.4, Par.[0072] wherein the semiconductor chip CP is mounted at the center of the upper surface DPt of the die pad DP; as shown in FIG. 5, the semiconductor chip CP is mounted on the die pad DP via the die bonding material (adhesive material) DB (see FIG. 4) in a state where a back surface CPb faces the upper surface DPt of the die pad DP; see Fig.11, wherein areas between LFd in Y-direction are shown; see Par.[0053]-[0054] wherein a semiconductor chip CP (see FIGS. 3 to 5) mounted on the die pad DP via a die bonding material DB (see FIGS. 4 and 5); in addition, the semiconductor device PKG1 has a plurality of leads (terminals, external terminals) LD arranged around the semiconductor chip CP (die pad DP); the plurality of suspension leads TL (see FIGS. 3 and 5) are connected to the die pad DP; see Par.[0053] wherein an exposed-surface connection section TLx of the suspension lead TL is not provided, but in order to clearly show the difference in height between the exposed-surface connection section TLx of the suspension lead TL and a die pad DP, the exposed-surface connection sections TLx are indicated by broken lines; see Par.[0122]-[0123] wherein each of the plurality of leads LD includes the outer lead section OLD provided outside the tie bar LFtb and the inner lead section ILD provided inside the tie bar LFtb).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 14, 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi in view Jeon et al. (US 2015/0371933 A1 hereinafter referred to as “Jeon”).
With respect to claim 14, Takahashi discloses, in Figs.1-32, the electronic device, wherein the second leads have a nonuniform thickness along the third direction and include a bottom side half etch pullback feature.
Moreover, regarding the limitation “include a bottom side half etch pullback feature”, it is submitted that such limitation does not further define the structure as instantly claimed, nor serve to distinguish over Takahashi. Therefore, the said claimed limitation is a “product by process” limitation. Applicant attention is thereby directed to the fact that a "product by process" claim is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); In re Marosi et al, 218 USPQ 289; and particularly In re Thorpe, 227 USPQ 964, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in "product by process" claims or not. Note that applicant has the burden of proof in such cases, as the above case law make clear.
However, Takahashi does not explicitly disclose the second leads have a nonuniform thickness along the third direction and include a bottom side half etch pullback feature.
Jeon discloses, in Figs.1-6A, the electronic device, wherein the second leads have a nonuniform thickness along the third direction and include a bottom side half etch pullback feature (see Par.[0063] wherein an outer portion of the die pad can recessed or half-etched and portions of the leads can be pulled back from the side surface of the package body; the portions that are pulled back can be filled with epoxy mold compound or can be exposed).
Takahashi and Jeon are analogous art because they are all directed to a package leadframe structure, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Takahashi to include Jeon because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the leads structure in Takahashi by including half-etched pull back lead as taught by Jeon in order to utilize half-etch pullback (HECB) in leadframes, particularly for QFN packages, so as a technique where the terminal ends are partially etched (usually on the bottom) to create a recessed, "pulled back" profile thereby to prevent solder bridging/burrs during singulation, improve soldering reliability, and reduce mechanical stress.
With respect to claim 18, Takahashi discloses all the claimed limitations of claim 17. However, Takahashi does not explicitly disclose the limitations of claim 18.
Jeon discloses, in Figs.1-6A, the method, wherein separating an electronic device of the unit area from the lead frame includes performing a saw or laser cutting process that cuts through the molded package structure and the prospective second leads to form the second leads along the two opposite lateral ends of the unit area (see Par.[0031] wherein as each lead is pressed and cut by the blade in the sawing process, the sawn surface is contaminated with metal burrs or contamination (e.g. copper) dispersed from each lead; see Par.[0034], [0042] wherein micro lead frame 100 as illustrated in FIGS. 1 and 3 is part of a matrix of multiple micro lead frames with portions of the other micro lead frames illustrated and delineated by sawing or singulation lines 42; this configuration reduces the likelihood that inner leads 10 are vertically tilted and deformed during subsequent processing such as during sawing or singulation processes; see Par.[0050] wherein FIG. 6 is an image showing a side view of a portion micro lead frame 100 in accordance with the present embodiment after a molding process and after the packaged electronic device is singulating using a singulation process (e.g., saw or punch)).
Takahashi and Jeon are analogous art because they are all directed to a package leadframe structure, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Takahashi to include Jeon because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the die packages singulation in Takahashi by including specific technique such as sawing and stamping/pressing during singulation thus reducing the likelihood that burrs produced during the singulation process through each lead bridge adjoining lead and causing electrical shorts.
With respect to claim 19, Jeon discloses, in Figs.1-6A, the method of claim 16, wherein: the electronic device has a package size of 1.2 mm x 1.2 mm or more and 20 mm x 20 mm or less; the electronic device has a package thickness of 0.25 mm or more and 5.0 mm or less; and separating an electronic device of the unit area from the lead frame includes performing a saw or laser cutting process that cuts through the molded package structure and the prospective second leads to form the second leads along the two opposite lateral ends of the unit area (see Par.[0005] wherein semiconductor packages referred to as near chip scale packages (CSP) that include very thin, fine pitch, and small area leadframes that approximate the size of the semiconductor chip. Such packages include the MicroLeadFrame° (MLF) style of packages, LFCSP, VQFN, and QFN—Quad Flat No-Lead packages. These packages typically have package body sizes in the 1 mm to 13 mm range and package heights in the 0.3 mm to 2.1 mm range; see Par.[0031] wherein as each lead is pressed and cut by the blade in the sawing process, the sawn surface is contaminated with metal burrs or contamination (e.g. copper) dispersed from each lead; see Par.[0034], [0042] wherein micro lead frame 100 as illustrated in FIGS. 1 and 3 is part of a matrix of multiple micro lead frames with portions of the other micro lead frames illustrated and delineated by sawing or singulation lines 42; this configuration reduces the likelihood that inner leads 10 are vertically tilted and deformed during subsequent processing such as during sawing or singulation processes; see Par.[0050] wherein FIG. 6 is an image showing a side view of a portion micro lead frame 100 in accordance with the present embodiment after a molding process and after the packaged electronic device is simulating using a singulation process (e.g., saw or punch)).
Citation of Pertinent Prior Art
The prior art made of record (e.g.; see PTO-892) and not relied upon is considered pertinent to applicant's disclosure.
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOULOUCOULAYE INOUSSA whose telephone number is (571)272-0596. The examiner can normally be reached Monday-Friday (10-18).
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/Mouloucoulaye Inoussa/ Primary Examiner, Art Unit 2818