DETAILED ACTION
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/25/2023 and 12/17/2025 has been considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1 and 2 require “A silicon carbide substrate comprising: a substrate made of silicon carbide…”. It appears that the limitations of “a silicon carbide substrate” and “a substrate made of silicon” are drawn to the same element.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, and 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Horiai et al. (JP2021088469A; on IDS).
Regarding independent claim 1, Horiai teaches a silicon carbide substrate comprising:
a substrate made of silicon carbide (para. 0006), wherein
an emission peak of the substrate at a wavelength of 650 to 750 nm is 4.5 times or more of an emission peak of the substrate at a wavelength of 385 to 408 nm in an electronic excitation (Fig. 6).
Regarding independent claim 2, Horiai teaches a silicon carbide substrate comprising:
a substrate made of silicon carbide (para. 0006),
wherein an integral value related to an emission peak of the substrate at a wavelength of 650 to 750 nm is 15 times or more of an integral value related to an emission peak of the substrate at a wavelength of 385 to 408 nm in an electronic excitation (Fig. 6).
Re claim 4, Horiai teaches wherein the substrate is an n-type substrate and has an impurity concentration within a range of 5.0×1018 cm-3 or more (para. 0037 which anticipates the claimed range of “5.0×1018 to 1.0×1020 cm-3” because a specific example in the prior art which is within the claimed range anticipates the range (MPEP 2131.03).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 is rejected under 35 U.S.C. 103 as being unpatentable over Horiai et al. (JP2021088469A; on IDS).
Re claim 3, while Horiai is silent with respect to “wherein the substrate has a specific resistance of 30 mΩ·cm or less”; per se, Horiai does teach that the substrate may be doped (para. 0037), which is inversely proportional to the specific resistance (higher doping results in lower specific resistance).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to optimize the doping levels such that “the substrate has a specific resistance of 30 mΩ·cm or less” as claimed for the purpose of providing the desired doping levels and/or specific resistance of the substrate for the intended device. When the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation (MPEP 2144.05, II).
Claim(s) 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Horiai et al. (JP2021088469A; on IDS) in view of Uehigashi (US Pub. 2019/025203; on IDS).
Re claim 5, Horiai teaches the dopant to be nitrogen; for example, but is silent with respect to other possible dopants.
Uehigashi teaches a SiC substrate containing impurities such as iron, niobium, titanium, tantalum, or vanadium for the purpose of shortening the lifetime of minority carriers (para. 0053).
It would have been obvious to one of ordinary skill in the art at the time of filing to further include such dopants within the substrate of Horiai to arrive at the claimed invention for the purpose of providing the same advantage of shortening the lifetime of minority carriers within the substrate of Horiai.
Re claims 6, 7, and 8, Horiai teaches a silicon carbide semiconductor device comprising: the silicon carbide substrate according to claim 1 (para. 0002), but is silent with respect to details of the device(s) to be made beyond the substrate.
Uehigashi teaches a silicon carbide semiconductor device (Fig. 1) comprising an epitaxial layer (2a or 2b; 2) formed on the silicon carbide substrate, wherein a part of the epitaxial layer has a thickness within a range of 4 to 40 μm (10µm – para. 0025) and has an impurity concentration of 1.0×1015 to 1.0×1019 cm-3 (para. 0025, 0028), wherein the epitaxial layer includes a buffer layer (2a or 2b) adjacent to the silicon carbide substrate (1) and a drift layer (2) positioned on the buffer layer, the buffer layer has an n-type impurity concentration of 1.0×1018 to 1.0×1019 cm-3 (para. 0028) and the drift layer has an n-type impurity concentration of 1.0×1015 to 5.0×1016 cm-3 (para. 0025), wherein a semiconductor element is formed, through which a current flows in a stacking direction of the silicon carbide substrate and the epitaxial layer (Fig. 1; para. 0039).
It would have been obvious to one of ordinary skill in the art at the time of filing to form the silicon carbide semiconductor device of Uehigashi on the substrate of Horiai for the purpose of providing a SiC-MOSFET as part of; for example, a power device (Uehigashi para. 0003).
Conclusion
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/MOLLY K REIDA/Examiner, Art Unit 2899