DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-18 are pending and are rejected.
Information Disclosure Statement
The information disclosure statements (IDSs) filled on 08/01/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Drawings
Drawings filled on 10/25/2023 are acceptable for examination purpose.
Claim Objections
Claim 12 is objected to because of the following informalities:
Claim 12 recites, an RF match, wherein the RF match includes at least one configurable impedance altering element
The phrase includes grammatical error because it is missing a semi colon “;” at the end and thus is incomplete. For the examination purpose, in broadest reasonable interpretation, the above described limitation is construed as, an RF match, wherein the RF match includes at least one configurable impedance altering element;
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3, 5-10, 12, 14 and 16-18 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Ulrich (US20200373127A1) [hereinafter Ulrich].
Regarding claim 1:
Ulrich discloses, A method of processing a substrate, comprising: [¶10: “method of manufacturing a semiconductor comprises placing a substrate in a plasma chamber configured to deposit a material layer onto the substrate or etch a material layer from the substrate; and carrying out the impedance matching steps of the method of matching an impedance described above.”];
delivering, by an RF generator, an RF signal to a processing volume of a processing chamber, [¶38: “the RF energy is typically introduced into the plasma chamber 19 through electrodes. Thus, the plasma can be energized by coupling RF power from an RF source 15 into the plasma chamber 19 to perform deposition or etching.”… ¶43: “The RF source 15 may be an RF generator of a type that is well-known in the art, and generates an RF signal at an appropriate frequency and power for the process performed within the plasma chamber 19.”];
wherein the delivering of the RF signal further comprises passing the RF signal through an RF match, [¶43: “The RF source 15 may be electrically connected to the RF input 13 of the RF impedance matching network 11 using a coaxial cable,”… ¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶42: “impedance matching network may be used to create an impedance match between the plasma chamber 19 and the RF source 15.”];
wherein the RF match includes at least one configurable impedance altering element; [¶42: “an impedance matching network may be used to create an impedance match between the plasma chamber 19 and the RF source 15.”… ¶45: “the RF impedance matching network 11 includes a series variable capacitor 31, a shunt variable capacitor 33, and a series inductor 35 to form an ‘L’ type matching network.”… ¶51: “The control circuit 45 is the brains of the RF impedance matching network 11, as it" “makes the calculations necessary to determine changes to the series and shunt variable capacitors 31, 33, and delivers commands to the series and shunt variable capacitors 31, 33 to create the impedance match.”];
…a sensor coupled to a transmission line disposed at an output of the RF match and a distance from an electrode disposed within the processing volume,… [¶40: “RF output sensor 49 can be connected between the RF impedance matching network 11 and the plasma chamber 19 so that the RF output from the impedance matching network, and the plasma impedance presented by the plasma chamber 19, may be monitored.”];
measuring in real-time, by a sensor coupled to a transmission line disposed at an output of the RF match and a distance from an electrode disposed within the processing volume, at least one electrical characteristic of the RF signal; [¶76: “the plasma impedance determination can be made using the output sensor 49 operably coupled to the RF output, the RF output sensor 49 configured to detect an RF output parameter. The RF output parameter can be any parameter measurable at the RF output 17, including a voltage, a current, or a phase at the RF output 17.”];
determining in real-time, at least one target electrical characteristic based upon a comparison between a calibrated electrical characteristic value and the measured electrical characteristic of the RF signal, [¶86: “the RF parameters may be measured at the RF output 17 by the RF output sensor 49,”… ¶76: “the control circuit 45 determines the plasma impedance presented by the plasma chamber 19 (step 502A).” “the plasma impedance determination can be made using the output sensor 49 operably coupled to the RF output, the RF output sensor 49 configured to detect an RF output parameter. The RF output parameter can be any parameter measurable at the RF output 17, including a voltage, a current, or a phase at the RF output 17.”… ¶77: “Once the variable impedance of the plasma chamber 19 is known, the control circuit 45 can determine the changes to make to the variable capacitances of one or both of the series and shunt EVCs 31, 33 for purposes of achieving an impedance match. Specifically, the control circuit 45 determines a first capacitance value for the series variable capacitance and a second capacitance value for the shunt variable capacitance (step 503A). These values represent the new capacitance values for the series EVC 31 and shunt EVC 33 to enable an impedance match, or at least a substantial impedance match. In the exemplified embodiment, the determination of the first and second capacitance values is based on the variable plasma impedance (determined in step 502A) and the fixed RF source impedance.”
Examiner notes that, Ulrich teaches, as described above, in real time determining capacitance to perform impedance match (target electrical characteristic) based on comparison between capacitance values required for impedance matching (calibrated electrical characteristic value) and measured plasma impedance (the measured electrical characteristic of the RF signal)];
wherein in the calibrated electrical characteristic value is selected to achieve at least one desired plasma processing parameter result; [¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶78: “Once the first and second capacitance values are determined, the control circuit 45 generates a control signal to alter at least one of the series variable capacitance and the shunt variable capacitance to the first capacitance value and the second capacitance value,”… ¶79: “This alteration of the EVCs 31, 33 takes about 9-11 μsec total,” “RF power profile 403 is shown decreasing, at just before t=56 μsec, from about 380 mV peak-to-peak to about 100 mV peak-to-peak. This decrease in the RF power profile 403 represents the decrease in the reflected power 407, and it takes place over a time period of about 10 μsec, at which point the match tune process is considered complete.”];
adjusting in real-time, a setting of the configurable impedance altering element of the RF match to achieve the target electrical characteristic based on the comparison; and [¶54: “the control circuit can alter the capacitance of these shunt variable capacitors 31A, 33A to cause an impedance match.”…¶77: “the determination of the first and second capacitance values is based on the variable plasma impedance (determined in step 502A) and the fixed RF source impedance.”…¶78: “Once the first and second capacitance values are determined, the control circuit 45 generates a control signal to alter at least one of the series variable capacitance and the shunt variable capacitance to the first capacitance value and the second capacitance value, respectively (step 504A).” “The control signal instructs the switching circuit to alter the variable capacitance of one or both of the series and shunt EVCs 31, 33”];
maintaining in real-time, the target electrical characteristic by controlling the setting of the configurable impedance altering element of the RF match. [¶78: “Once the first and second capacitance values are determined, the control circuit 45 generates a control signal to alter at least one of the series variable capacitance and the shunt variable capacitance to the first capacitance value and the second capacitance value, respectively (step 504A).” “The control signal instructs the switching circuit to alter the variable capacitance of one or both of the series and shunt EVCs 31, 33”… ¶80: “The altering of the series variable capacitance and the shunt variable capacitance can comprise sending a control signal to the series driver circuit 39 and the shunt driver circuit 43 to control the series variable capacitance and the shunt variable capacitance, respectively,” “When the EVCs 31, 33 are switched to their desired capacitance values, the input impedance may match the fixed RF source impedance (e.g., 50 Ohms), thus resulting in an impedance match. If, due to fluctuations in the plasma impedance, a sufficient impedance match does not result, the process of 500A may be repeated one or more times to achieve an impedance match, or at least a substantial impedance match.”].
Regarding claim 3:
Ulrich discloses, The method of claim 1, and
Ulrich further discloses, adjusting in real-time, the RF signal to achieve the target electrical characteristic. [¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶94: “From the beginning of the match tune process, which starts with the control circuit determining the variable impedance of the plasma chamber and determining the series and shunt match positions, to the end of the match tune process, when the RF power reflected back toward the RF source decreases, the entire match tune process of the RF impedance matching network using EVCs has an elapsed time of approximately 110 μsec, or on the order of about 150 μsec or less.”].
Regarding claim 5:
Ulrich discloses, The method of claim 1, and
Ulrich further discloses, adjusting in real-time, one or more process variable settings to achieve the target electrical characteristic. [¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶94: “the RF power profile 403 is shown decreasing, at just before t=56 μsec, from about 380 mV peak-to-peak to about 100 mV peak-to-peak. This decrease in the RF power profile 403 represents the decrease in the reflected power 407, and it takes place over a time period of about 10 μsec, at which point the match tune process is considered complete.”].
Regarding claim 6:
Ulrich discloses, The method of claim 1, and
Ulrich further discloses, the measuring in real-time of at least one electrical characteristic of the RF signal comprises measuring a voltage, current, phase, frequency, spectral component, harmonic, or combination thereof. [Examiner notes that claim requires only one of the features separated by “or,” and only one of them is given the patentable weight.
Ulrich discloses, measured electrical characteristics comprises one of a voltage, a current, or a phase as described below.
¶76: “the plasma impedance determination can be made using the output sensor 49 operably coupled to the RF output, the RF output sensor 49 configured to detect an RF output parameter. The RF output parameter can be any parameter measurable at the RF output 17, including a voltage, a current, or a phase at the RF output 17.”].
Regarding claim 7:
Ulrich discloses, The method of claim 1, and
Ulrich further discloses, the sensor is disposed within the RF match. [¶76: “the plasma impedance determination can be made using the output sensor 49 operably coupled to the RF output,”
Also see Ulrich fig. 3, sensor 49 is within matching network 11].
Regarding claim 8:
Ulrich discloses, The method of claim 1, and
Ulrich further discloses, the at least one desired plasma processing parameter result comprises an increase, or a reduction, of an etch rate, an ion flux, a heat flux, a power transfer level, a etch uniformity, or combination thereof. [Examiner notes that claim requires only one of the features separated by “or,” and only one of them is given the patentable weight.
Ulrich discloses, desired plasma processing parameter result comprises a power transfer level as described below.
¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶79: “This alteration of the EVCs 31, 33 takes about 9-11 μsec total,” “RF power profile 403 is shown decreasing, at just before t=56 μsec, from about 380 mV peak-to-peak to about 100 mV peak-to-peak. This decrease in the RF power profile 403 represents the decrease in the reflected power 407, and it takes place over a time period of about 10 μsec, at which point the match tune process is considered complete.”].
Regarding claim 9:
Ulrich discloses, The method of claim 1, and
Ulrich further discloses, wherein the setting of the configurable impedance altering element of the RF match differs from a setting of the configurable impedance altering element providing a maximum power transfer. [¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶79: “This alteration of the EVCs 31, 33 takes about 9-11 μsec total,” “RF power profile 403 is shown decreasing, at just before t=56 μsec, from about 380 mV peak-to-peak to about 100 mV peak-to-peak. This decrease in the RF power profile 403 represents the decrease in the reflected power 407, and it takes place over a time period of about 10 μsec, at which point the match tune process is considered complete.”… ¶80: “The altering of the series variable capacitance and the shunt variable capacitance can comprise sending a control signal to the series driver circuit 39 and the shunt driver circuit 43 to control the series variable capacitance and the shunt variable capacitance, respectively,” “When the EVCs 31, 33 are switched to their desired capacitance values, the input impedance may match the fixed RF source impedance (e.g., 50 Ohms), thus resulting in an impedance match.”
Examiner notes that, Ulrich teaches, RF matching is performed by altering the capacitance settings and the purpose of the RF matching is to achieve maximum power transfer possible].
Regarding claim 10:
Ulrich discloses, The method of claim 1, and
Ulrich further discloses, wherein the setting of the configurable impedance altering element of the RF match is a setting providing a maximum power transfer. [¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶79: “This alteration of the EVCs 31, 33 takes about 9-11 μsec total,” “RF power profile 403 is shown decreasing, at just before t=56 μsec, from about 380 mV peak-to-peak to about 100 mV peak-to-peak. This decrease in the RF power profile 403 represents the decrease in the reflected power 407, and it takes place over a time period of about 10 μsec, at which point the match tune process is considered complete.”
Examiner notes that, Ulrich teaches, RF matching is performed by altering the capacitance settings and the purpose of the RF matching is to achieve maximum power transfer possible];
Regarding claim 12:
Ulrich discloses, A plasma processing system, comprising: a processing chamber; [¶9: “a semiconductor processing tool comprises a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate; and an impedance matching network operably coupled to the plasma chamber,”… ¶37: “Referring to FIG. 1, a semiconductor device processing system 5 utilizing an RF generator 15 is shown. The system 10 includes an RF generator 15 and a semiconductor processing tool 12. The semiconductor processing tool 12 includes a matching network 11 and a plasma chamber 19.”];
a processing volume disposed within the processing chamber; [¶38: “A substrate 27 can be placed in the plasma chamber 19, where the plasma chamber 19 is configured to deposit a material layer onto the substrate 27 or etch a material layer from the substrate 27. Plasma processing involves energizing a gas mixture by imparting energy to the gas molecules by introducing RF energy into the gas mixture.”];
a radio frequency (RF) generator configured to deliver an RF signal; [¶38: “the RF energy is typically introduced into the plasma chamber 19 through electrodes. Thus, the plasma can be energized by coupling RF power from an RF source 15 into the plasma chamber 19 to perform deposition or etching.”… ¶43: “The RF source 15 may be an RF generator of a type that is well-known in the art, and generates an RF signal at an appropriate frequency and power for the process performed within the plasma chamber 19.”];
an RF match, wherein the RF match includes at least one configurable impedance altering element [¶42: “an impedance matching network may be used to create an impedance match between the plasma chamber 19 and the RF source 15.”… ¶45: “the RF impedance matching network 11 includes a series variable capacitor 31, a shunt variable capacitor 33, and a series inductor 35 to form an ‘L’ type matching network.”… ¶51: “The control circuit 45 is the brains of the RF impedance matching network 11, as it" “makes the calculations necessary to determine changes to the series and shunt variable capacitors 31, 33, and delivers commands to the series and shunt variable capacitors 31, 33 to create the impedance match.”];
a sensor, wherein the sensor is coupled to a transmission line disposed at an output of the RF match and a distance from an electrode disposed within the processing volume; [¶40: “RF output sensor 49 can be connected between the RF impedance matching network 11 and the plasma chamber 19 so that the RF output from the impedance matching network, and the plasma impedance presented by the plasma chamber 19, may be monitored.”];
at least one controller comprising a memory that includes computer-readable instructions stored therein, and the computer-readable instructions, when executed, in real-time, by a processor of the controller, cause: [¶30: “Processors described herein may be any central processing unit (CPU),” “configured for executing computer program instructions (e.g., code).”… ¶31: “Computer-executable instructions or programs (e.g., software or code) and data described herein may be programmed into and tangibly embodied in a non-transitory computer-readable medium that is accessible to and retrievable by a respective processor as described herein which configures and directs the processor to perform the desired functions and processes by executing the instructions encoded in the medium.”];
a delivery, by the RF generator, of the RF signal to the processing volume, [¶38: “the RF energy is typically introduced into the plasma chamber 19 through electrodes. Thus, the plasma can be energized by coupling RF power from an RF source 15 into the plasma chamber 19 to perform deposition or etching.”… ¶43: “The RF source 15 may be an RF generator of a type that is well-known in the art, and generates an RF signal at an appropriate frequency and power for the process performed within the plasma chamber 19.”];
wherein the delivery of the RF signal further comprises passing the RF signal through the RF match; [¶43: “The RF source 15 may be electrically connected to the RF input 13 of the RF impedance matching network 11 using a coaxial cable,”… ¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶42: “impedance matching network may be used to create an impedance match between the plasma chamber 19 and the RF source 15.”];
a measurement in real-time, by the sensor, of at least one electrical characteristic of the RF signal; [¶76: “the plasma impedance determination can be made using the output sensor 49 operably coupled to the RF output, the RF output sensor 49 configured to detect an RF output parameter. The RF output parameter can be any parameter measurable at the RF output 17, including a voltage, a current, or a phase at the RF output 17.”];
a determination in real-time, of at least one target electrical characteristic based upon a comparison between a calibrated electrical characteristic value and the measured electrical characteristic of the RF signal, [¶86: “the RF parameters may be measured at the RF output 17 by the RF output sensor 49,”… ¶76: “the control circuit 45 determines the plasma impedance presented by the plasma chamber 19 (step 502A).” “the plasma impedance determination can be made using the output sensor 49 operably coupled to the RF output, the RF output sensor 49 configured to detect an RF output parameter. The RF output parameter can be any parameter measurable at the RF output 17, including a voltage, a current, or a phase at the RF output 17.”… ¶77: “Once the variable impedance of the plasma chamber 19 is known, the control circuit 45 can determine the changes to make to the variable capacitances of one or both of the series and shunt EVCs 31, 33 for purposes of achieving an impedance match. Specifically, the control circuit 45 determines a first capacitance value for the series variable capacitance and a second capacitance value for the shunt variable capacitance (step 503A). These values represent the new capacitance values for the series EVC 31 and shunt EVC 33 to enable an impedance match, or at least a substantial impedance match. In the exemplified embodiment, the determination of the first and second capacitance values is based on the variable plasma impedance (determined in step 502A) and the fixed RF source impedance.”
Examiner notes that, Ulrich teaches, as described above, in real time determining capacitance to perform impedance match (target electrical characteristic) based on comparison between capacitance values required for impedance matching (calibrated electrical characteristic value) and measured plasma impedance (the measured electrical characteristic of the RF signal)];
wherein in the calibrated electrical characteristic value is selected to achieve at least one desired plasma processing parameter result; [¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶78: “Once the first and second capacitance values are determined, the control circuit 45 generates a control signal to alter at least one of the series variable capacitance and the shunt variable capacitance to the first capacitance value and the second capacitance value,”… ¶79: “This alteration of the EVCs 31, 33 takes about 9-11 μsec total,” “RF power profile 403 is shown decreasing, at just before t=56 μsec, from about 380 mV peak-to-peak to about 100 mV peak-to-peak. This decrease in the RF power profile 403 represents the decrease in the reflected power 407, and it takes place over a time period of about 10 μsec, at which point the match tune process is considered complete.”];
an adjustment in real-time, of a setting of an impedance altering element of the RF match to achieve the target electrical characteristic; [¶54: “the control circuit can alter the capacitance of these shunt variable capacitors 31A, 33A to cause an impedance match.”…¶77: “the determination of the first and second capacitance values is based on the variable plasma impedance (determined in step 502A) and the fixed RF source impedance.”…¶78: “Once the first and second capacitance values are determined, the control circuit 45 generates a control signal to alter at least one of the series variable capacitance and the shunt variable capacitance to the first capacitance value and the second capacitance value, respectively (step 504A).” “The control signal instructs the switching circuit to alter the variable capacitance of one or both of the series and shunt EVCs 31, 33”];
and maintenance in real-time, of the target electrical characteristic by controlling the setting of the impedance altering element of the RF match. [¶78: “Once the first and second capacitance values are determined, the control circuit 45 generates a control signal to alter at least one of the series variable capacitance and the shunt variable capacitance to the first capacitance value and the second capacitance value, respectively (step 504A).” “The control signal instructs the switching circuit to alter the variable capacitance of one or both of the series and shunt EVCs 31, 33”… ¶80: “The altering of the series variable capacitance and the shunt variable capacitance can comprise sending a control signal to the series driver circuit 39 and the shunt driver circuit 43 to control the series variable capacitance and the shunt variable capacitance, respectively,” “When the EVCs 31, 33 are switched to their desired capacitance values, the input impedance may match the fixed RF source impedance (e.g., 50 Ohms), thus resulting in an impedance match. If, due to fluctuations in the plasma impedance, a sufficient impedance match does not result, the process of 500A may be repeated one or more times to achieve an impedance match, or at least a substantial impedance match.”].
Regarding claim 14:
Ulrich discloses, The plasma processing system of claim 12, and
Ulrich further discloses, an adjustment in real-time, of the RF signal to achieve the target electrical characteristic. [¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶94: “From the beginning of the match tune process, which starts with the control circuit determining the variable impedance of the plasma chamber and determining the series and shunt match positions, to the end of the match tune process, when the RF power reflected back toward the RF source decreases, the entire match tune process of the RF impedance matching network using EVCs has an elapsed time of approximately 110 μsec, or on the order of about 150 μsec or less.”].
Regarding claim 16:
Ulrich discloses, The plasma processing system of claim 12, and
Ulrich further discloses, an adjustment in real-time, of one or more process variable settings to achieve the target electrical characteristic. [¶41: “the RF impedance matching network 11 serves to help maximize the amount of RF power transferred from the RF source 15 to the plasma chamber 19 by matching the impedance at the RF input 13 to the fixed impedance of the RF source 15.”… ¶94: “the RF power profile 403 is shown decreasing, at just before t=56 μsec, from about 380 mV peak-to-peak to about 100 mV peak-to-peak. This decrease in the RF power profile 403 represents the decrease in the reflected power 407, and it takes place over a time period of about 10 μsec, at which point the match tune process is considered complete.”].
Regarding claim 17:
Ulrich discloses, The plasma processing system of claim 12, and
Ulrich further discloses, the measurement in real-time of at least one electrical characteristic of the RF signal comprises a measurement of a voltage, current, phase, frequency, spectral component, harmonic, or combination thereof. [Examiner notes that claim requires only one of the features separated by “or,” and only one of them is given the patentable weight.
Ulrich discloses, measured electrical characteristics comprises one of a voltage, a current, or a phase as described below.
¶76: “the plasma impedance determination can be made using the output sensor 49 operably coupled to the RF output, the RF output sensor 49 configured to detect an RF output parameter. The RF output parameter can be any parameter measurable at the RF output 17, including a voltage, a current, or a phase at the RF output 17.”].
Regarding claim 18:
Ulrich discloses, The plasma processing system of claim 12, and
Ulrich further discloses, wherein the sensor is disposed within the RF match. [¶76: “the plasma impedance determination can be made using the output sensor 49 operably coupled to the RF output,”
Also see Ulrich fig. 3, sensor 49 is within matching network 11].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filling date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
Determining the scope and contents of the prior art.
Ascertaining the differences between the prior art and the claims at issue.
Resolving the level of ordinary skill in the pertinent art.
Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2, 4, 13 and 15 and is/are rejected under 35 U.S.C. 103 as being unpatentable over Ulrich and further in view of SATO et al. (US20080237031A1) [hereinafter SATO].
Regarding claim 2:
Ulrich discloses, The method of claim 1, but doesn’t explicitly disclose, and
SATO discloses, wherein the calibrated electrical characteristic value is stored in a memory of a controller. [¶77: “The set power level 424 a may be stored in the storage unit 416 of the generator control unit 400”… ¶83: “The matching unit 104, which is configured by an inductor or a capacitor, matches the impedance between the radio frequency generator 200 and the chamber 300. By matching the impedance with the matching unit 104, reflection of the radio frequency power from the radio frequency generator 200 is suppressed so that the radio frequency power can be efficiently transmitted to an electrode (not shown) in the chamber 300.”];
Therefore, it would have been obvious to one of ordinary skill in the art before the filling date of the claimed invention to have combined the capability of storing the calibrated electrical characteristic value in a memory of a controller in order to significantly reducing calibration time and to have the additional advantage of suppressing the reflection of the RF power to efficiently transmit the RF power through the impedance matching technique taught by SATO with the method taught by Ulrich as discussed above in order to have reasonable expectation of success such as to significantly reducing calibration time and to have the additional advantage of suppressing the reflection of the RF power to efficiently transmit the RF power through the impedance matching technique [SATO: ¶42: “capable of significantly reducing time to calibrate output power of a radio frequency generator,”… ¶83: “By matching the impedance with the matching unit 104, reflection of the radio frequency power from the radio frequency generator 200 is suppressed so that the radio frequency power can be efficiently transmitted to an electrode (not shown) in the chamber 300.”].
Regarding claim 4:
Ulrich discloses, The method of claim 1, but doesn’t explicitly disclose, and
SATO further discloses, determining in real-time, one or more process variable settings corresponding to the calibrated electrical characteristic value of the RF signal; and storing the one or more process variable settings in a memory of a controller. [¶77: “The power control unit 220 controls the target output power level based on the set power level 424 a and offset level 424 b of the power supply control signal 420 transmitted in a digital form from the generator control unit 400. The set power level 424 a and the offset level 424 b are stored in a storage unit (not shown) such as a memory or the like installed in the power control unit 220.”].
Regarding claim 13:
Ulrich discloses, The plasma processing system of claim 12, but doesn’t explicitly disclose, and
SATO discloses, further comprising a storage, of the calibrated electrical characteristic value, in the memory of the controller. [¶77: “The set power level 424 a may be stored in the storage unit 416 of the generator control unit 400”… ¶83: “The matching unit 104, which is configured by an inductor or a capacitor, matches the impedance between the radio frequency generator 200 and the chamber 300. By matching the impedance with the matching unit 104, reflection of the radio frequency power from the radio frequency generator 200 is suppressed so that the radio frequency power can be efficiently transmitted to an electrode (not shown) in the chamber 300.”];
Therefore, it would have been obvious to one of ordinary skill in the art before the filling date of the claimed invention to have combined above described teachings of SATO with the method taught by Ulrich as discussed above for the similar reasons as described above in claim 2.
Regarding claim 15:
Ulrich discloses, The plasma processing system of claim 12, but doesn’t explicitly disclose, and
SATO further discloses, a determination in real-time, of one or more process variable settings corresponding to the calibrated electrical characteristic value of the RF signal; and storage, of the one or more process variable settings, in the memory of the controller. [¶77: “The power control unit 220 controls the target output power level based on the set power level 424 a and offset level 424 b of the power supply control signal 420 transmitted in a digital form from the generator control unit 400. The set power level 424 a and the offset level 424 b are stored in a storage unit (not shown) such as a memory or the like installed in the power control unit 220.”];
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ulrich and further in view of JIN et al. (US20230207294A1) [hereinafter JIN].
Regarding claim 11:
Ulrich discloses, The method of claim 1, but doesn’t explicitly disclose, and
JIN discloses, wherein determining the calibrated electrical characteristic value comprises a use of a calibration substrate that is disposed within the processing volume and is configured to detect one or more plasma processing parameters, [¶64: “The controller 140 may calculate and obtain an electrical boundary condition in the plasma edge boundary region EB based on the electrical signal data obtained by the sensor 120 and output the first control signal S1 to the plasma control circuit 130 in order to obtain a desired electrical boundary condition (reflection amount).”… ¶47: “The plasma control circuit 130” “to change the electrical boundary condition in the plasma edge boundary region EB in response to the first control signal S1 input from the controller 140. The plasma control circuit 130 may control characteristic impedance of the edge region PS2 of the plasma” “to control the electrical boundary condition in the plasma edge boundary region EB.”… ¶54: “the plasma control circuit 130 may include an impedance control circuit configured to control an electrical boundary condition in the plasma edge boundary region EB of the first frequency component,”… ¶57: “A capacitance of the first variable capacitor Cv1 may be varied by a first control signal S11 from the controller 140 to determine impedance Zh1 of the fundamental frequency resonance circuit.”
Examiner notes that, JIN discloses, use of a substrate disposed for which edge boundary conditions (plasma processing parameters) are detected];
wherein the one or more plasma processing parameters correlate to the at least one desired plasma processing parameter result. [¶47: “The plasma control circuit 130” “to change the electrical boundary condition in the plasma edge boundary region EB in response to the first control signal S1 input from the controller 140. The plasma control circuit 130 may control characteristic impedance of the edge region PS2 of the plasma” “to control the electrical boundary condition in the plasma edge boundary region EB.”… ¶54: “the plasma control circuit 130 may include an impedance control circuit configured to control an electrical boundary condition in the plasma edge boundary region EB of the first frequency component,”… ¶57: “A capacitance of the first variable capacitor Cv1 may be varied by a first control signal S11 from the controller 140 to determine impedance Zh1 of the fundamental frequency resonance circuit.”
Examiner notes that, JIN discloses, use of a substrate disposed for which desired edge boundary conditions are determined correlated to the detected edge boundary conditions];
Therefore, it would have been obvious to one of ordinary skill in the art before the filling date of the claimed invention to have combined the capability of determining the calibrated electrical characteristic value comprises a use of a calibration substrate that is disposed within the processing volume and is configured to detect one or more plasma processing parameters, wherein the one or more plasma processing parameters correlate to the at least one desired plasma processing parameter result in order to provide improved plasma uniformity within a plasma chamber taught by JIN with the method taught by Ulrich as discussed above in order to have reasonable expectation of success such as to provide improved plasma uniformity within a plasma chamber [JIN: ¶4: “to provide improved plasma uniformity within a plasma chamber”].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is listed in the PTO-892 Notice of Reference Cited document.
Lyndaker et al. (US20170194130A1) - Control of etch rate using modeling, feedback and impedance match:
¶11: a model of a portion of a plasma system is generated by a processor. A variable is determined at an output of the model. Based on the variable, a parameter, e.g., an etch rate, a deposition rate, gamma, etc., is determined. The calculated parameter is compared with a pre-determined parameter to determine whether there is a match between the calculated parameter and the pre-determined parameter. Upon determining that there is no match, a capacitance of a variable capacitor within an impedance matching circuit and/or an inductance of a variable inductor within the impedance matching circuit is changed to achieve the match. When the match is achieved, uniformity of plasma within a plasma chamber increases.
York et al. (US20120074844A1) - Signal generation system:
¶11: signal generator for generating an electrical signal at a predetermined frequency; an impedance matching circuit, the electrical signal being supplied from the signal generator via the impedance matching circuit to a reactive load in use; and an impedance matching control system for detecting the electrical signal between the signal generator and the reactive load and for adjusting the impedance matching circuit to achieve a predetermined condition.
Marakhtanov et al. (US20170103870A1) - Uniformity control circuit for use within an impedance matching circuit:
¶6: To change uniformity of plasma, e.g., to provide uniformity in etch rate, etc., a uniformity control circuit (UCC) is provided within an impedance matching circuit (IMC). The UCC is controlled either manually or via an actuator to change a characteristic of the UCC. The change in the characteristic of the UCC is made to simultaneously achieve one or more parameters, e.g., uniformity in etch rate, isolation from a megahertz signal that is being transferred in a circuit adjacent to the UCC, a desired amount of delivered power, etc.
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/KAMINI S SHAH/Supervisory Patent Examiner, Art Unit 2116
/M.S./
Patent Examiner,
Art Unit 2116