DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 6/4/26 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2015/0063037) in view of Gonzalez (US 2014/0062559) and Hwang (US 2007/0025155).
Regarding claim 1, Lee discloses a flash memory comprising: a memory cell array having a plurality of memory cells (see Figure 3); a read recovery voltage generator configured to provide a read recovery voltage to the plurality of memory cells (not shown, but implied by voltages of read recovery shown in Figures 4 and 6 for example); and wherein the read recovery voltage generator controls the falling slope during a read recovery (T5-T6).
Lee fails to teach specifically how this voltage is generated or controlled and therefore fails to teach the read recovery voltage generator includes a plurality of ground pass transistors that, during a read recovery operation, are configured to control the falling slope of the unselection recovery voltage provided to an unselected word line in response to the recovery control signals wherein a source of each of the plurality of ground pass transistors is configured to provide an ungated discharge path to a ground terminal.
However, the use of a plurality of ground pass transistors to selectively control a discharge rate (slope) of a signal line was known in the art (see Gonzalez, Figure 2, paragraph 0042). Furthermore, Hwang teaches it was known to those of ordinary skill that controlling the rate of change of charge on a signal line controls the capacitive coupling to nearby signal lines (see paragraph 0026 for example).
Therefore, it would have been obvious to one having ordinary skill at the time of filing to provide ground pass transistors controlled by signals in order to control the slope of the unselected word line to control the capacitive coupling with nearby signal lines.
Regarding claim 2, Lee discloses the flash memory of claim 1, wherein the plurality of ground pass transistors are connected in parallel between the unselected word line and a ground terminal (see Cheng Figure 5, 564’s), and the read recovery voltage controller is configured to control the falling slope of the unselection recovery voltage by providing ground control signals (Discharge code) to gates of respective ground pass transistors.
Regarding claim 3, Lee discloses the flash memory of claim 2, wherein the read recovery voltage controller is configured to control the falling slope of the unselection recovery voltage by adjusting a number of ground pass transistors having discharge paths to the ground terminal (this is what the control signals do—control the number of transistors connecting the output to ground).
Regarding claims 9, 10, Lee fails to teach the read recovery voltage controller is configured to differently control the falling slope of the unselection recovery voltage according to a mat ( word line height) of the memory cell array. However, as taught by Hwang, slope control as a means for coupling control within a device was well known to those of ordinary skill at the time of filing (see above). Further, the Examiner takes official notice that the position of various lines within the device (i.e. which mat or which level) also was known to directly effect coupling. Therefore, it would have been obvious to one having ordinary skill at the time of filing to adjust the slope based on these parameters since it has been held that optimizing a result effect variable requires only routine skill in the art.
Allowable Subject Matter
Claims 4-8 and 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims—see previous notes regarding allowability.
Claims 11-17 and 21-23 are allowed.
The following is an examiner’s statement of reasons for allowance: the record makes clear the reasons for allowance—see previous indication of allowability and interview summary.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS KING whose telephone number is (571)272-2311. The examiner can normally be reached M-F: 9:00AM-5:30PM.
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/DOUGLAS KING/Primary Examiner, Art Unit 2824