Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, Species VI in the reply filed on 5/27/26 is acknowledged.
Claims 15-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected method, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 5/27/26.
Priority
It is noted that Figures 65A-79D are not presented in applications 17/174064 or 17/510807 from which the instant application is a CIP. Therefore the subject matter in these figures are not given the priority date of the parent applications.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 7-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Iwai et al. (US Patent 10,985,176).
Claim 1: Iwai teaches a three-dimensional memory device, comprising: alternating stacks of insulating layers (132,232) and electrically conductive layers (146,246) that alternate along a vertical direction, laterally extending along a first horizontal direction (hd1), and laterally spaced apart along a second horizontal direction (hd2) that is perpendicular to the first horizontal direction by lateral isolation trenches; memory stack structures (55) vertically extending through a respective one of the alternating stacks and comprising a respective vertical semiconductor channel (60L) and a respective vertical stack of memory elements at levels of the electrically conductive layers; and isolation trench fill structures (79U) located in the lateral isolation trenches, wherein: at least one of the isolation trench fill structures comprises a first lengthwise sidewall and a second lengthwise sidewall that generally extend along the first horizontal direction and that are laterally spaced apart from each other along the second horizontal direction; the first lengthwise sidewall has a first periodic lateral undulation with a uniform pitch along the first horizontal direction; and the second lengthwise sidewall has a second periodic lateral undulation with the uniform pitch along the first horizontal direction (Figs.11B-H).
Claim 7: Iwai teaches (Figs.11B-H) the isolation trench fill structures vertically extend from a first horizontal plane including a bottommost surface of the alternating stacks to a second horizontal plane including a topmost surface of the alternating stacks.
Claim 8: Iwai teaches (Figs.11B-H) the first lengthwise sidewall has the first periodic lateral undulation along the second horizontal direction at each level of the electrically conductive layers.
Claim 9: Iwai teaches (Figs.11B-H, 20B-C, 21A-D) the first lengthwise sidewall has the first periodic lateral undulation along the second horizontal direction at each level of the insulating layers except a level of topmost insulating layers within the alternating stacks.
Claim 10: Iwai teaches (Figs.11B-H, 20B-C, 21A-D) the first lengthwise sidewall comprises a straight sidewall segment that is parallel to the first horizontal direction at the level of the topmost insulating layers within the alternating stacks.
Claim 11: Iwai teaches (Figs.11B-H, 20B-C, 21A-D) the first lengthwise sidewall consists of first surface segments of an insulating material portion; and the second lengthwise sidewall consist of second surface segments of the insulating material portion.
Claim 12: Iwai teaches (Figs.11B-H, 20B-C, 21A-D) the insulating material portion comprises an insulating spacer that laterally surrounds a backside contact via structure that contacts a top surface of a semiconductor material layer that underlies the alternating stacks.
Claim 13: Iwai teaches (Figs.11B-H, 20B-C, 21A-D) the backside contact via structure comprises: a pair of laterally-undulating lengthwise sidewalls that vertically extend at least from a horizontal plane including bottom surfaces of topmost insulating layers of the alternating stacks to a horizontal plane including bottom surfaces of bottommost insulating layers of the alternating stacks; and a pair of straight lengthwise sidewalls located entirely above the horizontal plane including the bottom surfaces of the topmost insulating layers of the alternating stacks.
Claim 14: Iwai teaches (Figs.11B-H, 20B-C, 21A-D) a layer contact via structures vertically extending through a respective subset of layers within a respective alternating stack of the alternating stacks and contacting a top surface of a respective electrically conductive layer within the respective alternating stack.
Allowable Subject Matter
Claims 2-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art of record does not teach the subject matter of claim 2. Claims 3-6 depend on claim 2.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARAH KATE SALERNO whose telephone number is (571)270-1266. The examiner can normally be reached M-F 6:30am-2:30pm.
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/SARAH K SALERNO/Primary Examiner, Art Unit 2814
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