Prosecution Insights
Last updated: April 19, 2026
Application No. 18/495,602

STACKED WAFER AND DICING METHOD OF STACKED WAFER

Non-Final OA §102§103
Filed
Oct 26, 2023
Examiner
BRADFORD, PETER
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Canon Kabushiki Kaisha
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
84%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
586 granted / 733 resolved
+11.9% vs TC avg
Minimal +4% lift
Without
With
+4.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
42 currently pending
Career history
775
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
41.1%
+1.1% vs TC avg
§102
24.3%
-15.7% vs TC avg
§112
32.5%
-7.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 733 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restriction Pursuant to the election of invention I without traverse on February 9, 2026, claim 10 is withdrawn from consideration. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-8 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Chang, US 2016/0377513 A1. Claim 1: Chang discloses a first layer (810) in which a modified region (1050/250) is formable; “the first weakening structure 250 having a high aspect ratio is formed by plasma etching and such dry etching technique. Of course, in other embodiments, the etching step here may be replaced by the stealth laser cutting technique of U.S. Pat. No. 6,992,026 or partial ion implantation and heat treatment and such related modification method.” [0044]. a concave portion (1040) forming a space that faces the first layer; a second layer (identified as 230 in FIG. 1B) that is a layer facing the concave portion and in which the modified region is not formed; and a third layer (1020) that is a layer facing the second layer and in which the modified region is formable, wherein a part of the second layer facing the concave portion is removed (FIG. 10). PNG media_image1.png 442 726 media_image1.png Greyscale Claim 2: the second layer includes a first portion that faces the hollow portion and that defines a region of the hollow portion and a second portion that does not face the hollow portion, and the part of the second layer is a part of the first portion. PNG media_image2.png 442 726 media_image2.png Greyscale Note that “the part of the second layer is a part of the first portion”, referring to “the part of the second layer is a part of the first portion” from claim 1. This is a product-by-process limitation, which only requires the resulting structure, which in this case is a place where there is no second layer but there could have been a second layer before. Claim 3: removal of the part of the second layer exposes the third layer to the hollow portion. PNG media_image3.png 442 726 media_image3.png Greyscale Note that “the part of the second layer is a part of the first portion”, referring to “the part of the second layer is a part of the first portion” from claim 1. This is a product-by-process limitation, which only requires the resulting structure, which in this case is a place where there is no second layer but there could have been a second layer before. Claim 4 recites that “in a case where a direction in which a plurality of terminals are aligned in the hollow portion is referred to as X direction, a thickness direction of the stacked wafer is referred to as Z direction, and a direction orthogonal to the X direction and the Z direction is referred to as Y direction, the part of the second layer is removed along a dicing line in the X direction.” This claim does not affirmatively recite a plurality of terminals aligned this way, but states what would be the case “in case where” there are such terminals. Thus, this is optional under claim 4, and thus does not distinguish over Chang. Claim 5 recites that “in a case where a direction in which a plurality of terminals are aligned in the hollow portion is referred to as X direction, a thickness direction of the stacked wafer is referred to as Z direction, and a direction orthogonal to the X direction and the Z direction is referred to as Y direction, a distance between an end portion of a region of the hollow portion and the part of the second layer in the Y direction is a predetermined distance.” This claim does not affirmatively recite a plurality of terminals aligned this way, but states what would be the case “in case where” there are such terminals. Thus, this is optional under claim 5, and thus does not distinguish over Chang. Claim 6 recites that the second layer includes a Silicon On Insulator (SOI) layer and an oxide film, and the SOI layer is removed by removal of the part of the second layer. This is a product-by-process limitation. The structure includes a wafer 1020 with second layer (230) on it, which may be silicon oxide ([0036]). The remaining element, an SOI layer, would be removed in the method of claim 6, and thus the structure of Chang can correspond to the resulting structure. Claim 7 recites that the oxide film is removed by removal of the part of the second layer. The resulting structure is that oxide film is removed. The examiner interprets claim 7 to encompass that the oxide film can be part or all of the second layer. Alternatively, claim 7 could correspond to a case in which the top of 230 is the second layer, and a bottom of 230 would be the oxide film of an SOI. In either case, the structure of Chang could correspond to the resulting structure of claim 7. Claim 8 recites that the oxide film is not removed by removal of the part of the second layer. This can read on a case in which the layer 226 (see FIG. 3A) corresponds to the oxide film of the SOI layer, which is not removed. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Chang in view of Yuk, US 2020/0240933 A1. Yuk discloses cover layers 160 and 260 which are to protect the device ([0067], [0075]). It would have been obvious to have had such layers in Chang for this purpose. In Chang in view of Yuk, this plurality of layers would not be removed, would not face the hollow portion, and would not have the modified region, as the modified region 1050 is formed in the central part of the device. PNG media_image4.png 354 492 media_image4.png Greyscale Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure and is listed in the attached Notice of References Cited: Brockmeier, US 2021/0253421 A1, FIG. 2C discloses many elements claimed, including a hollow portion and modified region 36. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER BRADFORD whose telephone number is (571)270-1596. The examiner can normally be reached 10:30-6:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469.295.9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PETER BRADFORD/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Oct 26, 2023
Application Filed
Feb 21, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
84%
With Interview (+4.1%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 733 resolved cases by this examiner. Grant probability derived from career allow rate.

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