DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10.27.2023 is being considered by the examiner.
The listing of references in the specification is not a proper information disclosure statement. 37 CFR 1.98(b) requires a list of all patents, publications, or other information submitted for consideration by the Office, and MPEP § 609.04(a) states, "the list may not be incorporated into the specification but must be submitted in a separate paper." Therefore, unless the references have been cited by the examiner on form PTO-892, they have not been considered. See [0003].
Specification
The amendment filed 10.27.2023 is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows: the abstract was amended in a manner where the narrow term “consisting” was replaced by the broader term “including” which constitutes broadening the scope of the Abstract and therefore constitutes new matter. See MPEP 2111.03.
Applicant is required to cancel the new matter in the reply to this Office Action.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 1, the claim was amended in a manner where the narrow term “consisting” was replaced by the broader term “including” which constitutes broadening the scope of the claim and therefore constitutes new matter. See MPEP 2111.03.
No evidence for supporting this broadening was found in the original disclosure. Hence, the examiner deems it necessary to raise the instant rejection. None of the dependent claims 2-10 correct this deficiency.
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Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1-10, the claims are generally narrative and indefinite, failing to conform with current U.S. practice. They appear to be a literal translation into English from a foreign document and are replete with grammatical and idiomatic errors.
For example, non-exhaustive list: claim 1 is narrative and lacks indentations, “the first metallic chemical layer” in claims 2-3 lacks proper antecedent basis, and “the silicon substrate” in claims 2-3 lacks proper antecedent basis.
Regarding claim 1, “the main chemical constituent of the first layer” in line 5 lacks proper antecedent basis, “this first layer” in line 5 is unclear, narrative and should read –the first layer--, “the stoichiometry” in lines 14-15 lacks proper antecedent basis.
The limitations “a first layer of a metallic chemical constituent” and “the main chemical constituent of the first layer” are indefinite as it is unclear if the metallic chemical constituent is the same or different to the main chemical constituent of a same first layer.
The limitation “a protective layer including a main chemical constituent different from the main chemical constituent of the first layer” conflicts with the specification which renders the claim indefinite in view of MPEP 2173.03. The only example material disclosed for the protective layer (3) in the specification/drawings is TiN (see, e.g., Fig. 3) and in this case, it is unclear which of Ti and N would be the main chemical constituent. Since the claim and the specification have an inconsistency, the claim is considered indefinite per MPEP 2173.03.
The limitation “an additional layer comprising a main chemical constituent different from or equivalent to or of equivalent size to the main chemical constituent of the first layer” is indefinite. First, “equivalent size” appears to fall within the scope of “equivalent” and the scope of the claim is obscured by including both in alternative form. Second, “equivalent” appears to be a relative term and as such, it is unclear when two elements are or stop being equivalent, for example; are Au and Ag “equivalent” because they are metals or are they non-equivalent because they are not same element? Third, it is unclear what “equivalent size” refers to, for example: is it layer thickness? Is it atomic radius? Other?
None of dependent claims 2-10 address these deficiencies.
Regarding claims 2 and 3, “the first metallic chemical layer” and “the silicon substrate” lack proper antecedent basis.
Regarding claim 4, “a protective layer” is indefinite as it is unclear if it refers to a/the protective layer of claim 1 or other. Dependent claim 5 inherits the same deficiency.
Regarding claim 6, “the additional layer comprises a main chemical constituent” is unclear in view of “an additional layer comprising a main chemical constituent” of claim 1; do they refer to the same main chemical constituent?
Regarding claim 7, “a first layer of a metallic chemical constituent” is unclear in view of “a first layer of a metallic chemical constituent” of claim 1; do they refer to the same elements? In addition, “the silicon substrate” lacks proper antecedent basis. Dependent claims 8-10 inherit the same deficiencies.
Regarding claim 9, “a first (is this different from the heat treatments of claim 1?) heat treatment operation is carried out at a (is this different from the one of claim 1?) first defined temperature in order to generate a cobalt silicide according to a (is this different from the one of claim 1?) first stoichiometry with two cobalt atoms and one silicon atom, in that, in a third step of the method, a second (is this different from the heat treatments of claim 1?) heat treatment operation is carried out at a temperature equivalent (what does it mean to be equivalent vs non-equivalent? Is 1000C equivalent to 1005C?) to or greater than the first (defined or other?) temperature to generate a cobalt silicide according to a second stoichiometry with one cobalt atom and one silicon atom, in that, in a fourth step of the method, the additional layer, the protective layer and any remaining first layer are removed by wet etching, and in that wherein, in a final step of the method, a third (is this different from the heat treatments of claim 1? ) heat treatment is carried out at a temperature greater than the previous heat treatment temperatures (does this include the ones of claim 1 too?) to generate a cobalt silicide according to a third stoichiometry with one cobalt atom and two silicon atoms” is indefinite in view of the emphasis and comments added. Dependent claim 10 inherits the same deficiencies.
Regarding claim 10, “a temperature of the order of” 350°C/375°C/ 550°C is indefinite as it is unclear what qualifies to be within “the order of” at what doesn’t. For example, does 365°C qualify as being of the order of either of both of 350°C and 375°C? Does it refer to multiples of the claimed temperatures? Other?
Claim Rejections - 35 USC § 102 and 35 USC § 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gulari et al. (US 20060163671 A1).
Regarding claim 1, Gulari discloses a method for producing an integrated circuit free from defects or dislocations at the end of the method, for (Fig. 5) which a first layer (222, [0058]) of a metallic chemical constituent (Cobalt) is initially deposited on at least one silicon semiconductor substrate (100, [0046]), and a protective layer (232) including a main chemical constituent (W in [0059] or TiN in [0066]) different from the main chemical constituent of the first layer (222, which is Co) is deposited on this first layer (222), wherein an additional layer (242) comprising a main chemical constituent ([0059]) different from ([0059]) or equivalent to ([0059]) or of equivalent size to the main chemical constituent (Cobalt) of the first layer (222) is deposited on the protective layer (232), in that wherein, in a subsequent step of the method, a heat treatment operation ([0060]) is carried out at a first defined temperature in order to generate a silicide ([0008] “cobalt monosilicide film (e.g., CoSi)”) including the main constituent (Co) of the first layer (222) and silicon according to a first stoichiometry (cobalt monosilicide), in that wherein, in a subsequent step of the method, the additional layer (242) and the protective layer (232) are removed by a wet etching operation ([0045], [0061]), and in a final step of the method, a further heat treatment operation ([0062]) is carried out at a second defined temperature higher than the first defined temperature ([0060] vs [0062]) in order to change the stoichiometry of the previously created silicide ([0008] cobalt monosilicide becomes cobalt disilicide).
Regarding claim 2, Gulari discloses the method for producing an integrated circuit according to claim 1, wherein the first metallic chemical layer (222), which comprises cobalt ([0058]) or nickel or titanium, is deposited on one face of the silicon substrate (100) by a PVD method ([0058]).
Regarding claim 3, Gulari discloses the method for producing an integrated circuit according to claim 1, wherein the first metallic chemical layer (222), which is composed of cobalt ([0058]), is deposited on one face of the silicon substrate (100) by a PVD method ([0058]).
Regarding claim 4, Gulari discloses the method for producing an integrated circuit according to claim 1, wherein a protective layer (232), which is adapted to (MPEP 2112 and/or 2114) act as a diffusion barrier, is deposited ([0059]).
Regarding claim 5, Gulari discloses the method for producing an integrated circuit according to claim 4, wherein the protective layer (232), which is composed of titanium nitride ([0066]), is deposited on the first layer (222), which is composed of cobalt ([0058]).
Regarding claim 6, Gulari discloses the method for producing an integrated circuit according to claim 1, wherein the additional layer (242) comprises a main chemical constituent (metal, [0059]) equivalent (as a metallic property) to the main chemical constituent of the first layer (222, [0058]).
Regarding claim 7, Gulari discloses the method for producing an integrated circuit according to claim 1, wherein, in a first step of the method, a first layer (222) of a metallic chemical constituent, which is cobalt ([0058]), is deposited on one face of the silicon substrate (100), in that the protective layer (232) of titanium nitride ([0066]) is deposited on the first layer (222), and in that wherein the additional layer (242) is deposited on the protective layer (232).
Regarding claim 8, Gulari discloses the method for producing an integrated circuit according to claim 7, wherein the additional layer (242), comprising cobalt ([0063], [0066]), is deposited on the protective layer (232).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Gulari et al. (US 20060163671 A1) in view of Ichinose et al. (US 20040121591 A1).
Regarding claim 9, Gulari discloses in a fourth step of the method, the additional layer (242), the protective layer (232) and any remaining first layer (222) are removed by wet etching ([0044], [0061])
Gulari fails to disclose the method for producing an integrated circuit according to claim 7, wherein, in a second step of the method, a first heat treatment operation is carried out at a first defined temperature in order to generate a cobalt silicide according to a first stoichiometry with two cobalt atoms and one silicon atom, in that, in a third step of the method, a second heat treatment operation is carried out at a temperature equivalent to or greater than the first temperature to generate a cobalt silicide according to a second stoichiometry with one cobalt atom and one silicon atom, and in that wherein, in a final step of the method, a third heat treatment is carried out at a temperature greater than the previous heat treatment temperatures to generate a cobalt silicide according to a third stoichiometry with one cobalt atom and two silicon atoms.
Ichinose discloses wherein, in a second step of the method, a first heat treatment operation is carried out at a first defined temperature in order to generate a cobalt silicide according to a first stoichiometry with two cobalt atoms and one silicon atom ([0024], 200C-400C and Co2Si), in that, in a third step of the method, a second heat treatment operation is carried out at a temperature equivalent to or greater than the first temperature to generate a cobalt silicide according to a second stoichiometry with one cobalt atom and one silicon atom ([0025], 400C-700C and CoSi), and in that wherein, in a final step of the method, a third heat treatment is carried out at a temperature greater than the previous heat treatment temperatures to generate a cobalt silicide according to a third stoichiometry with one cobalt atom and two silicon atoms ([0027], 700C-900C and CoSi2).
It would have been obvious to one of ordinary skill in the art to include the steps of Ichinose in Gulari and arrive at the claimed invention before the effective filing date of the claimed invention so as to enable means to form CoSi2 --with low-resistance (Ichinose, Abstract).
Regarding claim 10, Gulari/Ichinose discloses the method for producing an integrated circuit according to claim 9, wherein the first heat treatment operation is carried out at a temperature of the order of 350°C ([0024], 200C-400C is “of the order of” 350C as a rational multiple. See indefiniteness rejection above), in that the second heat treatment operation is carried out at a temperature of the order of 375°C ([0025], 400C-700C is “of the order of” 375C as a rational multiple. See indefiniteness rejection above), and in that wherein the third heat treatment operation is carried out at a temperature of the order of 550°C ([0027], 700C-900C is “of the order of” 550C as a rational multiple. See indefiniteness rejection above. All temperatures of Ichinose are rational multiple of the claimed temperatures).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Besser et al. (US 5970370 A) discloses providing a silicon substrate (10) with a cobalt layer (402), a titanium nitride layer (403) and a titanium layer (404) thereon (Fig. 4), a first annealing process to from a CoSi layer (501, Fig. 5), an etching process (Fig. 6), and a second annealing process to form a CoSi2 layer (701, Fig. 7).
Purtell et al. (US 20070161240 A1) discloses providing a silicon substrate (SOI) with a cobalt layer (514), a titanium nitride layer (516) and a metal layer (515) thereon (Fig. 5D), a first annealing process (Fig. 5E), an etching process (Fig. 5F), and a second annealing process ([0033], Fig. 5F).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Andres Munoz/Primary Examiner, Art Unit 2818
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