DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Election/Restrictions
Applicant’s election of species A, fig. 6, claims 1-8, in the reply filed on 1/30/26 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Haruyama, JP 2021167884 A (from the IDS, with English machine translation provided with IDS) in view of Hwang et al., US Publication No. 2022/0359348 A1.
Haruyama teaches:
1. An electro-optical device, comprising (see fig. 6):
a transistor (30);
a pixel electrode (9a) provided corresponding to the transistor;
a first conductive layer (7b) provided at a layer between the transistor and the pixel electrode,…
a lens layer (12) provided at a layer between the first conductive layer (7b) and the pixel electrode (9a), and including a first contact hole (17) for electrically connecting the first conductive layer (7b) and the pixel electrode (9a), wherein … See Haruyama at English machine translation para. [0031] – [0035],
Haruyama does not expressly teach:
including a first layer containing a metal material, a second layer containing an insulating material, and a third layer containing a metal material in this order from the pixel electrode side; and
in the first conductive layer, portions of the first layer and the second layer overlapping the first contact hole are removed.
In an analogous art, Hwang teaches:
(see figs. 1-2) a first conductive layer (300)…including a first layer (310) containing a metal material, a second layer (330) containing an insulating material, and a third layer (350) containing a metal material in this order…; and
in the first conductive layer (300), portions of the first layer (310) and the second layer (330) overlapping the first contact hole (e.g. hole of 500) are removed, para. [0022] – [0071].
It would have been obvious to one of ordinary skill in the art to modify Haruyama with Hwang to form the first conductive layer “including a first layer containing a metal material, a second layer containing an insulating material, and a third layer containing a metal material in this order from the pixel electrode side; and in the first conductive layer, portions of the first layer and the second layer overlapping the first contact hole are removed” because Hwang teaches “…thus degrees of etching of the semiconductor substrate and the first insulating layer need to be finely adjusted in an operation of etching the semiconductor substrate and the first insulating layer and forming the through hole in which the through electrode structure is disposed. Accordingly, a structural reliability between the through electrode structure of the semiconductor device and the contact wiring pattern connected to the through electrode structure may be enhanced.” See Hwang at para. [0009].
Hwang further teaches:
2. The electro-optical device according to claim 1, wherein
the second layer contains SiO2 or SiN, and
the third layer contains TiN and AL, or contains W, para. [0038] – [0039].
Regarding claim 2:
Hwang does not expressly teach:
the first layer contains WSi or TiN,
However, it would have been obvious to one having ordinary skill in the art to form the first layer contains WSi or TiN, since it is within the general skill of a worker in the art to select known material on the basis of its suitability for the intended purpose as a matter of obvious design choice. In re Leshin, 125 USPQ 416. See MPEP § 2144.07, Art Recognized Suitability for an Intended Purpose.
Hwang further teaches:
3. The electro-optical device according to claim 1, wherein
the first layer contains W,
the second layer contains SiO2 or SiN, and
the third layer contains W, or contains TiN and AL, para. [0038] – [0039].
Haruyama further teaches:
8. An electronic apparatus comprising the electro-optical device according to claim 1 (e.g. LCD of fig. 1)
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention> to modify the teachings of Haruyama with the teachings of Hwang because “…thus degrees of etching of the semiconductor substrate and the first insulating layer need to be finely adjusted in an operation of etching the semiconductor substrate and the first insulating layer and forming the through hole in which the through electrode structure is disposed. Accordingly, a structural reliability between the through electrode structure of the semiconductor device and the contact wiring pattern connected to the through electrode structure may be enhanced.” See Hwang at para. [0009], also see para. [0003].
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Haruyama, JP 2021167884 A in view of Hwang, as applied to claim 1 above, in further view of Kondo, JP 2002231807 A (from the IDS, with English machine translation provided with IDS)
Regarding claim 4:
One of ordinary skill in the art modifying Haruyama with Hwang would form “wherein the second layer (e.g. 330 in fig.1 of Hwang) is provided at a position overlapping the first contact hole” because the second layer is included in the conductive layer and Haruyama teaches the first conductive layer (7b) is provided at a position overlapping the first contact hole (17) in fig. 5.
Haruyama and Hwang do not expressly teach the second layer is provided in an island shape.
In an analogous art, Kondo teaches a second layer (5) is provided in an island shape in fig. 1. See Kondo at English machine translation para. [0026] – [0030].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Haruyama with the teachings of Kondo in order to “…efficiently form a contact hole and realize a stable inter-wiring contact resistance while maintaining good uniformity in the wafer surface…”
Allowable Subject Matter
Claims 5-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/Michele Fan/
Primary Examiner, Art Unit 2818
5 May 2026
Prosecution Insights