DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
Figures 11-16 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 5 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Applicant’s Admission of the Prior Art (AAPA, Narita, US 2023/021331).
Regarding claim 1, AAPA discloses a silicon carbide semiconductor device (Figs. 11, 12, [0005]; note: “a conventional device”), comprising: an active region (11) provided on a semiconductor substrate (140) containing silicon carbide ([0005]), the semiconductor substrate (140) having a first main surface and a second main surface opposite to each other; a termination region (120) surrounding a periphery of the active region (110); a parallel pn layer (103) provided in the semiconductor substrate (140), spanning the active region (110) and the termination region (120), the parallel pn layer having a plurality of first-conductivity-type column regions (131) and a plurality of second-conductivity-type column (132) regions disposed repeatedly alternating with one another in a first direction parallel to the front surface of the semiconductor substrate (140); a first semiconductor region of a second conductivity type (104), provided between the first main surface of the semiconductor substrate (140) and the parallel pn layer (103), the first semiconductor region extending from the active region (110) to the termination region (120); a plurality of second semiconductor regions of a first conductivity type (105), selectively provided in the active region (110), between the first main surface (140) and the first semiconductor region (104) ;a plurality of trenches (107) penetrating through the plurality of second semiconductor regions (105) and the first semiconductor region (104) in a depth direction of the device and reaching the plurality of first-conductivity-type column regions (103); a plurality of gate electrodes (117) provided in the plurality of trenches (107) via a plurality of gate insulating films (108); a second-conductivity-type high-concentration region (114a), (113), (114) selectively provided between the first semiconductor region (104) and the parallel pn layer (103), the second- conductivity-type high-concentration region including a first part (113) in the active region (110) and a second part (114a) in the termination region (120), the second-conductivity-type high- concentration region having an impurity concentration higher than an impurity concentration of the plurality of second semiconductor regions (Fig.12); a voltage withstand structure closer to an end of the semiconductor substrate than are the first semiconductor region and the second-conductivity-type high-concentration region, the voltage withstand structure (121) ([0004]; [0017]) being selectively provided between the first main surface and the parallel pn layer and configured by one or more second-conductivity-type voltage withstanding regions surrounding a periphery of the active region in concentric shapes (Figs. 15, 16); a first electrode (118)electrically connected to the plurality of second semiconductor regions ([0022]), the first semiconductor region, and the second- conductivity-type high-concentration region; and a second electrode (119) electrically connected to the second main surface of the semiconductor substrate (140), wherein of the second-conductivity-type high-concentration region: the first part (112) in the active region (110) reaches a position closer to the second main surface than are bottoms of the plurality of trenches (107), and the second part (114a) in the termination region (120) has a lower surface facing the second main surface (140), the lower surface being closer to the first main surface (upper surface of (140)) than is a lower surface of the first part (113) in the active region (110).
Regarding claim 2, AAPA discloses wherein the first part of the second-conductivity-type high-concentration region (112) in the active region (110) has: a first portion (113) closer to the second main surface (lower surface of (140) than are the bottoms of the plurality of trenches (107), and a second portion (114) closer to the first main surface than are the bottoms of the plurality of trenches (107) (note: “a first portion: and “a second portion” can be chosen arbitrarily), and the second part of the second-conductivity-type high-concentration region (114a) in the termination region (120a) is formed by the second portion (114) extending in the termination region (120a).
Regarding claim 3, AAPA discloses wherein the first portion of the first part of the second-conductivity-type high- concentration region (113) surrounds the periphery of the active region (110) and maintains a predetermined distance relative to outermost peripheral sidewalls of the plurality of trenches (107) (note: “a predetermined distance” is not defined), the outermost peripheral sidewalls being adjacent to the termination region (120).
Regarding claim 5, AAPA discloses, wherein the first portion (113) of the first part of the second-conductivity-type high- concentration region surrounds the periphery of the active region (110) and maintains a predetermined distance relative to an inner periphery of the voltage withstand structure (121) (note: “a predetermined distance” is not defined)
Regarding claim 6, AAPA discloses, wherein the second part of the second-conductivity-type high-concentration region (114) is provided in an entire area between the active region (110) and the voltage withstand structure (121) (Fig.12).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over AAPA.
Regarding claim 4, AAPA discloses the first portion of the first part of the second-conductivity-type high- concentration region (112) terminates closer to the end of the semiconductor substrate (140) than are outermost peripheral sidewalls of the plurality of trenches (107), the outermost peripheral sidewalls being adjacent to the termination region (Fig.13).
AAPA does not discloses the first portion of the first part of the second-conductivity-type high- concentration region terminates closer to the end of the semiconductor substrate than are outermost peripheral sidewalls of the plurality of trenches by not more than 0.35mm.
AAPA however discloses that the first part of the second conductivity type high concentration region (112) have function of mitigating electric field applied to the gate insulating films at the bottoms of the gate trenches ([0013]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was field to have first part of the second-conductivity-type high- concentration region terminates closer to the end of the semiconductor substrate than are outermost peripheral sidewalls of the plurality of trenches by not more than 0.35mm for the purpose of optimization electric filed at the bottom of the gate trenches (AAPA, [0013]).
Allowable Subject Matter
Claims 7-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the search of the prior art does not disclose or reasonably suggest that the second part of the second-conductivity-type high-concentration region is selectively provided as required by claim 7.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JULIA SLUTSKER whose telephone number is (571)270-3849. The examiner can normally be reached Monday-Friday, 9 am-6 pm.
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/JULIA SLUTSKER/ Primary Examiner, Art Unit 2891
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