DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 11/06/2023 and 06/11/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Drawings
The drawings are objected to for the following reasons:
it appears that in Figure 2 box 330 located between box 420 and box 360 should be labelled 350 instead of 330 in order to be consistent with Figure 1 and
item 420 in Figure 2 is not mentioned in the specification.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
Para[0021] recites “circuity” which should be “circuitry”.
Para[0055] recites “removable storage unit, removable storage unit” which should be “removable storage unit”.
Appropriate correction is required.
Claim Objections
Claims 1-20 objected to because of the following informalities:
Claim 1 recites “utility power supply” and “power utility supply” while claims 6, 14 and 16 recite “utility supply”. The objection can be overcome by renaming all such instances recited above as “utility supply”.
Claim 10 recites “circuity”. The objection can be overcome by replacing “circuity” with “circuitry”.
Claim 13 recites “includes at least one of…and” when reciting a list of claim limitations. The objection can be overcome by replacing “and” with “or”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1, 2, 5, 8, 9, and 12 recite “the analog voltage”, but claim 1 recites “an analog voltage” in lines 5 and 7. It is not clear which analog voltage “the analog voltage” is referring to, making the scope of these claims indefinite.
Claims 7 and 8 recite “the phase current”, but claim 1 recites “a phase current” in lines 4 and 7-8. It is not clear which phase current “the phase current” is referring to, making the scope of these claims indefinite.
Claim 12 recites the limitation “the phase current sensors”. There is insufficient antecedent basis for this limitation in the claim.
Claim 19 recites “the digital output”, but claims 14 and 18 recites “a digital output”. It is not clear which digital output “the digital output” is referring to, making the scope of this claim indefinite.
Claim 19 recites “the lower voltage representative”, but claims 15 and 19 recite “a lower voltage representative” earlier. It is not clear which lower voltage representative “the lower voltage representative” is referring to, making the scope of this claim indefinite.
Claim 19 recites “the third digital output”, but claims 18 and 19 recites “a third digital output” earlier. It is not clear which third digital output “the third digital output” is referring to, making the scope of this claim indefinite.
Claims that depend on the above rejected claims are also rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
With respect to Claim 1 Step 1: This part of the eligibility analysis evaluates whether the claim falls within any statutory category. See MPEP 2106.03. The claim recites a system for performing real-time measurements of power quality. Thus, the claim is to a machine, which is one of the statutory categories of invention. (Step 1: YES). The limitations a real-time engine for performing algorithms for determining a plurality of power quality measurements from the digital output;
calculate a power quality report from the plurality of power quality measurements.
are directed to an abstract idea and would fall within the “Mathematical Concept” grouping of abstract ideas. Para[0043] of the specification recites “The engine 350 utilizes the digital output from the analog-to-digital converter 340 to calculate the power quality of the input line currents 210, 220, and 230 by performing various power quality measurements. These power quality measurements are used by the real-time engine 350 for implementing Fast Fourier Transform algorithms”. In addition, para[0043] of the specification recites “From these calculations, the real-time engine 350 provides a power quality output to the microcontroller 360, which uses the power quality output from engine 350 to create a power quality report that denotes whether any harmonic interferences have been detected from the input line currents 210, 220, or 230.” Therefore, both limitations are directed to mathematical concepts as they both require quantitative measures to arrive at the conclusion of whether harmonic interferences have been detected. These limitations would fall within the mathematical concept grouping of abstract ideas because they cover concepts performed by mathematical relationships, mathematical formulas or equations, or mathematical calculations. See MPEP 2106.04(a)(1). Accordingly, the claim recites an abstract idea. This judicial exception is not integrated into a practical application.
In particular, the claim recites the additional elements – a phase current sensor electrically coupled to the input line current originating from the power utility supply, the phase current sensor configured to determine a phase current from the input line current and convert the phase current to an analog voltage;
an analog-to-digital converter electrically coupled to the input line current, the analog-to-digital converter configured to sample an analog voltage representing a phase current of the input line current and provides a digital output that corresponds to the analog voltage;
a data display configured to display a visual representation of the power quality report.
The limitations
“a phase current sensor electrically coupled to the input line current originating from the power utility supply, the phase current sensor configured to determine a phase current from the input line current and convert the phase current to an analog voltage;
an analog-to-digital converter electrically coupled to the input line current, the analog-to-digital converter configured to sample an analog voltage representing a phase current of the input line current and provides a digital output that corresponds to the analog voltage;”
is mere data gathering recited at a high level of generality, and thus is insignificant extra-solution activity. See MPEP 2106.05(g) (“whether the limitation is significant”). Further, the limitation a data display configured to display a visual representation of the power quality report.
involves selecting a particular data source or type of data to be manipulated recited at a high level of generality, and thus is insignificant extra-solution activity. See MPEP 2106.05(g). As such Examiner does NOT view that the claims -Improve the functioning of a computer, or to any other technology or technical field
-Apply the judicial exception with, or by use of, a particular machine - see MPEP 2106.05(b)
-Effect a transformation or reduction of a particular article to a different state or thing - see MPEP 2106.05(c)
-Apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception - see MPEP 2106.05(e) and Vanda Memo Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application (Step 2A, Prong Two: NO), and the claim is directed to the judicial exception. (Step 2A: YES). Step 2B: This part of the eligibility analysis evaluates whether the claim as a whole amounts to significantly more than the recited exception i.e., whether any additional element, or combination of additional elements, adds an inventive concept to the claim. See MPEP 2106.05. Additional elements a phase current sensor electrically coupled to the input line current originating from the power utility supply, the phase current sensor configured to determine a phase current from the input line current and convert the phase current to an analog voltage;
an analog-to-digital converter electrically coupled to the input line current, the analog-to-digital converter configured to sample an analog voltage representing a phase current of the input line current and provides a digital output that corresponds to the analog voltage;
were both found to be insignificant extra-solution activity in Step 2A, Prong Two, because it was determined to be insignificant limitations as necessary data gathering. However, a conclusion that an additional element is insignificant extra-solution activity in Step 2A, Prong Two should be re-evaluated in Step 2B. See MPEP 2106.05, subsection I.A. At Step 2B, the evaluation of the insignificant extra-solution activity consideration takes into account whether or not the extra-solution activity is well understood, routine, and conventional in the field. See MPEP 2106.05(g). Regarding the additional elements, as discussed in Step 2A, Prong Two above, a data display configured to display a visual representation of the power quality report
amounts to no more than selecting a particular data source or type of data to be manipulated to apply the exception using a generic computer component.
The claims do not include additional elements that are sufficient to amount to
significantly more than the judicial exception because a microprocessor is a generic computer element and not considered significantly more than the abstract idea. As recited in the MPEP, 2106.05(b), merely adding a generic computer, generic computer component, or a programmed computer to perform generic computer functions does not automatically overcome an eligibility rejection. Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 134 S. Ct. 2347, 2359-60, 110 USPQ2d 1976, 1984 (2014). See also OIP Techs. v. Amazon.com, 788 F.3d 1359, 1364, 115 USPQ2d 1090, 1093-94.
Even when considered in combination, these additional elements represent mere instructions to implement an abstract idea or other exception on a computer and insignificant extra-solution activity, which do not provide an inventive concept. (Step 2B: NO). Examiner notes the additional elements are well-understood, routine, conventional activity (See MPEP 2106.05(d), subsection II), as evidenced by Germer (US 5017860 A)
Svasek (US 20150073734 A1) Considering the claim as a whole, one of ordinary skill in the art would not know the practical application of the present invention. As currently claimed, Examiner views that the additional elements do not apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, because the claim fails to recite clearly how the judicial exception is applied in a manner that does not monopolize the exception and does not impose a meaningful limitation describing what problem is being remedied or solved.
With respect to Claim 14 Step 1: This part of the eligibility analysis evaluates whether the claim falls within any statutory category. See MPEP 2106.03. The claim recites a process for performing real-time measurements of power quality. Thus, the claim is to a process, which is one of the statutory categories of invention. (Step 1: YES). The limitations d. electronically calculating a plurality of power quality measurements from the digital output;
e. electronically implementing algorithms with the plurality of power quality measurements to provide a power quality output;
f. electronically generating a power quality report from the power quality output
are directed to an abstract idea and would fall within the “Mathematical Concept” grouping of abstract ideas. Para[0043] of the specification recites “The engine 350 utilizes the digital output from the analog-to-digital converter 340 to calculate the power quality of the input line currents 210, 220, and 230 by performing various power quality measurements. These power quality measurements are used by the real-time engine 350 for implementing Fast Fourier Transform algorithms”. In addition, para[0043] of the specification recites “From these calculations, the real-time engine 350 provides a power quality output to the microcontroller 360, which uses the power quality output from engine 350 to create a power quality report that denotes whether any harmonic interferences have been detected from the input line currents 210, 220, or 230.” Therefore, these limitations are directed to mathematical concepts as they both require quantitative measures to arrive at the conclusion of whether harmonic interferences have been detected. These limitations would fall within the mathematical concept grouping of abstract ideas because they cover concepts performed by mathematical relationships, mathematical formulas or equations, or mathematical calculations. See MPEP 2106.04(a)(1). Accordingly, the claim recites an abstract idea. This judicial exception is not integrated into a practical application.
In particular, the claim recites the additional elements – a. sensing a phase current from an input line current originating from a utility supply
b. converting the phase current to an analog voltage;
c. translating the analog voltage to a digital output;
g. presenting a visual representation of the power quality report on a data display.
The limitations
a. sensing a phase current from an input line current originating from a utility supply
b. converting the phase current to an analog voltage;
c. translating the analog voltage to a digital output;
is mere data gathering recited at a high level of generality, and thus is insignificant extra-solution activity. See MPEP 2106.05(g) (“whether the limitation is significant”). Further, the limitation g. presenting a visual representation of the power quality report on a data display.
involves selecting a particular data source or type of data to be manipulated recited at a high level of generality, and thus is insignificant extra-solution activity. See MPEP 2106.05(g). As such Examiner does NOT view that the claims -Improve the functioning of a computer, or to any other technology or technical field
-Apply the judicial exception with, or by use of, a particular machine - see MPEP 2106.05(b)
-Effect a transformation or reduction of a particular article to a different state or thing - see MPEP 2106.05(c)
-Apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception - see MPEP 2106.05(e) and Vanda Memo Even when viewed in combination, these additional elements do not integrate the recited judicial exception into a practical application (Step 2A, Prong Two: NO), and the claim is directed to the judicial exception. (Step 2A: YES). Step 2B: This part of the eligibility analysis evaluates whether the claim as a whole amounts to significantly more than the recited exception i.e., whether any additional element, or combination of additional elements, adds an inventive concept to the claim. See MPEP 2106.05. Additional elements a. sensing a phase current from an input line current originating from a utility supply
b. converting the phase current to an analog voltage;
c. translating the analog voltage to a digital output;
were found to be insignificant extra-solution activity in Step 2A, Prong Two, because it was determined to be insignificant limitations as necessary data gathering. However, a conclusion that an additional element is insignificant extra-solution activity in Step 2A, Prong Two should be re-evaluated in Step 2B. See MPEP 2106.05, subsection I.A. At Step 2B, the evaluation of the insignificant extra-solution activity consideration takes into account whether or not the extra-solution activity is well understood, routine, and conventional in the field. See MPEP 2106.05(g). Regarding the additional elements, as discussed in Step 2A, Prong Two above, g. presenting a visual representation of the power quality report on a data display.
amounts to no more than selecting a particular data source or type of data to be manipulated to apply the exception using a generic computer component.
Even when considered in combination, these additional elements represent mere instructions to implement an abstract idea or other exception on a computer and insignificant extra-solution activity, which do not provide an inventive concept. (Step 2B: NO). Examiner notes the additional elements are well-understood, routine, conventional activity (See MPEP 2106.05(d), subsection II), as evidenced by Germer (US 5017860 A)
Svasek (US 20150073734 A1) Considering the claim as a whole, one of ordinary skill in the art would not know the practical application of the present invention. As currently claimed, Examiner views that the additional elements do not apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, because the claim fails to recite clearly how the judicial exception is applied in a manner that does not monopolize the exception and does not impose a meaningful limitation describing what problem is being remedied or solved. Dependent claims 2-8, 10-20 when analyzed as a whole are held to be patent ineligible under 35 U.S.C. 101 because the additional recited limitation(s) fail(s) to establish that the claim(s) is/are not directed to an abstract idea, as detailed below: there is no additional element(s) in the dependent claims that adds a meaningful limitation to the abstract idea to make the claim significantly more than the judicial exception (abstract idea). Claim 13 further limits the abstract idea with an abstract idea and thus the claims are still directed to an abstract idea without significantly more.
Claims 2-5, 7-12, and 15-19 recite limitations regarding data gathering steps necessary or routine to implement the abstract idea and thus are not significantly more than the abstract idea and viewed to be well known, routine, and conventional as evidenced by the prior art shown above. Claims 8, 17, and 20 recite limitations that are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 13, and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Germer (US 5017860 A) in view of Wechter (US 20070211443 A1).
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With respect to Claim 1, Germer teaches
a system for performing real-time measurements of power quality (See Abstract “the electronic watthour meter”) of an input line current (See Fig. 1 the line 1 current 11 and the phase 1 voltage 41 and column 4 lines 34-39 “Samples of the line current 11 of line 1 at it is carried by the multiplexed current signal 16, and samples of phase voltage 41 of phase 1 as it is carried by the multiplexed voltage signal 57 of the power being measured in line 1 are thus multiplied”):
a phase current sensor electrically coupled to the input line current originating from the power utility supply (See Fig. 1 the current to voltage converter 17), the phase current sensor configured to determine a phase current from the input line current and convert the phase current to an analog voltage (See Fig. 1 the current A/D converter 24, which converts the gain adjusted analog signal 23, which itself is from the current to voltage converter 17 via the output 18);
an analog-to-digital converter electrically coupled to the input line current (See Fig. 1 the voltage to current converter 58), the analog-to-digital converter configured to sample an analog voltage (See Fig. 1, the phase 1 voltage) representing a phase current of the input line current (See column 4 lines 34-39 “Samples of the line current 11 of line 1 at it is carried by the multiplexed current signal 16, and samples of phase voltage 41 of phase 1 as it is carried by the multiplexed voltage signal 57 of the power being measured in line 1 are thus multiplied”, hence the phase 1 voltage and line 1 current both come from the same input line) and provides a digital output that corresponds to the analog voltage (See Fig. 1 the output 64);
a real-time engine for performing algorithms for determining a plurality of power quality measurements from the digital output (See Fig. 1 the multiplier 65);
a microcontroller electrically coupled to the engine, the microcontroller configured to calculate a power quality report from the plurality of power quality measurements (See column 4 lines 44-48 “Each time the accumulated sum of the multiplied voltage and current samples or input 68 reaches a preset threshold value, proportional to the meter watthour constant, an output pulse is generated by the accumulator 69.”); and
a data display configured to display a visual representation of the power quality report (See column 4 lines 55-57 “The register 71 counts, stores and displays energy information based on the number of pulses 70 that it receives.”).
However, Germer is silent to the language of
a utility power supply.
Nevertheless, Wechter teaches
a utility power supply (See Para[0024] “the power supply 12 typically provides three-phase AC power, for example, as received from a utility grid over transmission power lines 38”).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer wherein a utility power supply is used like that in Wechter. One of ordinary skill would have been motivated to modify Germer because Wechter teaches power lines which come from a utility power supply in order to provide the power needed to sense current and voltage, which in turn will allow for accurate analysis of the harmonics generated by the utility power supply.
With respect to Claim 13, Germer teaches
the system of Claim 1, wherein the plurality of power quality measurements includes at least one of kWh (See column 4 lines 57-59 "The register 71, could include a digital display, such as a liquid crystal display (now shown), to display the line power consumption in kilowatt hours."), kW, power factor, peak current, and Root-Mean-Square (RMS) current.
With respect to Claim 14, Germer teaches
a process for performing real-time measurements of power quality (See Abstract “the electronic watthour meter”), said process comprising the steps of:
a. sensing a phase current from an input line current originating from a utility supply (See column 2 lines 54-58 “three current scaling and isolation means 1, 2 and 3 provide output current signals 4, 5, and 6 respectively, which are proportional to the line currents in power lines 11, 12 and 13 respectively.”)
b. converting the phase current to an analog voltage (See column 3 lines 17-18 “Multiplexed current signal 16 is provided to the input of the current to voltage converter 17”).
c. translating the analog voltage to a digital output (See column 4 lines 10-16 “The current A/D converter 24 and the voltage A/D converter 58 provide output signals, namely a digital current signal 63 and a digital voltage signal 65, respectively, which are digital words representative of, and proportional to, their analog inputs, namely the gain adjusted current signal 23 and the voltage multiplexed signal 57”. Also, the output of the current to voltage converter 17 is the input of the A/D converter 24.);
d. electronically calculating a plurality of power quality measurements from the digital output (See column 4 lines 34-39 “Samples of the line current 11 of line 1 at it is carried by the multiplexed current signal 16, and samples of phase voltage 41 of phase 1 as it is carried by the multiplexed voltage signal 57 of the power being measured in line 1 are thus multiplied”);
e. electronically implementing algorithms with the plurality of power quality measurements to provide a power quality output (See column 4 lines 44-48 "Each time the accumulated sum of the multiplied voltage and current samples or input 68 reaches a preset threshold value, proportional to the meter watthour constant, an output pulse is generated by the accumulator 69" where the algorithms are the accumulated sums.);
f. electronically generating a power quality report from the power quality output (See column 4 lines 44-48 "Each time the accumulated sum of the multiplied voltage and current samples or input 68 reaches a preset threshold value, proportional to the meter watthour constant, an output pulse is generated by the accumulator 69" where the report is the output pulse.); and
g. presenting a visual representation of the power quality report on a data display (See column 4 lines 55-57 "The register 71 counts, stores and displays energy information based on the number of pulses 70 that it receives").
However, Germer is silent to the language of
a utility supply.
Nevertheless, Wechter teaches
a utility supply (See Para[0024] “the power supply 12 typically provides three-phase AC power, for example, as received from a utility grid over transmission power lines 38”).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer wherein a utility supply is used like that in Wechter. One of ordinary skill would have been motivated to modify Germer because Wechter teaches power lines which come from a utility power supply in order to provide the power needed to sense current and voltage, which in turn will allow for accurate analysis of the harmonics generated by the utility power supply.
Claim(s) 3-4, 6-8, 10, 11, and 15-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Germer and Wechter in view of Svasek (US 20150073734 A1).
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With respect to Claim 3, Germer and Wechter teach the limitations of Claim 1.
However, Germer and Wechter are silent to the language of
a voltage reduction circuitry electrically coupled to the analog-to-digital converter, wherein the voltage reduction circuitry measures a voltage directly from the input line current and converts the voltage to a lower voltage representative.
Nevertheless, Svasek teaches
a voltage reduction circuitry electrically coupled to the analog-to-digital converter, wherein the voltage reduction circuitry measures a voltage directly from the input line current and converts the voltage to a lower voltage representative (See Para[0025] “The three voltage channels with the three input voltages UL1, UL2, and UL3 are synchronously sampled via the voltage sensors (dividers) 2”).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the voltage reduction circuitry is electrically coupled to the analog-to-digital converter, wherein the voltage reduction circuitry measures a voltage directly from the input line current and converts the voltage to a lower voltage representative like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a voltage reduction circuitry that can allow the circuit in Germer and Wechter to be more robust against strong power surges that may result in very large voltages.
With respect to Claim 4, Germer, Wechter, and Svasek teach the limitations of Claim 3.
However, Germer and Wechter are silent to the language of
the analog-to-digital converter samples the lower voltage representative from the voltage reduction circuitry to provide the digital output.
Nevertheless, Svasek teaches
the analog-to-digital converter samples the lower voltage representative from the voltage reduction circuitry to provide the digital output (See Para[0025] " The three voltage channels with the three input voltages UL1, UL2, and UL3 are synchronously sampled via the voltage sensors (dividers) 2 and the buffer amplifiers 5 by the A/D converter 6, for instance, with a sampling rate of 5 kHz. " and Fig. 2).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the voltage reduction circuitry is electrically coupled to the analog-to-digital converter, wherein the analog-to-digital converter samples the lower voltage representative from the voltage reduction circuitry to provide the digital output like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches the voltage reduction circuitry which can allow the circuit in Germer and Wechter to be more robust against strong power surges that may result in very large voltages.
With respect to Claim 6, Germer, and Wechter teach the limitations of Claim 1 wherein Germer further teaches
a second input line current (See Fig. 1 the line 2 current); and
a third input line current (See Fig. 1 the line 3 current).
However, Germer is silent to the language of
the second input line current and the third input line current originating from the utility supply.
Nevertheless, Wechter teaches
the second input line current and the third input line current originating from the utility supply (See Para[0024] “the power supply 12 typically provides three-phase AC power, for example, as received from a utility grid over transmission power lines 38” and Figure 2 the three transmission power lines 38).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer wherein a second input line current and a third input line current originate from a utility power supply like that in Wechter. One of ordinary skill would have been motivated to modify Germer because Wechter teaches three power lines which come from a utility power supply in order to provide the power needed to sense current and voltage, which in turn will allow for accurate analysis of the harmonics generated by the utility power supply.
However, Germer and Wechter are silent to the language of
a second phase current sensor electrically coupled to the analog-to-digital converter,
wherein the second phase current sensor corresponds to a second input line current; and
a third phase current sensor electrically coupled to the analog-to-digital converter,
wherein the third phase current sensor corresponds to a third input line current.
Nevertheless, Svasek teaches
a second phase current sensor (See Fig. 1 the Rogowski sensor 15) electrically coupled to the analog-to-digital converter (See Fig.1 the A/D converter 18),
wherein the second phase current sensor corresponds to a second input line current (See Fig. 1 the current IL2); and
a third phase current sensor (See Fig.1 the Rogowski sensor 16) electrically coupled to the analog-to-digital converter (See Fig.1 the A/D converter 18),
wherein the third phase current sensor corresponds to a third input line current (See Fig. 1 the current IL3).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein a second phase current sensor electrically coupled to the analog-to-digital converter, wherein the second phase current sensor corresponds to a second input line current; and a third phase current sensor electrically coupled to the analog-to-digital converter, wherein the third phase current sensor corresponds to a third input line current is used like that in Wechter. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches multiple input line currents that are sensed by separate phase current sensors which all get fed into the analog-to-digital converter, which will allow the circuit in Germer and Wechter to be not as complex by allowing each current to have its own phase current sensor.
With respect to Claim 7, Germer, Wechter, and Svasek teach the limitations of Claim 6.
However, Germer and Wechter are silent to the language of
the second phase current sensor senses a second phase current from the second input line current simultaneous with the sensing of the phase current from the input line current by the phase current sensor; and wherein the third phase current sensor simultaneously senses a third phase current from the third input line current.
Nevertheless, Svasek teaches
the second phase current sensor senses a second phase current from the second input line current simultaneous with the sensing of the phase current from the input line current by the phase current sensor; and wherein the third phase current sensor simultaneously senses a third phase current from the third input line current (See Para[0039] “As already mentioned, the current signals and voltage signals are all sensed synchronously” and Fig. 1 where there are three phase currents IL1, IL2, and IL3 ).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the second phase current sensor senses a second phase current from the second input line current simultaneous with the sensing of the phase current from the input line current by the phase current sensor; and wherein the third phase current sensor simultaneously senses a third phase current from the third input line current like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a system that can simultaneously sense the current signal of multiple sensors, which can allow the circuit in Germer and Wechter to be more compact as they will not need a multiplexer.
With respect to Claim 8, Germer, Wechter, and Svasek teach the limitations of Claim 7.
However, Germer and Wechter are silent to the language of
the second phase current sensor converts the second phase current to a second analog voltage simultaneous with the conversion of the phase current to the analog voltage by the phase current sensor; and wherein the third phase current sensor simultaneously converts the third phase current to a third analog voltage.
Nevertheless, Svasek teaches
the second phase current sensor converts the second phase current to a second analog voltage simultaneous with the conversion of the phase current to the analog voltage by the phase current sensor; and wherein the third phase current sensor simultaneously converts the third phase current to a third analog voltage. (See Para[0039] “As already mentioned, the current signals and voltage signals are all sensed synchronously. The simultaneous sensing of the current and voltage channels is significant for the power calculation, since the phase position of voltage to current is of substantial importance in the active power calculation.” See also Fig. 1 where there are three phase currents IL1, IL2, and IL3 and the selection Rogowski sensors 15-17 ).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the second phase current sensor converts the second phase current to a second analog voltage simultaneous with the conversion of the phase current to the analog voltage by the phase current sensor; and wherein the third phase current sensor simultaneously converts the third phase current to a third analog voltage like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a system that can simultaneously sense and convert to an analog voltage (via the Rogowski sensors 15-17) the current signal of multiple current sensors, which can allow the circuit in Germer and Wechter to be more compact as they will not need a multiplexer.
With respect to Claim 10, Germer, Wechter, and Svasek teach the limitations of Claim 8.
However, Germer and Wechter are silent to the language of
a voltage reduction circuitry electrically coupled to the analog-to-digital converter,
wherein the voltage reduction circuitry measures a voltage directly from the input line current and converts the voltage to a lower voltage representative;
wherein the voltage reduction circuity measures a second voltage directly from the input line current and converts the second voltage to a second lower voltage representative; and
wherein the voltage reduction circuitry measures a third voltage directly from the input line current and converts the third voltage to a third lower voltage representative.
Nevertheless, Svasek teaches
a voltage reduction circuitry (See Fig. 2 the voltage divider 4) electrically coupled to the analog-to-digital converter (See Fig. 1 the A/D converter 6),
wherein the voltage reduction circuitry measures a voltage directly from the input line current and converts the voltage to a lower voltage representative (See Fig. 2 for the input voltage UL1);
wherein the voltage reduction circuity measures a second voltage directly from the input line current and converts the second voltage to a second lower voltage representative (See Fig. 2 for the input voltage UL2); and
wherein the voltage reduction circuitry measures a third voltage directly from the input line current and converts the third voltage to a third lower voltage representative (See Fig. 2 for the input voltage UL3).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the voltage reduction circuitry measures a voltage directly from the input line current and converts the voltage to a lower voltage representative; wherein the voltage reduction circuity measures a second voltage directly from the input line current and converts the second voltage to a second lower voltage representative; and wherein the voltage reduction circuitry measures a third voltage directly from the input line current and converts the third voltage to a third lower voltage representative. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a voltage reduction circuitry that can measure the voltage of three separate voltages and scale them down, which can allow the circuit in Germer and Wechter to be more robust against strong power surges that may result in very large voltages.
With respect to Claim 11, Germer, Wechter, and Svasek teach the limitations of Claim 10.
However, Germer and Wechter are silent to the language of
the analog-to-digital converter samples the lower voltage representative, the second lower voltage representative, and the third lower voltage representative to provide the digital output.
Nevertheless, Svasek teaches
the analog-to-digital converter samples the lower voltage representative, the second lower voltage representative, and the third lower voltage representative to provide the digital output (See Para[0025] “The three voltage channels with the three input voltages UL1, UL2, and UL3 are synchronously sampled via the voltage sensors (dividers) 2 and the buffer amplifiers 5 by the A/D converter 6, for instance, with a sampling rate of 5 kHz.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the analog-to-digital converter samples the lower voltage representative, the second lower voltage representative, and the third lower voltage representative to provide the digital output like that of Svasek. One of ordinary skill would have been motivated to modify Germer because Svasek teaches a circuitry that is more compact by allowing the analog-to-digital converter to sample all three voltages.
With respect to Claim 15, Germer and Wechter teach the limitations of Claim 14.
However, Germer and Wechter are silent to the language of
wherein said step of translating the analog voltage to the digital output further comprises the steps of:
translating the analog voltage to a lower voltage representative; and
translating the lower voltage representative to the digital output.
Nevertheless, Svasek teaches
wherein said step of translating the analog voltage to the digital output further comprises the steps of:
translating the analog voltage to a lower voltage representative (See Para[0025] “The three voltage channels with the three input voltages UL1, UL2, and UL3 are synchronously sampled via the voltage sensors (dividers) 2 and the buffer amplifiers 5 by the A/D converter 6, for instance, with a sampling rate of 5 kHz.”); and
translating the lower voltage representative to the digital output (See Fig. 1 the A/D converter 6).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter, wherein said step of translating the analog voltage to the digital output further comprises the steps of: translating the analog voltage to a lower voltage representative; and translating the lower voltage representative to the digital output like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a method that can allow the circuit in Germer and Wechter to be more robust against strong power surges that may result in very large voltages.
With respect to Claim 16, Germer, Wechter, and Svasek teach the limitations of Claim 15 wherein Germer further teaches
a second input line current (See Fig. 1 the line 2 current); and
a third input line current (See Fig. 1 the line 3 current).
However, Germer is silent to the language of
the second input line current and the third input line current originating from the utility supply.
Nevertheless, Wechter teaches
the second input line current and the third input line current originating from the utility supply (See Para[0024] “the power supply 12 typically provides three-phase AC power, for example, as received from a utility grid over transmission power lines 38” and Figure 2 the three transmission power lines 38).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer wherein a second input line current and a third input line current originate from a utility power supply like that in Wechter.
One of ordinary skill would have been motivated to modify Germer because Wechter teaches three power lines which come from a utility power supply in order to provide the power needed to sense current and voltage, which in turn will allow for accurate analysis of the harmonics generated by the utility power supply.
However, Germer and Wechter are silent to the language of
sensing a second phase current from a second input line current simultaneous with the step of sensing the phase current from the input line current; and
sensing simultaneously a third phase current from a third input line current.
Nevertheless, Svasek teaches
sensing a second phase current from a second input line current simultaneous with the step of sensing the phase current from the input line current (See Para[0039] “As already mentioned, the current signals and voltage signals are all sensed synchronously” and Fig. 1 where there are three phase currents IL1, IL2, and IL3 ); and
sensing simultaneously a third phase current from a third input line current (See Para[0039] “As already mentioned, the current signals and voltage signals are all sensed synchronously” and Fig. 1 where there are three phase currents IL1, IL2, and IL3 ).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein sensing a second phase current from a second input line current simultaneous with the step of sensing the phase current from the input line current; and sensing simultaneously a third phase current from a third input line current is done like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a method that can simultaneously sense the current signal of multiple sensors, which can allow the circuit in Germer and Wechter to be more compact as they will not need a multiplexer.
With respect to Claim 17, Germer, Wechter, and Svasek teach the limitations of Claim 16.
However, Germer and Wechter are silent to the language of
converting the second phase current to a second analog voltage simultaneous with the step of converting the phase current to the analog voltage; and
converting simultaneously the third phase current to a third analog voltage.
Nevertheless, Svasek teaches
converting the second phase current to a second analog voltage simultaneous with the step of converting the phase current to the analog voltage; and
converting simultaneously the third phase current to a third analog voltage.
(See Para[0039] “As already mentioned, the current signals and voltage signals are all sensed synchronously. The simultaneous sensing of the current and voltage channels is significant for the power calculation, since the phase position of voltage to current is of substantial importance in the active power calculation.” See also Fig. 1 where there are three phase currents IL1, IL2, and IL3 and the selection Rogowski sensors 15-17 ).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein converting the second phase current to a second analog voltage simultaneous with the step of converting the phase current to the analog voltage; and converting simultaneously the third phase current to a third analog voltage is done like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a method that can simultaneously convert current to an analog voltage (via the Rogowski sensors 15-17), which can allow the circuit in Germer and Wechter to be more compact as Germer will not need a multiplexer.
With respect to Claim 18, Germer, Wechter, and Svasek teach the limitations of Claim 17.
However, Germer and Wechter are silent to the language of
translating the second analog voltage to a second digital output simultaneous with the step of translating the analog voltage to a digital output; and
translating simultaneously the third analog voltage to a third digital output.
Nevertheless, Svasek teaches
translating the second analog voltage to a second digital output simultaneous with the step of translating the analog voltage to a digital output; and
translating simultaneously the third analog voltage to a third digital output. (See Para[0039] “As already mentioned, the current signals and voltage signals are all sensed synchronously. The simultaneous sensing of the current and voltage channels is significant for the power calculation, since the phase position of voltage to current is of substantial importance in the active power calculation.” See also Fig. 1 where there are three phase currents IL1, IL2, and IL3 and the A/D converter 18).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein translating the second analog voltage to a second digital output simultaneous with the step of translating the analog voltage to a digital output; and translating simultaneously the third analog voltage to a third digital output is done like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a more efficient method to translate the voltages to a digital output by simultaneously sampling all three voltages.
With respect to Claim 19, Germer, Wechter, and Svasek teach the limitations of Claim 18.
However, Germer and Wechter are silent to the language of
wherein the step of translating the analog voltage to the digital output further comprises the steps of:
translating the analog voltage to a lower voltage representative; and
translating the lower voltage representative to the digital output;
wherein the step of translating the second analog voltage to the second digital output further comprises the steps of:
translating the second analog voltage to a second lower voltage representative; and
translating the second lower voltage representative to the second digital output; and
wherein the step of translating the third analog voltage to a third digital output further comprises the steps of:
translating the third analog voltage to a third lower voltage representative; and
translating the third lower voltage representative to the third digital output.
Nevertheless, Svasek teaches
wherein the step of translating the analog voltage to the digital output further comprises the steps of:
translating the analog voltage to a lower voltage representative (See Para[0025] “The three voltage channels with the three input voltages UL1, UL2, and UL3 are synchronously sampled via the voltage sensors (dividers) 2 and the buffer amplifiers 5 by the A/D converter 6, for instance, with a sampling rate of 5 kHz.”); and
translating the lower voltage representative to the digital output (See Fig. 1 the A/D converter 6);
wherein the step of translating the second analog voltage to the second digital output further comprises the steps of:
translating the second analog voltage to a second lower voltage representative (See Para[0025] “The three voltage channels with the three input voltages UL1, UL2, and UL3 are synchronously sampled via the voltage sensors (dividers) 2 and the buffer amplifiers 5 by the A/D converter 6, for instance, with a sampling rate of 5 kHz.”); and
translating the second lower voltage representative to the second digital output (See Fig. 1 the A/D converter 6); and
wherein the step of translating the third analog voltage to a third digital output further comprises the steps of:
translating the third analog voltage to a third lower voltage representative (See Para[0025] “The three voltage channels with the three input voltages UL1, UL2, and UL3 are synchronously sampled via the voltage sensors (dividers) 2 and the buffer amplifiers 5 by the A/D converter 6, for instance, with a sampling rate of 5 kHz.”); and
translating the third lower voltage representative to the third digital output (See Fig. 1 the A/D converter 6).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the step of translating the analog voltage to the digital output further comprises the steps of: translating the analog voltage to a lower voltage representative; and translating the lower voltage representative to the digital output; wherein the step of translating the second analog voltage to the second digital output further comprises the steps of: translating the second analog voltage to a second lower voltage representative; and translating the second lower voltage representative to the second digital output; and wherein the step of translating the third analog voltage to a third digital output further comprises the steps of: translating the third analog voltage to a third lower voltage representative; and translating the third lower voltage representative to the third digital output is done like that in Svasek. One of ordinary skill would have been motivated to modify Germer and Wechter because Svasek teaches a more efficient method to translate the voltages to digital outputs by translating all three voltages to their respective digital outputs.
Claim(s) 2, 5, 9, and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Germer and Wechter, and further in view of Leon (US 5396167 A) and Svasek.
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With respect to Claim 2, Germer and Wechter teach the limitations of claim 1.
However, Germer and Wechter are silent to the language of
wherein the analog-to-digital converter samples the analog voltage from the phase current sensor to provide the digital output.
Nevertheless, Leon teaches
the analog-to-digital converter samples the analog voltage(See column 5 lines 62-68 and column 6 lines 1-2 “The analog electrical signals from the three current probes, and the three or four voltage probes are suitably amplified by signal conditioning circuits 52, the various amplifications being such as to take maximum advantage of a subsequent simultaneous-sampling multichannel analog-to-digital circuit (not shown) which converts each analog signal indicative of either instantaneous current or instantaneous voltage (i.e. analog voltage), to a series of digital samples (i.e. provide digital output) equally spaced in time.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the analog-to-digital converter samples the analog voltage to provide the digital output like that in Leon. One of ordinary skill would have been motivated to modify Germer and Wechter because Leon teaches an analog-to-digital converter that simultaneously samples the analog voltage and the analog current, which can allow the circuit in Germer and Wechter to be more compact and efficient in design, instead of having two separate analog-to-digital converters for the current and voltage signals.
Germer, Wechter, and Leon are silent to the language of
the phase current sensor.
Svasek teaches
the phase current sensor (See Fig. 1 the Rogowski sensor 17).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer, Wechter, and Leon wherein the sampling from the phase current sensor is done like that in Svasek. One of ordinary skill would have been motivated to modify Germer, Wechter, and Leon because Svasek teaches the Rogowski sensor which outputs an analog voltage from the input analog current, so Svasek can allow the circuit in Germer and Wechter to be more compact and efficient in design while using the analog-to-digital converter in Leon, instead of having two separate analog-to-digital converters for the current and voltage signals.
With respect to Claim 5, Germer, Wechter, and Svasek teach the limitations of Claim 3.
However, Germer and Wechter are silent to the language of
wherein the analog-to-digital converter samples the lower voltage representative from the voltage reduction circuitry and the analog voltage from the phase current sensor to provide the digital output.
Nevertheless, Leon teaches
wherein the analog-to-digital converter samples both the analog voltage and the analog current to provide the digital output(See column 5 lines 62-68 and column 6 lines 1-2 “The analog electrical signals from the three current probes, and the three or four voltage probes are suitably amplified by signal conditioning circuits 52, the various amplifications being such as to take maximum advantage of a subsequent simultaneous-sampling multichannel analog-to-digital circuit (not shown) which converts each analog signal indicative of either instantaneous current (i.e. analog current) or instantaneous voltage (i.e. analog voltage), to a series of digital samples (i.e. the digital output) equally spaced in time.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the analog-to-digital converter samples both the analog current and the analog voltage to provide the digital output like that in Leon. One of ordinary skill would have been motivated to modify Germer and Wechter because Leon teaches an analog-to-digital converter that samples the analog voltage and the analog current, which can allow the circuit in Germer and Wechter to be more compact and efficient in design, instead of having two separate analog-to-digital converters for the current and voltage signals.
However, Germer, Wechter, and Leon are silent to the language of
the lower voltage representative from the voltage reduction circuitry and the analog voltage from the phase current sensor.
Svasek teaches
the lower voltage representative from the voltage reduction circuitry (See Fig. 2 the voltage divider 4) and the analog voltage from the phase current sensor (See Fig. 1 the Rogowski sensor 17).
4It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer, Wechter, and Leon wherein the lower voltage representative from the voltage reduction circuitry and the analog voltage from the phase current sensor is obtained like that in Svasek. One of ordinary skill would have been motivated to modify Germer, Wechter, and Leon because Svasek teaches the voltage reduction circuitry to reduce the voltage before being fed into the analog-to-digital converter and the Rogowski sensors that can output an analog voltage from the input analog current. Therefore, using the voltage reduction circuitry of Svasek for the voltages in Leon and the Rogowski sensor of Svasek for the currents in Leon can allow the circuit in Germer and Wechter to be more robust against strong power surges that may result in very large voltages while at the same time simultaneously sampling the voltage from the voltage reduction circuitry and the analog voltage from the phase current sensor, which reduces the complexity of the circuit as well.
With respect to Claim 9, Germer, Wechter and Svasek teach the limitations of Claim 8.
However, Germer and Wechter are silent to the language of
the analog-to-digital converter simultaneously samples the analog voltage, the second analog voltage, and the third analog voltage to provide the digital output.
Nevertheless, Leon teaches
the analog-to-digital converter simultaneously samples analog currents to provide the digital output(See column 5 lines 62-68 and column 6 lines 1-2 “The analog electrical signals from the three current probes, and the three or four voltage probes are suitably amplified by signal conditioning circuits 52, the various amplifications being such as to take maximum advantage of a subsequent simultaneous-sampling multichannel analog-to-digital circuit (not shown) which converts each analog signal indicative of either instantaneous current or instantaneous voltage (i.e. the analog voltage), to a series of digital samples (i.e. the digital output) equally spaced in time.” Therefore, Leon teaches the three analog currents being input into the analog-to-digital converter.).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the analog-to-digital converter simultaneously samples analog currents to provide the digital output like that in Leon. One of ordinary skill would have been motivated to modify Germer and Wechter because Leon teaches the analog-to-digital converter to simultaneously sample the current signals, which can allow the circuit in Germer and Wechter to be more efficient and compact by simultaneously sampling the analog currents.
However, Germer, Leon, and Wechter are silent to the language of
the analog voltage, the second analog voltage, and the third analog voltage.
Svasek teaches
the analog voltage, the second analog voltage, and the third analog voltage (See Fig. 1 the Rogowski sensors 15-17) .
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer, Wechter, and Leon wherein the analog voltage, the second analog voltage, and the third analog voltage are obtained like that in Svasek. One of ordinary skill would have been motivated to modify Germer, Wechter, and Leon because Leon teaches the analog-to-digital converter to simultaneously sample the current signals, while Svasek teaches the Rogowski sensors that can output an analog voltage from the input analog current. Therefore, using the three Rogowski sensors of Svasek for the three currents in Leon can allow the circuit in Germer and Wechter to be more efficient and compact by simultaneously sampling the analog voltages from the phase current sensors (i.e. the Rogowski sensors).
With respect to Claim 12, Germer, Wechter, and Svasek teach the limitations of Claim 10.
However, Germer and Wechter are silent to the language of
the analog-to-digital converter samples the lower voltage representative, the second lower voltage representative, and the third lower voltage representative from the voltage reduction circuitry, as well as the analog voltage, the second analog voltage, the third analog voltage of the phase current sensors to provide the digital output.
Nevertheless, Leon teaches
the analog-to-digital converter simultaneously samples the analog voltages and the analog currents to provide the digital output (See column 5 lines 62-68 and column 6 lines 1-2 “The analog electrical signals from the three current probes, and the three or four voltage probes are suitably amplified by signal conditioning circuits 52, the various amplifications being such as to take maximum advantage of a subsequent simultaneous-sampling multichannel analog-to-digital circuit (not shown) which converts each analog signal indicative of either instantaneous current (i.e. analog current) or instantaneous voltage (i.e. analog voltage), to a series of digital samples (i.e. the digital output) equally spaced in time.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer and Wechter wherein the analog-to-digital converter simultaneously samples the analog voltages and the analog currents to provide the digital output like that in Leon. One of ordinary skill would have been motivated to modify Germer and Wechter because Leon teaches the analog-to-digital converter to simultaneously sample the voltage and current signals, which will allow the circuit in Germer and Wechter to be more simplified and efficient.
However, Germer, Wechter, and Leon are silent to the language of
the lower voltage representative, the second lower voltage representative, and the third lower voltage representative from the voltage reduction circuitry, as well as the analog voltage, the second analog voltage, the third analog voltage of the phase current sensors.
Svasek teaches
the lower voltage representative, the second lower voltage representative, and the third lower voltage representative from the voltage reduction circuitry (See Fig. 1 the voltage dividers 4 for all three input voltages), as well as the analog voltage, the second analog voltage, the third analog voltage of the phase current sensors (See Fig. 1 the Rogowski sensors 15-17).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer, Wechter, and Leon wherein the lower voltage representative, the second lower voltage representative, and the third lower voltage representative from the voltage reduction circuitry, as well as the analog voltage, the second analog voltage, the third analog voltage of the phase current sensors are obtained like that in Svasek. One of ordinary skill would have been motivated to modify Germer, Wechter and Leon because Svasek teaches the voltage reduction circuitry to reduce the voltages before being fed into the analog-to-digital converter and the Rogowski sensors that can output analog voltages from the input analog currents. Therefore, using the voltage reduction circuitry of Svasek for the voltages in Leon and the Rogowski sensors of Svasek for the currents in Leon can allow the circuit in Germer and Wechter to be more robust against strong power surges that may result in very large voltages while at the same time simultaneously sampling the voltages from the voltage reduction circuitry and the analog voltages from the phase current sensors, which reduces the complexity of the circuit as well.
4
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Germer, Wechter, and Svasek as applied to claim 19 above, and further in view of Barreau (US 20120019987 A1).
With respect to Claim 20, Germer, Wechter, and Svasek teach the limitations of Claim 19.
However, Germer, Wechter, and Svasek are silent to the language of
the step of using the input line current to power a variable speed drive that supports a load.
Nevertheless, Barreau teaches
the step of using the input line current to power a variable speed drive that supports a load (See Abstract).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Germer, Wechter, and Svasek wherein the step of using the input line current to power a variable speed drive that supports a load is done like that in Barreau. One of ordinary skill would have been motivated to modify Germer, Wechter, and Svasek because Barreau teaches a method that can power a variable speed drive using the input line current, which will allow for a more efficient calculation of the power quality measurements that can help accurately determine the harmonic distortion in the variable speed drive.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOSTOFA AHMED HISHAM whose telephone number is (571)272-8773. The examiner can normally be reached Monday - Thursday, 7:00 a.m. - 4 p.m. ET, Friday 7:00 a.m. - 4 p.m. ET. Every other Friday off.
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/MOSTOFA AHMED HISHAM/Examiner, Art Unit 2857
/Catherine T. Rastovski/Supervisory Primary Examiner, Art Unit 2857