Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 4 and 20 are objected to because of the following informalities: vague element. The “third waveguide structure” in claims 4 and 20 is not mentioned in the specification. While the claims do introduce and then narrow the waveguide structure (over the optical chip, paired with the second reflective structure), further description in the specification would make clear the structural positioning of the waveguide. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 4, 9, and 16 - 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu (US 20230161120 A1) in view of Klamkin (US 20170207600 A1).
Regarding claim 1:
Yu discloses a chip package structure (Title), comprising:
a photonic integrated circuit chip (Figures 1-17 illustrate various cross-sectional views of photonic package 100 at various stages of manufacturing, in accordance with one embodiment) comprising
a dielectric structure (Figure 3, dielectric layer 108),
a photodetector (photonic components 106 “may include, for example, photonic devices such as photodetectors and/or modulators,” paragraph 0026),
an optical modulator (paragraph 0026, “A modulator may be optically coupled to the waveguides 104 to receive electrical signals and generate corresponding optical signals within the waveguides 104 by modulating optical power within the waveguides 104”),
and a first waveguide structure in the dielectric structure (waveguide[s] 104 are formed on silicon layer 102A, any of these may be designated as a first waveguide),
wherein the photodetector and the optical modulator are connected to the first waveguide structure (paragraph 0026, as quoted above, discloses this structure explicitly);
an electronic integrated circuit chip over the photonic integrated circuit chip (Figure 8, electronic dies 122 are disposed over the photonic package 100 and bonded via conductive pads 116), wherein the electronic integrated circuit chip comprises a transistor (the transistor is an integral component of an electronic integrated circuit);
Yu does not explicitly disclose an optical transmission chip over the PIC, but does disclose an interposer with a waveguide that interfaces with the PIC 100 (Figures 25A-25D, interposer 50 is as described in paragraphs 70-71 and provides the same function as the claimed chip despite being an interposer and not necessarily a chip).
Klamkin teaches PICs on silicon photonic chips (Abstract), and further discloses an optical transmission chip (Figure 3, flip chip 100) over a photonic integrated circuit chip (102), wherein the optical transmission chip comprises a substrate (116), a second waveguide structure (gain medium waveguide 106), and a first reflective structure (turning mirror 108), the second waveguide structure (106) and the first reflective structure (108) are between the substrate (116) and the photonic integrated circuit chip (102), and a first angle between a first upper surface of the second waveguide structure and a first sidewall of the first reflective structure is greater than 90 degrees and less than 180 degrees (Figure 3 shows that turning mirror 108 is clearly between 90 and 180 degrees; the mirror is also configurable within the full range of 90 to 180 degrees), and the first sidewall is adjacent to the second waveguide structure (this is shown explicitly in Figure 3)
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the invention of Yu under the teachings of Klamkin to combine the multi-chip photonic package of Yu with the flip-chip optical transmission chip and turning mirror geometry of Klamkin because both references address the problem of integrating optical and electronic chips in a compact package with efficient vertical light coupling between chips. This may have been accomplished using methods, materials, and components known in the art and would predictably result in a compact device which efficiently couples optical signals in a vertically integrated optoelectronic system, minimizing optical loss and volumetric footprint.
Regarding claim 4:
Yu in view of Klamkin discloses the chip package structure as claimed in claim 1.
further comprising:
a third waveguide structure (Figure 30, Yu discloses upper waveguide structures 134A-C, which the examiner interprets as comprising a third waveguide structure);
Yu further teaches a reflective structure in the vertically coupled optical path, namely reflector 145 over grating coupler 107. However, Yu does not explicitly teach the claimed geometry of the structure - as such, Yu does not teach a second reflective structure, or optical transmission chip as claimed. However, in a vertical coupling and/or stack flip chip apparatus, a skilled artisan would find it obvious to incorporate a second mirror to enable the efficient transfer of light through the chip.
Klamkin teaches an optical transmission chip (see rejection of claim 1 above), and a second reflective structure over the substrate of the optical transmission chip (Figure 9 shows a second reflective structure explicitly), wherein a second angle between a second upper surface of the third waveguide structure and a second sidewall of the second reflective structure is greater than 0 degree and less than 90 degrees, and the second sidewall is adjacent to the third waveguide structure (this is also apparent in Figure 9).
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 1 above under the teachings of Klamkin and Yu to configure the upper optical path taught in Yu with a second angled reflective surface of the same type as Klamkin’s turning mirror, because Klamkin expressly teaches that the same flip-chip optical transmission architecture may employ two turning mirrors for coupling and routing of light, making it a natural fit in vertical coupling. This may be accomplished using methods known in the art for etching, placement, and stacking o optical layers and would predictably result in a device wherein light is further redirected through an upper optical path with direction control appropriate for vertical coupling and routing with minimal loss.
Regarding claim 9:
Yu in view of Klamkin teaches the chip package structure as claimed in claim 1, wherein the first waveguide structure (104) overlaps the second waveguide structure (the waveguides 134) in a direction perpendicular to a lower surface of the substrate of the optical transmission chip (Figure 18 depicts this arrangement).
Regarding claim 16:
Yu discloses a chip package structure (Title), comprising:
a photonic integrated circuit chip (Figures 1-17 illustrate various cross-sectional views of photonic package 100 at various stages of manufacturing, in accordance with one embodiment) comprising a dielectric structure (Figure 3, dielectric layer 108),
a photodetector (photonic components 106 “may include, for example, photonic devices such as photodetectors and/or modulators,” paragraph 0026),
an optical modulator (paragraph 0026, “A modulator may be optically coupled to the waveguides 104 to receive electrical signals and generate corresponding optical signals within the waveguides 104 by modulating optical power within the waveguides 104”),
and a first waveguide structure in the dielectric structure (waveguide[s] 104 are formed on silicon layer 102A, any of these may be designated as a first waveguide),
wherein the photodetector and the optical modulator are coupled to the first waveguide structure (paragraph 0026, as quoted above, discloses this structure explicitly);
an electronic integrated circuit chip (Figure 8, electronic dies 122 are disposed over the photonic package 100 and bonded via conductive pads 116),
wherein the electronic integrated circuit chip comprises a transistor (the transistor is an integral component of an electronic integrated circuit);
Yu does not explicitly disclose an optical transmission chip over the PIC, but does disclose an interposer with a waveguide that interfaces with the PIC 100 (Figures 25A-25D, interposer 50 is as described in paragraphs 70-71 and provides the same function as the claimed chip despite being an interposer and not necessarily a chip).
Klamkin teaches PICs on silicon photonic chips (Abstract), and further discloses an optical transmission chip (Figure 3, flip chip 100) over the photonic integrated circuit chip (102),
wherein the optical transmission chip comprises a substrate (116) and a second waveguide structure (waveguides 134), the second waveguide structure is between the substrate (116) and the photonic integrated circuit chip (102), the substrate has a first convex curved surface facing the photonic integrated circuit chip (Figure 17, convex lens 131 faces PIC , and the second waveguide structure is above the first convex curved surface adjacent to the photonic integrated circuit chip (waveguides 134 and PIC 102 are adjacent to one another, as seen in Figure 17, and a skilled artisan would find it obvious to swap the two so that the waveguides are between the PIC and the lens as claimed, as they are part of a larger stacked device and the function of the device would not be altered by this modification).
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the invention of Yu under the teachings of Klamkin, to include a transmission chip over the PIC and a second waveguide structure which is above the PIC, which is above the convex structure. This may be accomplished using components and techniques known in the art (convex lens, routine placement or swapping of parts, stacking methods), and would predictably result in a device which includes a convex lens component that helps to reshape the beam upon reflection, providing fine control over its path and width while minimizing loss during coupling.
Regarding claim 17:
Yu in view of Klamkin discloses the chip package structure as claimed in claim 16.
Yu does not teach the reflective structures as claimed.
Klamkin teaches a first reflective structure (Figure 1, turning mirror 108) adjacent to the waveguide structure (106).
As set forth in the rejection of claim 16 above, Klamkin already teaches that the substrate-facing optical exit region may be provided with a curved optical surface. Thus, in the modified device of claim 16, the mirror of Klamkin remains disposed between the convex curved surface and the PIC chip of Yu, and adjacent to the waveguide 106 of Klamkin.
As such, the combination of claim 16 teaches that the reflective structure is between the convex structure and the PIC, and adjacent to the second waveguide structure.
Regarding claim 18:
-Yu in view of Klamkin teaches the chip package structure as claimed in claim 17, further comprising:
a support chip over the electronic integrated circuit chip and the optical transmission chip (Figure 10, support 128 lies above the EIC and over the optical transmission chip and the molding layers in the combined invention).
Yu does not disclose that the support chip has a second convex (131) curved surface facing away from the optical transmission chip.
Klamkin teaches that an outward-facing surface of a chip/substrate in a vertical coupling optical structure may be provided with a curved optical surface (“a lens could be attached to the bottom of the gain flip chip,” paragraph 98). Klamkin also teaches two lenses, with the addition of lens 2002 in the embodiment of Figure 20, making their use in stacked chip configurations for vertical coupling known and obvious to the art.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 17 above to provide the support chip of Yu with a second convex curved surface facing away from the optical transmission chip, because Yu already teaches the upper support structure over the optical/electronic package, and Klamking teaches forming a lens/curved optical surface on the outward facing surface of a chip/substrate in a vertical coupling optical architecture. This may be accomplished using components, machining techniques, and routine design oversight known to a skilled artisan, and would predictably result in a device which benefits from the mechanical stability of tight stacking architecture and efficient routing of light for vertical coupling with minimal loss.
Regarding claim 19:
-Yu in view of Klamkin teaches the chip package structure as claimed in claim 18.
Yu does not explicitly disclose that the support chip comprises a second reflective structure over the second convex curved surface.
Klamkin discloses a reflective structure in an optical transmission architecture having an outward-facing optical surface. In particular, Klamkin discloses turning mirror 108 in the flip chip optical transmission structure for redirecting light in a vertical-coupling arrangement, and includes that a lens could be attached to the bottom of the gain flip chip and that lenses could be formed directly into the flip chip substrate. Klamkin also discloses a bottom-emitting complementary angle turning-mirror embodiment, represented by element 1700 in Fig 17, in which light is directed through the substrate into the outward facing side.
Thus in the modified device of claim 18, the support 128 of Yu is configured as a support chip having the claimed second convex curved surface facing away from the optical transmission chip, Klamkin provides a reflective structure over that curved surface.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 18 above under the teachings of Klamkin to provide a second reflective structure over the second convex curved surface, because Klamkin teaches that turning mirrors may be used in optical transmission architectures that also employ outward-facing curved/lensed substrate surfaces for beam shaping and coupling. This may be accomplished using known etching, placement, and optical layer fabrication techniques, and would predictably result in an upper optical path having additional control over beam redirection and coupling.
Regarding claim 20:
-Yu in view of Klamkin teaches the chip package structure as claimed in claim 18.
wherein the support chip (128) comprises a third waveguide structure over the second convex curved surface (the second convex structure is part of the second part of the optical path in the invention of claim 18; Yu provides a waveguide or fiber 217B for that path as the third waveguide structure, and it is ‘over’ the second convex curved surface 131 as seen in Figure 25A).
Claim(s) 2, 3, 5, 6, and 11 - 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu (US 20230161120 A1) in view of Klamkin (US 20170207600 A1), and further in view of Heck (US 9195007 B2).
Regarding claim 2:
Yu in view of Klamkin discloses the chip package structure as claimed in claim 1.
Yu does not disclose a dielectric layer.
Klamkin does not explicitly use the term “a dielectric layer in the reflective structure,” but does disclose that one may be used (paragraph 58, “Other integrated optics components could also be incorporated… [such as] metallic or dielectric reflectors.”). A skilled artisan would find it obvious to use industry standard dielectric materials (SiN, SiO2) as part of a reflective structure.
Heck discloses a mirror for PICs (Title), further comprising a dielectric layer (Figure 3, 305B) as a first reflective structure in a vertical coupling structure, and present over mirror facet 221.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 1 above under the teachings of Heck to modify Klamkin’s dielectric reflective structure to match the dielectric layer taught in Heck, because Heck teaches that a dielectric layer may be incorporated into a similar vertical-coupling optical structure. This may be accomplished using methods known to a skilled artisan (CVD, etching, and the methods disclosed in Heck and Klamkin for layering and stacking of the device, naturally circumventing the need for a void as in Heck), and such modification would predictably enable tailored coupling behavior and reflector performance in the Klamkin device.
Regarding claim 3:
Yu in view of Klamkin, and further in view of Heck teaches chip package structure as claimed in claim 2.
Yu does not teach that the width of the dielectric layer decreases towards the substrate.
In the modified device of claim 2, the teaching of Heck provides a device wherein a width of the dielectric layer decreases toward the substrate of the optical transmission chip (Figure 3 – the geometry of the reflective facet 221, containing the dielectric layer 305B is imposed on the reflector of the Klamkin device, where the width of the dielectric layer along the x direction decreases along the z-direction, which is towards the substrate in the combined invention)
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 2 above under the teachings of Heck, to configure the device such that the width of the dielectric layer decreases towards the substrate. This may be accomplished using methods known in the art (placement of parts, machining of layers) and would predictably result in a device where the reflective facet reliably directs light vertically and within a range that is appropriate for vertical coupling with minimal loss.
Regarding claim 5:
Yu in view of Klamkin discloses the chip package structure as claimed in claim 4.
Yu does not disclose a dielectric layer in the second reflective structure.
Klamkin does not explicitly use the term “a dielectric layer in the [second] reflective structure,” but does disclose that one may be used (paragraph 58, “Other integrated optics components could also be incorporated… [such as] metallic or dielectric reflectors.”). A skilled artisan would find it obvious to use industry standard dielectric materials (SiN, SiO2) as part of a reflective structure.
Heck discloses a mirror for PICs (Title), further comprising a dielectric layer (Figure 3, 305B) as a reflective structure in a vertical coupling structure (Figure 3, vertical coupler 301), and present over mirror facet 221. As such, it would be obvious to use the reflective structure for both a first and second reflective structure.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 4 above under the teachings of Heck to modify Klamkin’s dielectric reflective structure to match the dielectric layer taught in Heck, because Heck teaches that a dielectric layer may be incorporated into a similar vertical-coupling optical structure. This may be accomplished using methods known to a skilled artisan (CVD, etching, and the methods disclosed in Heck and Klamkin for layering and stacking of the device, naturally circumventing the need for a void as in Heck), and such modification would predictably enable tailored coupling behavior and reflector performance in the Klamkin device.
Regarding claim 6:
Yu in view of Klamkin, further in view of Heck teaches the chip package structure as claimed in claim 5.
Yu does not teach that a width of the dielectric layer decreases toward the substrate of the optical transmission chip.
In the modified device of claim 5, the teaching of Heck provides a device wherein a width of the dielectric layer decreases toward the substrate of the optical transmission chip (Figure 3 – the geometry of the reflective facet 221, containing the dielectric layer 305B is imposed on the reflector of the Klamkin device, where the width of the dielectric layer along the x direction decreases along the z-direction, which is towards the substrate in the combined invention)
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 5 above under the teachings of Heck, to configure the device such that the width of the dielectric layer decreases towards the substrate. This may be accomplished using methods known in the art (placement of parts, machining of layers) and would predictably result in a device where a reflective facet reliably directs light vertically and within a range that is appropriate for vertical coupling with minimal loss.
Regarding claim 11:
-Yu discloses a chip package structure (Title), comprising:
a photonic integrated circuit chip (Figures 1-17 disclose this at various stages of manufacturing) comprising a dielectric structure (Figure 3, dielectric layer 108), a photodetector (photonic components 106 may be photodetectors), an optical modulator (paragraph 0026 discloses that a modulator may be coupled to the waveguides 104), and a first waveguide structure (104) in the dielectric structure, wherein the photodetector and the optical modulator are coupled to the first waveguide structure (paragraph 0026 discloses this explicitly);
an electronic integrated circuit chip over the photonic integrated circuit chip (Figure 8, electronic dies 122 disposed over the photonic package 100 and bonded via conductive pads 116), wherein the electronic integrated circuit chip comprises a transistor (the transistor is an integral component of an EIC);
Yu does not explicitly disclose an optical transmission chip over the PIC, but does disclose an interposer with a waveguide that interfaces with the PIC 100 (Figures 25A-25D, interposer 50 is as described in paragraphs 70-71 and provides the same function as the claimed chip despite being an interposer and not necessarily a chip).
Klamkin teaches PICs on silicon photonic chips (Abstract), and further discloses an optical transmission chip (Figure 3, flip chip 100) over a photonic integrated circuit chip (102), wherein the optical transmission chip comprises a substrate (116), a second waveguide structure (gain medium waveguide 106), and a first reflective structure (turning mirror 108), the second waveguide structure (106) and the first reflective structure (108) are between the substrate (116) and the photonic integrated circuit chip (102) and adjacent to each other.
Klamkin does not teach the first reflective structure sidewalls, but does teach a first and second reflective structure
Heck teaches a vertical-coupling reflective structure with a first reflective structure (mirror facet 221) that has a first sidewall and a second sidewall opposite to the first sidewall, and a first distance between the first sidewall and the second sidewall decreases toward the substrate (Figure 3 shows how the reflective facet 221 with dielectric layer 305A has opposing sidewalls with a distance decreasing towards a substrate, the upwards direction).
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the invention of Yu under the teachings of Klamkin and Heck to include an optical transmission chip, a photonic integrated circuit chip, a substrate and a waveguide adjacent to a reflective structure wherein the reflective structure has two opposing sidewalls that decrease in distance towards the substrate. This may be implemented using known stacking, bonding, and etching/machining techniques, and would predictably result in a device that contains a reflective layer which reliably directs light vertically and within a range appropriate for minimal loss while maintaining a stable and mechanically robust stacked chip architecture.
Regarding claim 12:
Yu in view of Klamkin and further in view of Heck disclose the chip package structure as claimed in claim 11.
Yu does not disclose that the device further comprises a second reflective structure.
Klamkin discloses a second turnable mirror as a second reflective structure, as part of the optical transmission chip (Figure 7, Figure 8).
Klamkin does not disclose the sidewall structure as claimed.
Heck reaches a reflective structure (Figure 3, dielectric layer 305B on mirror facet 221),
wherein the reflective structure has [an] initial sidewall and a [different] sidewall opposite to the initial sidewall, and a distance between the initial sidewall and the different sidewall decreases toward the direction of the taper (as seen in Figure 3).
The claimed structure is disclosed by Heck, and even if it is not explicitly used twice in the invention of heck, a skilled artisan would find it obvious to modify both the first and second reflective structures in the invention of claim 11 under the teachings of Heck to maintain homogeneity in the processing of light, and leveraging the benefits of improved control, predictable redirection behavior, and coupling/loss optimization compatible with known manufacturing methods.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 11 above under the teachings of Klamkin and Heck to include a second reflective structure disposed such that a third and fourth sidewall decrease in distance from one another in a direction of the substrate. It is a mere duplication of the first reflective structure rotated to enable vertical coupling of light in the device, incorporated through known stacking and machining methods. The proposed structure would predictably improve the control of directed light, coupling/loss, and ease of fabrication.
Regarding claim 13:
Yu in view of Klamkin and further in view of Heck disclose the chip package structure as claimed in claim 12, further comprising vertical coupling in which waveguides 104 and 134 overlap in a direction perpendicular to the lower surface of the upper optical structure. This sets the basic structure for the stacked device.
The invention of claim 12 has two reflective mirrors (as taught in Heck) arranged to enable the vertical coupling of light, in which there are multiple sidewalls that align/overlap with the waveguides.
This means that the device would most simply be constructed such that the first sidewall of the first reflective structure overlaps the fourth sidewall of the second reflective structure in a direction perpendicular to a lower surface of the substrate of the optical transmission chip.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 12 above under the teachings of Yu and Heck to ensure that there is overlap or alignment between the sidewalls of the reflective structures and the waveguides between them. This may be accomplished using ordinary placement and stacking techniques known in the art, and would predictably ensure an optical path which is efficient and optimally uses the volume/spacing within the device.
Claim(s) 14 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu (US 20230161120 A1) in view of Klamkin (US 20170207600 A1), and further in view of Heck (US 9195007 B2) and Chen (US 20200365544 A1).
Regarding claim 14:
Yu in view of Klamkin and further in view of Heck disclose the chip package structure as claimed in claim 12.
Yu does not explicitly disclose an antireflection layer, though their use to reduce optical loss is known in the art.
Chen discloses an anti-reflection layer in a vertically coupled optical structure (paragraph 38, “To reduce optical loss, boundaries between the passive surface 200P of the second semiconductor die 200 and the coupler 205 may [further] include a layer of anti-reflective coating (ARC) (not shown).”)
This reflective layer geometry is analogous to the claimed structure, being between the coupler (which is adjacent to the reflective structure[s]) and the substrate.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 12 above under the teachings of Chen to include an anti-reflection between the second reflective structure and the substrate of the optical chip. This may be accomplished using placement and machining techniques known in the art, and would predictably help mitigate optical loss.
Regarding claim 15:
Yu in view of Klamkin and further in view of Heck disclose the chip package structure as claimed in claim 11.
Yu does not explicitly disclose an antireflection layer, though their use to reduce optical loss is known in the art.
Chen discloses an anti-reflection layer in a vertically coupled optical structure (paragraph 38, “To reduce optical loss, boundaries between the passive surface 200P of the second semiconductor die 200 and the coupler 205 may [further] include a layer of anti-reflective coating (ARC) (not shown).”)
This reflective layer geometry is analogous to the claimed structure, being between the coupler (which is adjacent to the reflective structure[s]) and the substrate.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 11 above under the teachings of Chen to include an anti-reflection between the first reflective structure and the substrate of the optical chip. This may be accomplished using placement and machining techniques known in the art, and would predictably help mitigate optical loss.
Claim(s) 7 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu (US 20230161120 A1) in view of Klamkin (US 20170207600 A1), and further in view of Chen (US 20200365544 A1).
Regarding claim 7:
Yu in view of Klamkin discloses the chip package structure as claimed in claim 1.
Yu does not explicitly teach a molding layer between the EIC chip and optical transmission chip, though their use is commonplace in the art.
Chen teaches a semiconductor package (Title) with stacked electronic and optical semiconductor dies (paragraph 0004, first and second semiconductor dies 100 and 200 may be EICs or PICs), comprising a molding layer (Figure 1A, 1B – the molding compound 105 encapsulates the first die 100 and the conductive elements 103) between the electronic integrated circuit chip and the optical transmission chip (the second die 200 is disposed over the lower package containing die 100 and the molding element).
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 1 above under the teachings of Chen to provide a molding layer between the electronic integrated circuit chip and the optical transmission chip, because Chen teaches the use of a molding compound in a stacked electronic/photonics package to encapsulate, support, and separate package structures. This may be accomplished using known molding and package fabrication techniques, and would predictably result in an improved structural support, isolation, and package robustness.
Regarding claim 8:
Yu in view of Klamkin, and further in view of Chen discloses the chip package structure as claimed in claim 7, further comprising: a support chip over the electronic integrated circuit chip, the optical transmission chip, and the molding layer (Figure 10, support 128 lies above the EIC and over the optical transmission chip and the molding layers in the combined invention).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu (US 20230161120 A1) in view of Klamkin (US 20170207600 A1), and further in view of Chen (US 20200365544 A1) and Ming (US 8378480 B2).
Regarding claim 10:
Yu in view of Klamkin discloses the chip package structure as claimed in claim 1.
Yu does not teach a dummy chip.
Chen teaches a semiconductor package (Title) with stacked electronic and optical semiconductor dies (paragraph 0004, first and second semiconductor dies 100 and 200 may be EICs or PICs), comprising a molding layer (Figure 1A, 1B – the molding compound 105 encapsulates the first die 100 and the conductive elements 103) between the electronic integrated circuit chip and the optical transmission chip (the second die 200 is disposed over the lower package containing die 100 and the molding element).
Ming discloses a dummy chip (title) in a stacked package (i.e. Figure 23), bonded over a first die (as shown in FIG. 4A, back surfaces 18a of top dies 18 are substantially level with top surface 24a of dummy wafer 24). Thus, Ming teaches both a dummy chip over a die and a substantially level top-surface relationship between the dummy structure and an active die.
Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in the rejection of claim 1 above under the teachings of Chen and Ming to provide a dummy chip over the optical transmission chip in the invention of claim 1, wherein a top surface of the dummy chip is substantially level with a top surface of the electronic integrated chip based on the stacking geometry of Chen. This results in a dummy chip over the optical transmission chip, wherein a first top surface of the dummy chip is substantially level with a second top surface of the electronic integrated circuit chip. This may be accomplished using known stacking, bonding, and planarization techniques, and would predictably improve the mechanical stability and level package structure in the device of claim 1.
Additional Prior Art
The following prior art is made of record by the examiner as it is relevant to the present disclosure but not used in any rejection.
Block (US 20100304514 A1) – Teaches several means of optical coupling and the components used therein, illustrating the knowledge of a skilled artisan for placement of parts and manufacturing methods.
Klamkin2 (US 20180081118 A1) – Similar to Klamkin, teaches stacked chip architecture with mirrors for routing and redirection of light.
Conclusion
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/PREET B PATEL/Examiner, Art Unit 2874
/THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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