DETAILED ACTION
This action is responsive to communication filed 11/02/2023.
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Japan on 11/07/2022. It is noted, however, that applicant has not filed a certified copy of the 2022-177935 application as required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 11/02/2023 and 03/07/2025 are acknowledged. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6-8, and 12-16 are rejected under 35 U.S.C. 103 as being unpatentable over Rui et al. (US 8846468 B2) in view of Reed et al. (US 7515397 B2).
Regarding claim 1, Rui et al. (see, e.g., FIG. 1) teaches a method of manufacturing a semiconductor device (100 and col. 5 lines 24-25), the method comprising: forming a lower electrode (102) made of a Ti-containing film (FIG. 2 202 and col. 7 lines 12-17) on a substrate (FIG. 2 201); forming a niobium oxide film (104 and col. 7 lines 24-36) on the lower electrode; forming an oxide-based high-dielectric-constant film (106 and col. 7 lines 37-46) on the niobium oxide film; forming an upper electrode (110) on the oxide-based high-dielectric-constant film; and performing annealing (col. 5 lines 31-32), wherein, through the forming of the oxide-based high-dielectric-constant film, the forming of the upper electrode, and the performing of the annealing, the niobium oxide film is modified into a low-oxidation-number niobium oxide film (col. 5 lines 49-57).
However, Rui et al. fails to teach that the low-oxidation-number niobium oxide film is primarily made of a niobium oxide with an oxidation number lower than Nb2O5.
Reed et al. teaches a method of modifying a niobium film into a low-oxidation-number niobium oxide film that is primarily made of a niobium oxide with an oxidation number lower than Nb2O5 (Eq. 2 and col. 18, line 64 – col. 19, line 17) for the purpose of improving performance by having high dielectric stability, low leakage current, and low flammability (col. 2 lines 1-6).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include a method of modifying a niobium film as described by Reed et al. into the method of manufacturing a semiconductor device as described by Rui et al. for the purpose of improving performance (col. 2 lines 1-6).
Regarding claim 2, Rui et al. teaches the method of claim 1, wherein the Ti-containing film constituting the lower electrode is a TiN film (col. 7 lines 12-17).
Regarding claim 3, Rui et al. teaches the method of claim 1, wherein the oxide-based high-dielectric-constant film is one of a ZrO2 film and a HfO2 film (col. 7 lines 37-46).
Regarding claim 6, Rui et al. teaches the method of claim 1, wherein the low-oxidation-number niobium oxide film has a film thickness in the range of 0.3 nm to 5 nm (col. 5 lines 57-58).
Regarding claim 7, Rui et al. teaches the method of claim 1, wherein the annealing is performed under a reducing atmosphere (col. 5 lines 41-44).
Regarding claim 8, Rui et al. teaches the method of claim 1, wherein the semiconductor device is a DRAM capacitor (col. 1 lines 10-13).
Regarding claim 12, Rui et al. (see, e.g., FIG. 2) teaches a semiconductor device (200) comprising: a substrate (201); a lower electrode made of a Ti-containing film (202 and col. 7 lines 12-17) and formed on the substrate; an oxide-based high-dielectric-constant film which is a capacitive film (206); a low-oxidation-number niobium oxide film (204) provided between the lower electrode and the oxide-based high-dielectric-constant film; and an upper electrode (210) formed on the oxide-based high-dielectric-constant film.
However, Rui et al. fails to teach that the low-oxidation-number niobium oxide film is primarily made of a niobium oxide with an oxidation number lower than Nb2O5.
Reed et al. teaches a method of modifying a niobium film into a low-oxidation-number niobium oxide film that is primarily made of a niobium oxide with an oxidation number lower than Nb2O5 (col. 18 and 19 lines 64-17) for the purpose of improving performance by having high dielectric stability, low leakage current, and low flammability (col. 2 lines 1-6).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include method of modifying a niobium film as described by Reed et al. into the method of manufacturing a semiconductor device as described by Rui et al. for the purpose of improving performance (col. 2 lines 1-6).
Regarding claim 13, Rui et al. teaches the semiconductor device of claim 12, wherein the Ti-containing film constituting the lower electrode is a TiN film (col. 7 lines 12-17).
Regarding claim 14, Rui et al. teaches the semiconductor device of claim 12, wherein the oxide-based high-dielectric-constant film is one of a ZrO2 film and a HfO2 film (col. 7 lines 37-46).
Regarding claim 15, Rui et al. teaches the semiconductor device of claim 12, wherein the semiconductor device is used as a DRAM capacitor (col. 1 lines 10-13).
Regarding claim 16, Rui et al. teaches the semiconductor device of claim 14, wherein the semiconductor device is used as a DRAM capacitor (col. 1 lines 10-13).
Claims 4-5 and 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Rui et al. (US 8846468 B2) in view of Reed et al. (US 7515397 B2) as applied to claim 1 above, and further in view of Metzner et al. (US 7569500 B2).
Regarding claim 4, Rui et al. teaches the method of claim 1, wherein the oxide-based high-dielectric-constant film is formed by ALD or CVD (Rui col. 6 lines 27-39).
However Rui et al. and Reed et al. fail to teach that the ALD or CVD is done using a raw material gas and an oxidizing agent.
Metzner et al. teaches a method of forming a metal oxide high-dielectric-constant film by ALD (col. 2 lines 65-67) using a raw material gas (col. 2 lines 20-23) and an oxidizing agent (col. 2 lines 16-17) for the purpose of improving uniformity (col. 7 lines 33-34).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include method of forming a metal oxide high-dielectric-constant film as described by Metzner et al. into the method of manufacturing a semiconductor device as described by Rui et al. in view of Reed et al. for the purpose of improving uniformity (col. 7 lines 33-34).
Regarding claim 5, Metzner et al. further teaches the method of claim 4, wherein the oxidizing gas is an O3 gas (col. 2 line 16: “ozone”) for the purpose of improving uniformity (col. 7 lines 33-34).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the oxidizing gas being an O3 gas as described by Metzner et al. into the method of manufacturing a semiconductor device as described by Rui et al. in view of Reed et al. for the purpose of improving uniformity (col. 7 lines 33-34).
Regarding claim 9, Rui et al. teaches the method of claim 5, wherein the low-oxidation-number niobium oxide film has a film thickness in the range of 0.3 nm to 5 nm (col. 5 lines 57-58).
Regarding claim 10, Rui et al. teaches the method of claim 5, wherein the annealing is performed under a reducing atmosphere (col. 5 lines 41-44).
Regarding claim 11, Rui et al. teaches the method of claim 5, wherein the semiconductor device is a DRAM capacitor (col. 1 lines 10-13).
Conclusion
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/AIDAN D BANKLER/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 January 15, 2026