Prosecution Insights
Last updated: July 17, 2026
Application No. 18/501,108

PACKAGE ON PACKAGE SEMICONDUCTOR DEVICE WITH INTEGRATED WAVEGUIDE AND METHOD THEREFOR

Non-Final OA §102§112
Filed
Nov 03, 2023
Examiner
NGUYEN, THANH T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
NXP Semiconductors N.V.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
1171 granted / 1406 resolved
+15.3% vs TC avg
Moderate +14% lift
Without
With
+14.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
16 currently pending
Career history
1441
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
69.6%
+29.6% vs TC avg
§102
16.3%
-23.7% vs TC avg
§112
1.1%
-38.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1406 resolved cases

Office Action

§102 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Election/Restrictions Applicant’s election without traverse of group I, claims 10-15, 21-27 in the reply filed on 4/13/26 is acknowledged. Claims 1-9 are withdrawn from further consideration by the examiner, 37 C.F.R. 1.142(b) as being drawn to a non-elected invention. Information Disclosure Statement The information disclosure statements filed 09/29/25; 03/18/25; 05/8/24; 11/3/23 have been considered. Oath/Declaration Oath/Declaration filed on 11/3/23 has been considered. Claim Rejections - 35 USC § 112 Claim 25 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 25 recites the limitation "the second semiconductor die" in line 2. There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 11-12, 14, 21-23, 26 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Zanati et al. (U.S. Patent Publication No. 2024/0224423). Referring to figures 1-4, Zanati et al. teaches semiconductor device comprising: a package substrate (240) including a waveguide (150/250) formed through the package substrate; and a packaged radio frequency (RF) semiconductor device mounted on a first major side of the package substrate, the packaged RF semiconductor device comprising: a semiconductor die (212/110/210/310), an encapsulant (205) encapsulating the semiconductor die, and a redistribution layer (RDL) (333/330) formed over an active side of the semiconductor die and a portion of the encapsulant, a signal launcher (120/235) formed from a conductive layer of the RDL and configured for propagation of an RF signal (333/334) through the waveguide (130/250/350, see figures 2-3). Regarding to claim 11, an antenna (170/270/370) affixed on a second major side of the package substrate, the antenna (170/270/370) directly aligned with the waveguide (130/250/350, see figures 2-3). Regarding to claim 12, a die pad (the contact between the bump 107) at the active side of the semiconductor die is interconnected to the signal launcher by way of the RDL (see figures 2-3). Regarding to claim 14, a conductive lined cavity formed in the encapsulant and located directly below the signal launcher, the conductive cavity configured as a signal reflector (see paragraph# 33). Regarding to claim 21, the waveguide formed through the package substrate is formed as an air-filled waveguide (seed paragraph# 33). Regarding to claim 22, wherein sidewall surfaces of the waveguide are plated with a metal material to form a metal lining of the waveguide (see paragraph# 33). Regarding to claim 23, the packaged RF semiconductor device is characterized as a launcher-in-package formed as a wafer-level package (see figures 2-3, paragraphs# 21, 34). Regarding to claim 24, the package substrate is formed from a substrate-like PCB (SLP) substrate material (see figures 2-3, paragraphs# 21, 36). Regarding to claim 26, the antenna (170/270/370) affixed on the second major side of the package substrate is characterized as a slot antenna (see figures 2-3). Allowable Subject Matter Claims 13, 15 and 27 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. None of the reference teaches or suggests a semiconductor device having a signal path is formed from the die pad at the active side of the semiconductor die to the signal launcher of the RDL without any solder connections (in claim 13); a second semiconductor die mounted on the second major side of the package substrate, the second semiconductor die interconnected with the packaged RF semiconductor device by way of the package substrate (in claim 15); the die pad is interconnected to the signal launcher by way of the RDL without any solder connections (in claim 27). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thanh Nguyen whose telephone number is (571) 272-1695, or by Email via address Thanh.Nguyen@uspto.gov. The examiner can normally be reached on Monday-Thursday from 6:00AM to 3:30PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Yara Green, can be reached on (571) 270-3035. The fax phone number for this Group is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pairdirect.uspto.gov. Should you have questions on access to thy Private PAIR system, contact the Electronic Business center (EBC) at 866-217-9197 (toll-free). /THANH T NGUYEN/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Nov 03, 2023
Application Filed
May 15, 2026
Non-Final Rejection mailed — §102, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12677664
STRESS REDUCTION STRUCTURES FOR A SEMICONDUCTOR DIE IN A COMPOSITE PACKAGE AND METHODS OF FORMING THE SAME
2y 10m to grant Granted Jul 07, 2026
Patent 12672343
RC-IGBT AND MANUFACTURING METHOD OF RC-IGBT
2y 8m to grant Granted Jun 30, 2026
Patent 12666985
SEMICONDUCTOR DEVICE WITH HYBRID ROUTING AND METHOD THEREFOR
2y 11m to grant Granted Jun 23, 2026
Patent 12660163
SEMICONDUCTOR DEVICE
2y 8m to grant Granted Jun 16, 2026
Patent 12648488
SEMICONDUCTOR DEVICE
2y 11m to grant Granted Jun 02, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
97%
With Interview (+14.0%)
2y 9m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1406 resolved cases by this examiner. Grant probability derived from career allowance rate.

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