Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
DETAILED ACTION
This is an AIA application filed November 7, 2023.
The earliest effective filing date of this AIA application is seen as November 7, 2023, the actual filing date, there being no earlier priority applications.
The claims originally filed November 7, 2023 are entered, currently outstanding, and subject to examination.
This action is in response to the filing of November 24, 2023.
Claims 1-20 are currently pending and outstanding.
No claims have been amended, cancelled, withdrawn, or added.
Claims 1-20 are currently outstanding and subject to examination.
Allowable subject matter is not indicated below.
Often, in the substance of the action below, formal matters are addressed first, claim rejections second, and any response to arguments third.
Special Definitions for Claim Language - MPEP § 2111.01(IV)
No special definitions as defined by MPEP § 2111.01(IV) are seen as present in the specification regarding the language used in the claims. Consequently, the words and phrases of the claims are given their plain meaning. MPEP §§ 2173.01, 2173.05(a), and 2111.01.
If special definitions are present, Applicant should bring those to the attention of the examiner and the prosecution history with its next response in a manner both specific and particular. In doing so, there will be no mistake, confusion, and/or ambiguity as to what constitutes the special definition(s). Per above, such special definitions must conform to the requirements of MPEP § 2111.01(IV).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, 8-11, 15, 17, and 20 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by U.S. Patent Application Publication No. 20220342150 of Karhade et al. (Karhade).
With respect to claim 1, Karhade discloses a package assembly (Fig. 1A, ¶¶ 36 et seq., photonic package 100), comprising:
a photonic integrated circuit component ("As shown, photonic package 100 may include a PIC 102, with an active side 104 [Fig. 1B].") comprising an optical input/output portion (at 148, generally) configured to transmit and receive optical signal (¶ 37, "Electro-optical device 108 [a part of active side 104] can enable receiving, transforming, and transmitting optical signals.");
an electric integrated circuit component (¶ 44, "Turning back to FIG. 1A, PIC 102 may be electrically coupled by way of interconnects 112 to an EIC 114 situated in an interposer 116. Interconnects 112 may comprise die-to-die (DTD) interconnects along with associated conductive traces, planes, vias, and pads enabling electrical coupling between PIC 102 and EIC 114."),
electrically connected to the photonic integrated circuit component (per the interconnects 112);
a lens (¶ 59, "PIC 102 may be optically coupled to an optical lens 138 using any suitable attachment means, for example, optical glue 140, on at least a portion of a lateral side 142 of PIC 102.") disposed on a sidewall (142) of the photonic integrated circuit component (102); and
an optical signal port (¶ 59, optical fiber 144) optically coupled to the optical input/output portion.
With respect to claim 2, Karhade as set forth above discloses the package assembly as claimed in claim 1, including one wherein
the lens (138) is directly in contact with the sidewall (142 and including the optical glue 140) of the photonic integrated circuit component (102), and
aligned with the optical input/output portion (per Fig. 1A).
With respect to claim 3, Karhade as set forth above discloses the package assembly as claimed in claim 1, including one wherein
the lens (138) is disposed on the sidewall (142) of the photonic integrated circuit component (102) via an adhesive layer (optical glue 140), and
aligned with the optical input/output portion (per Fig. 1A).
With respect to claim 4, Karhade as set forth above discloses the package assembly as claimed in claim 1, including one wherein
the optical signal port (144) comprises a fiber (144) laterally aligned with the lens (138) and the optical input/output portion (per Fig. 1A).
With respect to claim 5, Karhade as set forth above discloses the package assembly as claimed in claim 4, including one wherein
the fiber (144) is optically coupled to the optical input/output portion through the lens (138 and per Fig. 1A).
With respect to claim 8, Karhade as set forth above discloses a package assembly, comprising:
an optical engine (Fig. 1A, photonic package 100) comprising:
a photonic integrated circuit component (102) comprising an optical input/output portion (at 148, generally) configured to transmit and receive optical signal (¶ 37, "Electro-optical device 108 [a part of active side 104] can enable receiving, transforming, and transmitting optical signals.");
an electric integrated circuit component (¶ 44, "Turning back to FIG. 1A, PIC 102 may be electrically coupled by way of interconnects 112 to an EIC 114 situated in an interposer 116. Interconnects 112 may comprise die-to-die (DTD) interconnects along with associated conductive traces, planes, vias, and pads enabling electrical coupling between PIC 102 and EIC 114."),
electrically connected to the photonic integrated circuit component (per the interconnects 112);
an insulating encapsulant encapsulating the electric integrated circuit component (¶ 47, "In various embodiments, interposer 116 may comprise any suitable insulating material, such as an organic material, for example, a polymer with fillers."); and
a support layer disposed on the electric integrated circuit component and the insulating encapsulant (¶ 51, "Underfill 130 (also referred to as “first-level underfill” or “underfill of a first-level”) may be between interposer 116 and XPU 118 and PIC 102.");
a lens (138) secured on a sidewall (142) of the photonic integrated circuit component (102); and
an optical signal port (¶ 59, optical fiber 144) connected with the optical engine and (Fig. 1A right) optically coupled to the optical input/output portion through the lens (138).
With respect to claim 9, Karhade as set forth above discloses the package assembly as claimed in claim 8, including one wherein
the sidewall (142) of the photonic integrated circuit component (102) is substantially leveled with a sidewall of the insulating encapsulant (per Fig. 1A right).
With respect to claim 10, Karhade as set forth above discloses the package assembly as claimed in claim 8, including one wherein
the lens (138) is directly in contact with the sidewall (142 and including the optical glue 140) of the photonic integrated circuit component (102).
With respect to claim 11, Karhade as set forth above discloses the package assembly as claimed in claim 8, including one wherein
the lens (138) is attached on the sidewall (142) of the photonic integrated circuit component (102) via an adhesive layer (140).
With respect to claim 15, Karhade as set forth above discloses the package assembly as claimed in claim 8, including one wherein
the optical signal port comprises a fiber (144) facing the sidewall (142) of the photonic integrated circuit component (102).
With respect to claim 17, Karhade as set forth above discloses a manufacturing method of a package assembly, comprising:
providing an optical engine (Fig. 1A, photonic package 100) comprising:
a photonic integrated circuit component (102) comprising an optical input/output portion (148) configured to transmit and receive optical signal;
an electric integrated circuit component (114),
electrically connected to the photonic integrated circuit component (102 and via interconnects 112);
an insulating encapsulant laterally surrounded the electric integrated circuit component (116); and
a support layer disposed on the electric integrated circuit component and the insulating encapsulant (130);
securing a lens (138) on a sidewall (142) of the photonic integrated circuit component (102); and
attaching an optical signal port (Fig. 1A right side with fiber 144) onto the optical engine.
The method of claim 17 above would naturally occur in the construction and/or manufacture of a device as set forth in claim 8, above.
With respect to claim 20, Karhade as set forth above discloses the manufacturing method as claimed in claim 17, including one further comprising:
using the optical signal port to check an alignment between the lens (138) and the optical input/output portion.
Seen as inherent to ensure a functioning and useful object having utility.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims, the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 6, 7, 12-14, and 16 are rejected under 35 U.S.C. § 103 as being unpatentable over Karhade as set forth above in view of U.S. Patent Application Publication No. 20230087809 of Li et al. (Li).
With respect to claim 6, Karhade as set forth above discloses the package assembly as claimed in claim 1, but not one wherein
the optical signal port comprises:
an optical component with a reflective surface facing downwardly toward the lens (138); and
a fiber (144) aligned with the reflective surface of the optical component.
Li discloses a photonic integrated circuit packaging architectures that includes (Figs. 22-26B):
the optical signal port (aperture 158, ¶ 87) comprises:
an optical component (integrated light-reflective optical component 174, ¶ 143) with a reflective surface ("the light-reflective optical component 174 includes an embedded reflector 175 for reflecting light", ¶ 143) facing downwardly (per Fig. 22) toward the lens (optical lens 138); and
a fiber aligned with the reflective surface of the optical component ("The photonic package 100 may further include a package substrate 124 having an aperture 158 (e.g., a through-hole) for propagating optical signals through the package substrate 124. In some embodiments, optical fiber may be placed within or proximate to the aperture so that optical signals may be exchanged between PIC 102 and the optical fiber.").
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use a reflective surface and optical fiber along the lines of Li in a system according to Karhade as set forth above in order to provide configurable signal paths. This provides one rationale to combine the references.
Another completely independent and separately sufficient rationale arises as follows. In making the combination (above), the combining of prior art elements (listed above) according to known methods (per the references) to yield predictable results (a photonic integrated circuit/PIC) would occur as each element merely performs the same function in combination as it does separately. MPEP § 2141(III). This additional rationale is a sufficient, a complete, and an explicitly-recognized rationale to combine the references and conclude that the claim is obvious both under the controlling KSR Supreme Court case and MPEP § 2141(III)(A). Current Office policy regarding the determination of obviousness is set forth in the Federal Register notice at 89 Fed. Reg. 14449 (Feb. 27, 2024).
Further, the combination would then provide:
an optical component with a reflective surface facing downwardly toward the lens; and
a fiber aligned with the reflective surface of the optical component.
With respect to claim 7, Karhade as set forth above discloses the package assembly as claimed in claim 6, including one wherein
the fiber is optically coupled to the optical input/output portion through the lens and the optical component.
Per Fig. 1A.
With respect to claim 12, Karhade as set forth above discloses the package assembly as claimed in claim 8, but not one further comprising
a socket attached on the support layer.
Li discloses a photonic integrated circuit packaging architectures that includes (Figs. 22-26B):
a socket (aperture 158 generally) attached on the support layer (package substrate 124).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide a socket attached to a support layer along the lines of Li in a system according to Karhade as set forth above in order to provide connection means. This provides one rationale to combine the references.
Another completely independent and separately sufficient rationale arises as follows. In making the combination (above), the combining of prior art elements (listed above) according to known methods (per the references) to yield predictable results (a photonic integrated circuit/PIC) would occur as each element merely performs the same function in combination as it does separately. MPEP § 2141(III). This additional rationale is a sufficient, a complete, and an explicitly-recognized rationale to combine the references and conclude that the claim is obvious both under the controlling KSR Supreme Court case and MPEP § 2141(III)(A). Current Office policy regarding the determination of obviousness is set forth in the Federal Register notice at 89 Fed. Reg. 14449 (Feb. 27, 2024).
Further, the combination would then provide:
a socket attached on the support layer.
With respect to claim 13, Karhade in view of Li as set forth above discloses the package assembly as claimed in claim 12, including one wherein
the optical signal port is connected with the optical engine via the socket.
Per Li, Fig. 22.
With respect to claim 14, Karhade in view of Li as set forth above discloses the package assembly as claimed in claim 13, including one further comprising
a connection component (light-reflective optical component 174 with embedded reflector 175, ¶ 143) connected between the optical signal port and the socket.
With respect to claim 16, Karhade in view of Li as set forth above discloses the package assembly as claimed in claim 8, including one wherein
the optical signal port comprises:
an optical component (Li per above, integrated light-reflective optical component 174, ¶ 143) with a reflective surface ("the light-reflective optical component 174 includes an embedded reflector 175 for reflecting light", ¶ 143) facing downwardly (per Fig. 22) toward the lens (optical lens 138); and
a fiber aligned with the reflective surface of the optical component ("The photonic package 100 may further include a package substrate 124 having an aperture 158 (e.g., a through-hole) for propagating optical signals through the package substrate 124. In some embodiments, optical fiber may be placed within or proximate to the aperture so that optical signals may be exchanged between PIC 102 and the optical fiber.").
See claim 6, above.
Claims 18 and 19 are rejected under 35 U.S.C. § 103 as being unpatentable over Karhade as set forth above in view of U.S. Patent Application Publication No. 20220291461 of Elsinger et al. (Elsinger).
With respect to claim 18, Karhade as set forth above discloses the manufacturing method as claimed in claim 17, including one wherein
the steps of securing a lens (138) on a sidewall (142) of the photonic integrated circuit component (102) comprising forming the lens (138) on the sidewall (142) of the photonic integrated circuit component (102).
Elsinger discloses an optical fiber-to-chip interconnection that includes (¶ 517):
forming lenses by a 3D printing process.
"In some embodiments, the functionalities of lenses 541 and 542 can be combined into a single aspheric refractive element, which can be 3D printed using technologies, such as those offered for sale by Nanoscribe of Eggenstein-Leopoldshafen, Germany."
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use 3D printing methods for lens construction along the lines of Elsinger in a system according to Karhade as set forth above in order to provide alternative manufacturing methods capable of software reconfiguration. This provides one rationale to combine the references.
Another completely independent and separately sufficient rationale arises as follows. In making the combination (above), the combining of prior art elements (listed above) according to known methods (per the references) to yield predictable results (a photonic integrated circuit/PIC) would occur as each element merely performs the same function in combination as it does separately. MPEP § 2141(III). This additional rationale is a sufficient, a complete, and an explicitly-recognized rationale to combine the references and conclude that the claim is obvious both under the controlling KSR Supreme Court case and MPEP § 2141(III)(A). Current Office policy regarding the determination of obviousness is set forth in the Federal Register notice at 89 Fed. Reg. 14449 (Feb. 27, 2024).This additional rationale also prevents taking from the public domain that which should remain within it.
Further, the combination would then provide:
the steps of securing a lens (138) on a sidewall (142) of the photonic integrated circuit component (102) comprising forming the lens (138) on the sidewall (142) of the photonic integrated circuit component (102) by a 3D printing process.
With respect to claim 19, Karhade as set forth above discloses the manufacturing method as claimed in claim 17, including one wherein
the step of securing a lens (138) on a sidewall (142) of the photonic integrated circuit component (102) comprising:
forming the lens (138) by a 3D printing process; and
attaching the lens (138) on the sidewall (142) of the photonic integrated circuit component (102) via an adhesive layer.
The lens of claim 18 formed by Elsinger is seen as separably achievable per known/usual 3D printing processes.
Conclusion
Applicant’s publication US 20250147245 A1 published May 8, 2025 is cited.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited references have elements related to Applicant’s disclosure and/or claims or are otherwise associated with the other cited references, particularly with respect to PIC/EIC packages and related devices.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW JORDAN whose telephone number is (571) 270-1571. The examiner can normally be reached most days 1000-1800 PACIFIC TIME ZONE (messages are returned).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. While examiner does not examine over the phone (see 37 C.F.R. § 1.2), examiner is glad to clarify or discuss issues so long as it forwards prosecution.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas (Tom) HOLLWEG can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Andrew Jordan/
Primary Examiner, Art Unit 2874
V: (571) 270-1571 (Pacific time)
F: (571) 270-2571
March 19, 2026