Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Amendment filed on 4/8/26 has been entered.
Response to Arguments
The applicant argues that De Vleeschouwer fails to teach the arrangement of a sense transistor with respect to a main transistor, and further fails to disclose that a sense gate finger is integral with a gate finger of the main transistor. The examiner respectfully disagrees.
At the outset, the features relied upon by the applicant—namely, the “main transistor” and a particular arrangement of the sense transistor relative thereto—are not recited in the rejected claims. The claims recite a “switching Group III nitride transistor device” and a “current sense Group III nitride transistor device” formed in a Group III nitride-based semiconductor body, but do not require any specific arrangement corresponding to the applicant’s characterization of a “main transistor.” While claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Furthermore, the claims expressly recite that “the sense gate finger is integral with one of the gate fingers of the plurality of transistor cells of the switching Group III nitride transistor device.” The term “integral” is understood to mean “formed as a unit with another part” (see https://www.merriam-webster.com/dictionary/integral). De Vleeschouwer explicitly discloses explicitly discloses interconnected gate fingers (see Fig. 3, element 75), wherein the sense gate finger is formed as a unit with one of the gate fingers of the switching transistor cells. Thus, the cited reference teaches the claimed feature.
Accordingly, De Vleeschouwer discloses each and every limitation of the claimed invention, and the rejection under 35 U.S.C. § 102(a)(2) is maintained.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-6, 8, 11 and 17 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by De Vleeschouwer (US 20220020872).
Regarding claim 1. Fig 4 of De Vleeschouwer discloses A Group III nitride transistor device [0025], comprising:
a Group III nitride-based semiconductor body 84 [0025] comprising a Group III nitride barrier layer 87 ([0025]: AlGaN) arranged on a Group III nitride channel layer 86 ([0025]: GaN) and forming a heterojunction therebetween capable of supporting a two-dimensional charge gas [0025];
a switching Group III nitride transistor device 21a/21b (they are switching transistors used in the power unit configuration form a complementary pair under control of the driver circuit) and a current sense Group III nitride transistor device 24 [0019] formed in the Group III nitride-based semiconductor body;
wherein the current sense Group III nitride transistor device is electrically insulated from the switching Group III nitride transistor device by local interruption of the two-dimensional charge gas (via 89),
wherein the switching Group III nitride transistor device comprises a plurality of active transistor cells 21a/21b, each active transistor cell comprising a source finger (Fig 3: 58 in 21a, 67 in 21b), a gate finger (Fig 3: 60/61 in 21a, 69/70 in 21b), and a drain finger (Fig 3: 55/56 in 21a, 64/65 in 21b) on the first major surface, the gate finger being laterally positioned between the source finger and the drain finger (Fig 3),
wherein the current sense Group III nitride transistor device comprises at least one sense transistor cell 24, each sense transistor cell comprising a sense source finger 79 (Fig 3), a sense gate finger 78 (Fig 3), and a sense drain finger 77 (Fig 3, refer to the above claim objection) on the first major surface, the sense gate finger being laterally positioned between the sense source finger and the sense drain finger (Fig 3),
wherein the sense gate finger is integral with one of the gate fingers of the plurality of transistor cells of the switching Group III nitride transistor device (Fig 3: each gate fingers are integrated via 75).
Regarding claim 2. De Vleeschouwer discloses The Group III nitride transistor device of claim 1, wherein the two-dimensional charge gas is locally interrupted by an isolation region 89 (Fig 3, which show top plan view, and Fig 4).
Regarding claim 3. De Vleeschouwer discloses The Group III nitride transistor device of claim 2, wherein the isolation region has the form of a closed ring that laterally surrounds the current sense Group III nitride transistor device (as shown in Fig 3 and Fig 4 and disclosed in [0026], the whole area of 24 is completely surrounded by 89, thus being a form of closed ring).
Regarding claim 4. De Vleeschouwer discloses The Group III nitride transistor device of claim 2, wherein the isolation region comprises an implanted region having a disrupted or damaged crystal structure ([0026]: ‘isolation 89 formed by implanting nitrogen or other materials into substrate 84’. Thus inherently having a disrupted or damaged crystal structure).
Regarding claim 5. De Vleeschouwer discloses The Group III nitride transistor device of claim 2, wherein the Group III nitride-based semiconductor body comprises a first major surface (Fig 4: top surface), and wherein the isolation region comprises a trench extending into the first major surface (Fig 4) and comprising insulating material ([0026]: ‘isolation 89 may be formed by implanting nitrogen or other materials into substrate 84 in order to prevent formation of the 2DEG in regions external to active area 76 and external to active areas 53 and 63’. Thus, the isolation 89 inherently includes insulating material).
Regarding claim 6. De Vleeschouwer discloses The Group III nitride transistor device of claim 2, wherein the Group III nitride-based semiconductor body comprises a first major surface (Fig 4: top surface), and wherein the isolation region has a depth from the first surface that is greater than a depth of the heterojunction from the first major surface (Fig 4: because the bottom surface of 89 is deeper than the heterojunction).
Regarding claim 8. De Vleeschouwer discloses The Group III nitride transistor device of claim 7, wherein each sense source finger has a length that is aligned with a length of one of the source fingers of the plurality of active transistor cells and is spaced apart from that source finger by a first gap and a portion of the isolation region is positioned in the first gap (Fig 3).
Regarding claim 11. De Vleeschouwer discloses The Group III nitride transistor device of claim 7, wherein the sense drain finger has a length that is aligned with a length of one of the drain fingers of the plurality of transistor cells and spaced apart from that drain finger by a second gap (Fig 3) and a portion of the isolation region is positioned in the second gap (Fig 3).
Regarding claim 17. (New) De Vleeschouwer discloses the Group III nitride transistor device of claim 11, wherein an electrical connection between the sense gate finger and the gate finger of the switching Group III nitride transistor device is positioned in a different plane from an electrical connection between the sense drain finger and the drain finger of the switching Group III nitride transistor device.
As illustrated in Fig. 4 of De Vleeschouwer, the electrical connections corresponding to elements 61/60, 69/70, and 78 (labeled as 107) are formed in an upper metallization layer, while the electrical connections corresponding to elements 77, 55/56, and 64/65 are formed in a lower metallization layer. The upper metallization layer is physically separated from the lower metallization layer, thereby defining distinct conductive planes.
Accordingly, the connection between the sense gate finger and the gate finger is formed in the upper conductive plane, whereas the connection between the sense drain finger and the drain finger is formed in the lower conductive plane. Therefore, De Vleeschouwer teaches that these electrical connections are positioned in different planes, as required by claim 17.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9 and 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over De Vleeschouwer (US 20220020872).
Regarding claim 9. Fig 3 of De Vleeschouwer discloses The Group III nitride transistor device of claim 7, further comprising:
a source metallization finger 59 arranged on the source finger of each active transistor cell (Fig 3); and
a sense source metallization finger 80 arranged on the sense source finger (Fig 3).
But Fig 3 of De Vleeschouwer does not disclose wherein the source metallization fingers and the sense source metallization finger are spaced apart and electrically insulated from one another.
However, Fig 5 of of De Vleeschouwer discloses the source metallization fingers 92 and the sense source metallization finger 93 are spaced apart and electrically insulated from one another (Fig 5).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the embodiment Fig 3 of De Vleeschouwer to have the structure of the embodiment Fig 5 of De Vleeschouwer for the purpose of providing accurate voltage sensing by eliminating voltage drop (impedance) from main current path, ensuring the control signal sees the true voltage at the device's die, not the voltage at the package pin, leading to precise gate drive and better performance in power applications. Thus, preventing the power supply or load resistance from distorting the voltage seen by the transistor's gate, crucial for high-efficiency switching.
Regarding claim 12. Fig 3 of De Vleeschouwer discloses The Group III nitride transistor device of claim 11 except wherein the sense drain finger is electrically connected to a drain finger of the plurality of transistor active cells of the switching Group III nitride transistor device by a drain metallization finger that extends over the second gap.
However, Fig 5 of of De Vleeschouwer discloses the sense drain finger 141/142 is electrically connected to a drain finger 55/56/64/65 of the plurality of transistor active cells of the switching Group III nitride transistor device by a drain metallization finger that extends over the second gap (via 95).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the embodiment Fig 3 of De Vleeschouwer to have the structure of the embodiment Fig 5 of De Vleeschouwer for the purpose of providing enhanced accuracy by providing a direct, low-resistance path to monitor the actual drain voltage/current of parallel active cells, crucial for high-speed switching, reducing voltage drops, enabling better thermal management, and ensuring reliable performance in power electronics, leading to higher efficiency and power density.
Regarding claim 13. Fig 3 of De Vleeschouwer in view of Fig 5 of De Vleeschouwer discloses The Group III nitride transistor device of claim 12, Fig 5 of De Vleeschouwer discloses wherein the drain metallization finger is arranged on and extends between one of the drain fingers of the plurality of transistor active cells of the switching Group III nitride transistor device and the sense drain finger (Fig 5).
Regarding claim 14. Fig 3 of De Vleeschouwer in view of Fig 5 of De Vleeschouwer discloses The Group III nitride transistor device of claim 12, Fig 5 of De Vleeschouwer discloses further comprising:
a source pad 50, a drain pad 47, a gate pad 30, and a current sense pad 51,
wherein the source fingers of the switching Group III nitride transistor device are electrically coupled to the source pad (Fig 5: via 92),
wherein the sense source fingers of the current sense Group III nitride transistor device are electrically coupled to the current sense pad (Fig 5: via 93),
wherein the gate fingers of the switching Group III nitride transistor device and the sense gate fingers of the current sense Group III nitride transistor device are electrically coupled to the gate pad (Fig 5: via 75),
wherein the drain fingers of the switching Group III nitride transistor device and the sense drain fingers of the current sense Group III nitride transistor device are electrically coupled to the drain pad (Fig 5: via 95).
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over De Vleeschouwer (US 20220020872) in view of Dix (US 20180313874).
Regarding claim 15. De Vleeschouwer discloses The Group III nitride transistor device of claim 1 except wherein a current ratio between the switching Group III nitride transistor and the current sense Group III nitride transistor is 5000 or more.
However, the claimed current ratio 5000 or more between a power switching GaN transistor and its integrated current sense transistor is a widely recognized and highly effective design variable for modern power electronics. For example, Dix discloses a range of 10000 between main transistor and the sense transistor [0042]/[0043]. And thus, the ordinary artisan would have recognized the claimed range to be a result effective variable affecting to achieve large current ratio in an integrated device. Thus, it would have been obvious that the De Vleeschouwer’s device has the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B
It is further noted that the specification contains no disclosure of either the critical nature of instant claimed range or any unexpected results arising thereof. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art).
Regarding claim 16. De Vleeschouwer in view of Dix discloses The Group III nitride transistor device of claim 15, De Vleeschouwer discloses wherein the current sense Group III nitride transistor device comprises a single sense source finger 79, a single sense drain finger 77, and a single sense gate finger 78.
But De Vleeschouwer does not explicitly disclose wherein a length of the sense source finger and a length of the sense drain finger are selected so as to provide the current ratio of 5000 or more.
However, the claimed current ratio 5000 or more between a power switching GaN transistor and its integrated current sense transistor is a widely recognized and highly effective design variable for modern power electronics. For example, Dix discloses a range of 10000 between main transistor and the sense transistor [0042]/[0043]. And thus, the ordinary artisan would have recognized the claimed range to be a result effective variable affecting to achieve large current ratio in an integrated device. Thus, it would have been obvious that the De Vleeschouwer’s device has the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B
It is further noted that the specification contains no disclosure of either the critical nature of instant claimed range or any unexpected results arising thereof. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art).
Allowable Subject Matter
Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 18. the cited prior art of record does not teach or fairly suggest, along with the other claimed features, “the sense gate finger is formed by a portion of one of the gate fingers of the switching Group III nitride transistor device to form a common gate finger that is arranged directly on the first major surface of the Group III nitride-based semiconductor body, and wherein an intermediate drain finger extends from the sense drain finger to the drain finger of the switching Group III nitride transistor device and is arranged in a plane above the first major surface of the Group III nitride-based semiconductor body”.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Changhyun Yi whose telephone number is (571)270-7799. The examiner can normally be reached Monday-Friday: 8A-4P.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached on 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Changhyun Yi/Primary Examiner, Art Unit 2812
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