Prosecution Insights
Last updated: May 29, 2026
Application No. 18/505,412

HEAT DISSIPATION STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME

Non-Final OA §103
Filed
Nov 09, 2023
Priority
Mar 24, 2023 — RE 10-2023-0039169 +1 more
Examiner
WOLDEGEORGIS, ERMIAS T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
83%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
533 granted / 753 resolved
+2.8% vs TC avg
Moderate +12% lift
Without
With
+12.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
32 currently pending
Career history
798
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
90.7%
+50.7% vs TC avg
§102
7.8%
-32.2% vs TC avg
§112
0.9%
-39.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 753 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). Information Disclosure Statement The information disclosure statements filed on 11/09/2023 has been acknowledged and a signed copy of the PTO-1449 is attached herein. Claim Objections Claim 19 is objected to because of the following informalities: Contains a duplicated “of the” in line 4. Appropriate correction is required. Claim 20 is objected to because of the following informalities: The “comprises a” in line 2 is a typo. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2024/0030097 A1, hereinafter “Chen”) in view of Topping et al. (WO 1999/004429 A1, hereinafter “Topping”). In regards to claim 1, Chen discloses (See, for example, Figs. 2-3) a heat dissipation structure comprising: a heat dissipation chamber (23) including a lower wall, an upper wall (237) on the lower wall (238), and a plurality of sidewalls (walls extending there between the upper and lower walls, See Figs. 3-2(a) and 3-2(b)) extending between the lower wall (238) and the upper wall (237), the heat dissipation chamber (23) providing an inner space for a working fluid to flow therein (“a little liquid, such as water, is sealed in the vapor chamber”, See Par [0045]); and a wick structure (capillary structure 235) on an inner surface of the heat dissipation chamber (23), the wick structure (235) being configured to guide the working fluid in a liquid state (“the vapors will be condensed into liquid again on the cold zone …and flow back to the heat source through the capillary structure”, See Par [0045]). Chen is silent about that wherein the heat dissipation chamber is configured to change its shape according to a temperature. Topping while disclosing a heat dissipation structure teaches (Figs. 1, 3A-3B) the heat dissipation chamber is configured to change its shape according to a temperature (“When the heat sink 10 is composed of a two-way SMA, each fin portion 14 will exhibit a first shape when the heat sink 10 is below the SMAs transformation temperature Tt, as illustrated in Fig. 3A, and will exhibit a second shape when the heat sink 10 is at or above Tt, as shown in Fig. 3B. , See, for example, page 5 lines 32-36). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the upper wall of Chen’s vapor chamber to be composed of a shape memory alloy as taught by Topping because this would help enhance heat dissipation by exploiting the additional heat absorption that occurs during SMA phase transformation. In regards to claim 2, Chen as modified above discloses (See, for example, Figs. 5B and 5C, Topping) that wherein a surface area of a top surface (top surface of 14) of the heat dissipation chamber at a first temperature (T<Tt) is less than a surface area of the top surface of the heat dissipation chamber at a second temperature (T≥Tt), and the second temperature is higher than the first temperature (the deflectable fin portions 14 transition from a “bent” shape (See, Fig. 5B) to an upright “as-manufactured” shape (See, Fig. 5C) when the heat sink temperature reaches or exceeds Tt, as a result increasing the exposed surface area at a higher (second) temperature relative to the lower (first) temperature, See for example, Page 7 line 27 through page 8 line 3). In regards to claim 3, Chen as modified above discloses (See, for example, Figs. 5B and 5C, Topping) that wherein, at the first temperature (T<Tt), the top surface of the heat dissipation chamber has a flat shape (See, Fig. 5B), and, at the second temperature (T≥Tt), the top surface of the heat dissipation chamber has a plurality of patterns (14) having a concavo-convex shape (bent configuration, See for example, Fig. 5C). In regards to claim 4, Chen as modified above discloses (See, for example, Figs. 5, Topping) that wherein the plurality of patterns are arranged in rows and columns in a matrix-like shape on the top surface of the heat dissipation chamber (an array of fin portions 14 arranged at the base portion 12 in a row-and-column configuration, See, for example, Figs. 5). In regards to claim 5, Chen as modified above discloses that wherein a shape of a vertical cross-section of each of the plurality of patterns (14, Fig. 5B, Topping) comprises at least one of a semicircle, a rectangle, and a triangle (See, for example, Fig. 5B, Topping). In regards to claim 6, Chen as modified above discloses (See, for example, Figs. 5A-5C, Topping) that wherein the shape of the heat dissipation chamber changes reversibly according to the temperature (See, Page 8 lines 4-9). In regards to claim 7, Chen as modified above discloses (See, for example, Figs. 5, Topping) that wherein the heat dissipation chamber comprises a shape memory alloy (See, page 2 lines 4-10; page 3 lines 4-7; See also Claims 1 and 9, Topping). In regards to claim 8, Chen as modified above discloses (See, for example, Figs. 5, Topping) the heat dissipation chamber comprises at least one of a nickel-titanium (Ni-Ti) alloy, a copper-zinc-aluminum (Cu-Zn-Al) alloy, and a copper-aluminum-nickel (Cu-Al-Ni) alloy (“The most common types of SMAs are binary alloys of nickel and titanium”, See, for eample page 3 lines 27-28). In regards to claim 9, Chen discloses (See, for example, Fig. 2) a semiconductor package (2) comprising: a substrate (22); a semiconductor device (21) on the substrate (22); and a heat dissipation structure (23) on the semiconductor device (21), the heat dissipation structure (23) including a heat dissipation chamber on the semiconductor device (21), the heat dissipation chamber (23) providing an inner space for a working fluid to flow therein (“a little liquid, such as water, is sealed in the vapor chamber”, See Par [0045]). Chen is silent about wherein a first shape of the heat dissipation structure at a first temperature differs from a second shape of the heat dissipation structure at a second temperature, and the first temperature and the second temperature are different from each other. Topping discloses (See, for example, Figs. 5) a first shape (See, for example, Fig. 5B) of the heat dissipation structure at a first temperature (T<Tt) differs from a second shape (See, for example, Fig. 5C) of the heat dissipation structure at a second temperature (T≥Tt), and the first temperature (T<Tt) and the second temperature (T≥Tt) are different from each other (See also, page 7 line 30 thru page 8 line 9 ). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the upper wall of Chen’s vapor chamber to be composed of a shape memory alloy as taught by Topping because this would help enhance heat dissipation by exploiting the additional heat absorption that occurs during SMA phase transformation. In regards to claim 10, Chen as modified above discloses that wherein the heat dissipation chamber (23, Fig. 2, Chen) comprises a lower wall (238, See Fig. 3-2(a), Chen) on the semiconductor device, an upper wall (237, See Fig. 3-2(a), Chen) on the lower wall (238), and a plurality of sidewalls extending between the lower wall and the upper wall (See, Figs. 3-2(a) and 3-2(b)), and a shape of the upper wall is configured to change according to a temperature (fin portion 14, corresponding to the upper wall, changes its shape according to temperature, while the stationary base portion 12, corresponding to the lower wall, does not change shape (See, for example, Page 7 line 30 thru page 8 line 9; and also Figs. 5B and 5C, Topping) . In regards to claim 11, Chen as modified above discloses (See, for example, Figs. 3, Topping) that wherein the first temperature (T<Tt) is a temperature of the heat dissipation structure if the semiconductor device is not operating, and the second temperature (T≥Tt) is a temperature of the heat dissipation structure if the semiconductor device is operating (See, for example, Page 5 lines 21-31). In regards to claim 12, Chen as modified above discloses (See, for example, Figs. 1, 2, and 3) t a wick structure (Capillary structure 235) on an inner surface (See, for example, Fig. 3-2(a)) of the heat dissipation chamber (23), wherein the wick structure (capillary structure 235) is configured to guide the working fluid in a liquid state (“the vapors will be condensed into liquid again on the cold zone …and flow back to the heat source through the capillary structure”, See Par [0045]), and the wick structure (capillary 235) has a same shape (they are made of non-SMA materials, See for example, Par [0061]) at both the first temperature and the second temperature (See also Pars [0045] and [0058]). In regards to claim 13, Chen as modified above discloses (See, for example, Figs. 3, 5, Topping) that wherein a shape of the heat dissipation structure is configured to change at a critical temperature between the first temperature and the second temperature (SMA transformation occurs at a transformation temperature Tt. which is between the first temperature (T<Tt) and the second temperature (T≥Tt), See, for example, Page 5 lines 18-26). In regards to claim 14, Chen as modified above discloses (See, for example, Figs. 3 and 5, Topping) that wherein the first temperature is from 0° C. to 30° C., and the second temperature is from 40° C. to 80° C (“For example, for NiTi SMAs, Tt can be manipulated in this way so as to fall somewhere between -200 and 110oC. Therefore, a heat sink can be constructed of a particular Tt which corresponds in some way to a critical operating temperature of an electronic device…”, See Page 5 lines 19-24; The claimed first temperature range (0° C. to 30° C., corresponding to ambient/non-operating conditions) and second temperature range (40° C. to 80° C, corresponding to typical semiconductor device operating temperatures) fall squarely within the disclosed range of Topping discussed above). In regards to claim 15, Chen discloses (see, for example, Figs. 5, Fig. 14) a semiconductor package comprising: a package substrate (3); an interposer substrate (22) on the package substrate (3); a first semiconductor device (211) on the interposer substrate (22); a second semiconductor device (212) spaced apart from the first semiconductor device (211) in a horizontal direction (See, Fig. 14), the second semiconductor device (212) on the interposer substrate (22); and a heat dissipation structure (23) on the first semiconductor device (211) and the second semiconductor device (212), wherein the heat dissipation structure (23) includes a heat dissipation chamber and a wick structure (capillary structure 235), the heat dissipation chamber (23) includes a lower wall (238, See Fig. 3-2(a)) on the first semiconductor device (211), an upper wall (237, See Fig. 3-2(a)) on the lower wall (238, See Fig. 3-2(a)), and a plurality of sidewalls extending between the lower wall and the upper wall to provide an inner space (inner space containing the capillary structures 235) for a working fluid to flow therein (See, Figs. 3-2(a) and 3-2(b)), the wick structure (capillary structure 235) is on an inner surface of the heat dissipation chamber (23), and the wick structure (capillary structure 235) is configured to guide the working fluid in a liquid state (“the vapors will be condensed into liquid again on the cold zone …and flow back to the heat source through the capillary structure”, See Par [0045]). Chen is silent about a first shape of the heat dissipation structure at a first temperature differs from a second shape of the heat dissipation structure at a second temperature, the second temperature is higher than the first temperature, and a surface area of the heat dissipation structure at the second temperature is greater than a surface area of the heat dissipation structure at the first temperature. Topping discloses (See, for example, Figs. 5) a first shape (See, Fig. 5B) of the heat dissipation structure (14) at a first temperature (T<Tt) differs from a second shape (See, Fig. 5C) of the heat dissipation structure (14) at a second temperature (T≥Tt), the second temperature (T≥Tt) is higher than the first temperature (T<Tt), and a surface area of the heat dissipation structure at the second temperature is greater than a surface area of the heat dissipation structure at the first temperature (See, for example, page 7 line 29 thru page 8 line 4). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the upper wall of Chen’s vapor chamber to be composed of a shape memory alloy as taught by Topping because this would help enhance heat dissipation by exploiting the additional heat absorption that occurs during SMA phase transformation. In regards to claim 16, Chen as modified above discloses (See, for example, Figs. 5, Topping) that wherein a shape of the upper wall (See, Fig. 5B) at the first temperature (T<Tt) and a shape of the upper wall (See, Fig. 5C) at the second temperature (T≥Tt) are different from each other, and a surface area of the upper wall (See, Fig. 5C) at the second temperature (T≥Tt) is greater than a surface area of the upper wall (See, Fig. 5B) at the first temperature (T<Tt). In regards to claim 17, Chen as modified above discloses (See, for example, Fig. 5, Topping) that wherein a shape of the lower wall is the same at the first temperature and the second temperature, and shapes of the plurality of sidewalls are the same at the first temperature and the second temperature (the stationary base portion 12 is “capable of being thermally attached to an electronic device” and remains stationary while only the deflectable fin portion 14 (corresponding to the upper wall) changes shape, See for example, page 2 lines 4-16; See also (claim 1)). In regards to claim 18, Chen as modified above discloses (See, for example, Figs. 5, Topping) that wherein a surface roughness of a top surface of the heat dissipation structure at the first temperature is lower than a surface roughness of the top surface of the heat dissipation structure at the second temperature (As temperature increases and passes a specific transition point (Tt), SMA fins transform from martensitic phase (low temperature, flat/dormant) to an austenitic phase (high temperature, upright/active), See Page 2 lines 4-7; increasing the effective surface area and creating “roughness” in the flow path to enhance heat transfer is an inherent property of SMAs to self-regulating thermal management mechanism). In regards to claim 19, Chen as modified above that (See, for example, Figs. 5) wherein at the second temperature (T≥Tt), a top surface of the heat dissipation structure comprises a plurality of patterns (fins portion 14). Chen as modified above does not explicitly disclose the specific dimensional range of horizontal widths of the of the plurality of patterns and heights of the plurality of patterns are each from 1 micrometer to 500 micrometers. However, Chen teaches that the vapor chamber 23 has a thickness less than 1 mm (such as 0.3mm – 0.6mm, See Pars [0006] and [0046]), which dictates that any surface patterns on the vapor chamber must be sub millimeter in scale. Routine optimization of pattern dimensions within the disclosed sub-millimeter range to maximize surface area while maintaining structural integrity falls within the level of ordinary skill in the art. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have the specific dimensional range of horizontal widths of the of the plurality of patterns and heights of the plurality of patterns are each from 1 micrometer to 500 micrometers, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. In regards to claim 20, Chen as modified above discloses that wherein a material of the upper wall (deflectable wall 14, page 2 lines 27-30, Topping) is different from a material of the lower wall and a material of the plurality of sidewalls (“The vapor chamber 23 of the present invention could be made of Ti, stainless steel or copper.”, See Pars [0049] and [0066], Chen). Correspondence Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERMIAS T WOLDEGEORGIS whose telephone number is (571)270-5350. The examiner can normally be reached on Monday-Friday 8 am - 5 pm E.S.T.. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERMIAS T WOLDEGEORGIS/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Nov 09, 2023
Application Filed
May 11, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
83%
With Interview (+12.4%)
2y 10m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 753 resolved cases by this examiner. Grant probability derived from career allowance rate.

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