DETAILED ACTION
This Office Action is in response to the application filed on 09 November 2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5 and 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chiu (US 2012/0104541 A1; hereinafter Chiu).
In regards to claim 1, Chiu teaches a display device comprising:
a base layer (402) [0020]; and
a first backplane layer (fig. 4: e.g. (404/406/408/410)) disposed on the base layer [0019-0021], wherein
the first backplane layer includes:
a lower backplane layer (e.g. (404) and lower (406)) [0019-0021];
an outer via layer (e.g. vias (410) in "Region for Dummy Bars" and (310)) disposed on the lower backplane layer [0021]; and
an outer passivation layer (e.g. (414/422) in "Region for Dummy Bars" and (310)) disposed on the outer via layer [0021-0024],
the outer passivation layer includes:
a first outer passivation layer (414) [0023]; and
a second outer passivation layer (422) disposed on the first outer passivation layer [0024], and
the second outer passivation layer includes a plurality of holes (420a/420b) overlapping the first outer passivation layer in a plan view (figs. 3 and annotated fig. 4) [0023].
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Annotated fig. 4
In regards to claim 2, Chiu teaches the limitations discussed above in addressing claim 1. Chiu further teaches the limitations wherein the second outer passivation layer (422) does not contact the outer via layer (e.g. vias (410) in "Region for Dummy Bars" and (310)) [0021-0024].
In regards to claim 3, Chiu teaches the limitations discussed above in addressing claim 2. Chiu further teaches the limitations wherein the plurality of holes exposes the first outer passivation layer (annotated fig. 4: hole adjacent to "Protrusion").
In regards to claim 4, Chiu teaches the limitations discussed above in addressing claim 2. Chiu further teaches the limitations wherein
the plurality of holes are arranged in a first loop structure (420a) and a second loop structure (420b) in a plan view [0023], and
the second loop structure is disposed inside the first loop structure in a plan view (fig. 3: (420b) are inside of (420a)) [0023].
In regards to claim 5, Chiu teaches the limitations discussed above in addressing claim 4. Chiu further teaches the limitations wherein the first loop structure and the second loop structure have a quadrangular shape in a plan view (fig. 3).
In regards to claim 8, Chiu teaches the limitations discussed above in addressing claim 1. Chiu further teaches the limitations wherein
each of the plurality of holes (420a/420b) forms a groove (fig. 4) [0023],
the groove does not expose the first outer passivation layer (fig. 4), and
the second outer passivation layer includes a protrusion ("Protrusion") surrounding at least a portion of the groove in a plan view (figs. 3 and annotated fig. 4: "Protrusion" surrounds "Holes").
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6, 7, and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chiu.
In regards to claim 6, Chiu teaches the limitations discussed above in addressing claim 2. Chiu teaches a plurality of holes with widths (fig. 4). Chiu appears to be silent as to, but does not preclude, the limitations wherein the plurality of holes have a same width in a direction; however where the only difference between the prior art and the claims is a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device is not patentably distinct from the prior art device. MPEP §2144.04 IV A; see also Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984).
In regards to claim 7, Chiu teaches the limitations discussed above in addressing claim 2. Chiu teaches a plurality of holes with widths (fig. 4) and wherein the second outer passivation layer includes a protrusion surrounding at least some of the plurality of holes (figs. 3 and annotated fig. 4: "Protrusion" surrounds "Holes"). Chiu appears to be silent as to, but does not preclude, the limitations wherein a ratio of a width of the protrusion and a thickness of the second outer passivation layer is about 5:1; however where the only difference between the prior art and the claims is a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device is not patentably distinct from the prior art device. MPEP §2144.04 IV A; see also Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984).
In regards to claim 9, Chiu teaches the limitations discussed above in addressing claim 2. Chiu teaches a plurality of holes with widths (fig. 4) and wherein the groove has a first width in a direction (fig. 4). Chiu appears to be silent as to, but does not preclude, the limitations wherein the protrusion has a second width in the direction; and the first width is less than the second width; however where the only difference between the prior art and the claims is a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device is not patentably distinct from the prior art device. MPEP §2144.04 IV A; see also Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984).
Claim(s) 10 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chiu as applied to claim 1 above, in view of Morrison (US 5,381,039 A; hereinafter Morrison).
In regards to claim 10, Chiu teaches the limitations discussed above in addressing claim 1. Chiu appears to be silent as to, but does not preclude, the limitations further comprising: a second backplane layer, wherein the first backplane layer is disposed on a front surface of the base layer, and the second backplane layer is disposed on a rear surface of the base layer. Morrison teaches the limitations further comprising:
a second backplane layer ((42) of the upper device) disposed on the base layer (fig. 5: e.g. middle (22) in the upper device), wherein
the first backplane layer ((42) of the lower device) is disposed on a front surface (lower surface) of the base layer, and
the second backplane layer is disposed on a rear surface (upper surface) of the base layer (fig. 5).
It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by Chiu with the aforementioned limitations taught by Morrison such that the device of Chiu is a double-sided device that has backplane layers on front and back surfaces to have a high density semiconductor package with environmental protections (Morrison col. 2/lns. 11-15).
In regards to claim 11, the combination of Chiu and Morrison teaches the limitations discussed above in addressing claim 10. Morrison further teaches the limitations further comprising:
a pad connection wire ((20) of the upper device) electrically connecting a portion of the first backplane layer and a portion of the second backplane layer (elements (20) connect (42) of the upper device to (32) and then (49) and then (42) of the upper device). It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by Chiu with the aforementioned limitations taught by Morrison such that certain electrical connections are made through wire bonds to have a high density semiconductor package with environmental protections (Morrison col. 2/lns. 11-15).
Claim(s) 12-14, 16, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chiu in view of Morrison.
In regards to claim 12, Chiu teaches a manufacturing method of a display device, comprising:
forming a first backplane layer (fig. 4: e.g. (404/406/408/410)) on a first surface (upper) of a base layer (402) [0020];
wherein the forming of the first backplane layer includes:
forming a lower backplane layer (e.g. (404) and lower (406)) [0019-0021];
forming an outer via layer (e.g. vias (410) in "Region for Dummy Bars" and (310)) disposed on the lower backplane layer [0021]; and
forming an outer passivation layer (e.g. (414/422) in "Region for Dummy Bars" and (310)) on the outer via layer [0021-0024],
the forming of the outer passivation layer includes:
forming a first outer passivation layer (414) [0023]; and
forming a second outer passivation layer (422) on the first outer passivation layer [0024], and
the forming of the second outer passivation layer includes patterning the second outer passivation layer to have a plurality of holes (420a/420b) overlapping the first outer passivation layer in a plan view (figs. 3 and annotated fig. 4) [0023].
Chiu appears to be silent as to, but does not preclude, the limitations comprising: inverting a stacked structure including the base layer and the first backplane layer; and forming a second backplane layer on a second surface of the base layer. Morrison teaches the limitations comprising:
inverting a stacked structure including the base layer and the first backplane layer (fig. 5; col. 7/lns. 9-22); and
forming a second backplane layer on a second surface of the base layer (fig. 5).
It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by Chiu with the aforementioned limitations taught by Morrison such that the device of Chiu is a double-sided device that has backplane layers on front and back surfaces to have a high density semiconductor package with environmental protections (Morrison col. 2/lns. 11-15).
In regards to claim 13, the combination of Chiu and Morrison teaches the limitations discussed above in addressing claim 12. Chiu further teaches the limitations wherein after the forming of the first outer passivation layer, the first outer passivation layer entirely covers the outer via layer ([0022]: (414) is formed to entirely cover (404/406/408/410/412) before etching to form (416a/416b)).
In regards to claim 14, the combination of Chiu and Morrison teaches the limitations discussed above in addressing claim 13. Chiu further teaches the limitations wherein the plurality of holes (420a/420b) have a circular shape, an elliptical shape, or a polygonal shape in a plan view (fig. 3: quadrangle shape).
In regards to claim 16, the combination of Chiu and Morrison teaches the limitations discussed above in addressing claim 13. Morrison further teaches the limitations wherein the forming of the second backplane layer includes contacting at least a portion of the first backplane layer with a process equipment for manufacturing the display device (as evidenced in col. 7/lns. 9-22: processing equipment required to invert top stack). It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by Chiu with the aforementioned limitations taught by Morrison such that the device of Chiu is a double-sided device that has backplane layers on front and back surfaces to have a high density semiconductor package with environmental protections (Morrison col. 2/lns. 11-15).
In regards to claim 17, the combination of Chiu and Morrison teaches the limitations discussed above in addressing claim 16. Chiu further teaches the limitations wherein the second outer passivation layer includes a protrusion ("Protrusion") surrounding the plurality of holes (figs. 3 and annotated fig. 4: "Protrusion" surrounds "Holes"), the first outer passivation layer and the process equipment are physically spaced apart from each other by the protrusion (e.g. "Protrusion" separates parts of (414) from dicing equipment). Morrison further teaches the limitations wherein the contacting of the at least a portion of the first backplane layer with the process equipment includes contacting at least a portion of the protrusion with the process equipment (as evidenced in col. 7/lns. 9-22: processing equipment required to invert top stack). It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by Chiu with the aforementioned limitations taught by Morrison such that the device of Chiu is a double-sided device that has backplane layers on front and back surfaces to have a high density semiconductor package with environmental protections (Morrison col. 2/lns. 11-15).
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Chiu and Morrison as applied to claim 13 above, in view of Jo et al. (US 2022/0285428 A1; hereinafter Jo).
In regards to claim 15, the combination of Chiu and Morrison teaches the limitations discussed above in addressing claim 13. Morrison further teaches the limitations further comprising: the second backplane layer includes a wire ((20) of the upper device) electrically connecting a driving circuit portion disposed on the second backplane layer and the pad (fig. 4). It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by Chiu with the aforementioned limitations taught by Morrison such that the device of Chiu is a double-sided device that has backplane layers on front and back surfaces to have a high density semiconductor package with environmental protections (Morrison col. 2/lns. 11-15).
The combination of Chiu and Morrison appears to be silent as to, but does not preclude, the limitations further comprising: disposing a light-emitting-element layer including a light emitting element on the first backplane layer, wherein the first backplane layer includes: a pixel circuit electrically connected to the light emitting element; and a pad electrically connected to the pixel circuit. Jo teaches the limitations further comprising:
disposing a light-emitting-element layer including a light emitting element [0048] on the first backplane layer, wherein the first backplane layer includes:
a pixel circuit electrically connected to the light emitting element [0074]; and
a pad electrically connected to the pixel circuit [0050].
It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by the combination of Chiu and Morrison with the aforementioned limitations taught by Jo such that the package taught by the combination of Chiu and Morrison is used to package an LED device to have a displace device with damage resistance (Jo [0005]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALVIN Y CHOI whose telephone number is (571)270-7882. The examiner can normally be reached M-F 8-4 (Pacific Time).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William (Blake) Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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CALVIN CHOI
Patent Examiner
Art Unit 2812
/CALVIN Y CHOI/Patent Examiner, Art Unit 2812