DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Claims 15-17 stand rejected under Section 102. The specification stands objected to. Claims 1-14 and 18 stand rejected under Section 103. Claims 19 and 20 stand objected to for depending from a rejected base claim, but have been indicated as having allowable subject matter if placed in independent form.
Applicants amended claims 1, 13, and 15, canceled claim 20, and added new claim 21. Applicants provided amendments to the specification. Applicants argue that the application is in condition for allowance.
Turning first to the specification: Applicants’ amendments address the previously noted specification objections and are accepted and entered. No new matter has been added. The previously noted specification objections are withdrawn.
Section 102 rejections: Applicants’ amendments overcome the previously noted Section 102 rejections. These rejections are withdrawn.
Section 103 rejections: Upon initial review of the claims, the undersigned believed that the amendments had overcome the Section 103 rejections and had contacted applicants’ representative to negotiate minor changes in the claim language to place the application in condition for allowance. However, upon drafting a more detailed Reasons for Allowance statement, the undersigned determined that the claim 1 and its dependent claims were still obvious of the prior art. For these reasons, this Final Rejection issues instead of the Notice of Allowance.
Applicants noted in their response that the Office had indicated that claim 20 was allowable, and that by adding the limitations of claim 20 in independent claims 1 and 13, these claims and their dependent claims should also be allowable. Claim 20 depended from claim 15, a method claim, which required a plurality of magnetoresistive sensing elements in a sensor area. Claims 1-14 and 21 are product claims. Independent claim 1 required only a single magnetoresistive sensing element in its sensor area, and required conductive layers and conductive structures, the conductive structures being laterally offset from the sensor area. Huang shows this feature, as discussed below. Independent claim 13 requires a plurality of magnetoresistive sensing elements, with first and second pluralities of magnetoresistive sensing elements in respective first and second sensing areas, the first and second sensing areas being laterally separated. Neither Xu, used in the Section 102 rejections, nor Bolognia, used as the primary reference in the Section 103 rejections, discloses these features along with conductive structures that are laterally offset from the sensor areas. Instead, in Xu, the conductive structures are on top of the sensor area. Bolognia is silent as to its arrangement, and considering the differences between Bolognia and Huang, a reasoned basis is absent for modifying Bolognia to include Huang’s conductive structures that are offset from a sensor area that has a plurality of magnetoresistive sensing elements.
For these reasons, the Section 103 rejection of claims 13 and 14 is withdrawn, and the rejections of claims 1-12 are maintained, as noted below.
Additional note regarding the potential Section 112(a) scope of enablement issue in claims 5 and 19: These claim require “wherein the solder pad and the magnetoresistive sensing element [be] separated by a vertical distance of at least 25 µm” (claim 5) and “wherein the magnetic metal layer and the plurality of magnetoresistive sensing elements are separated by a vertical distance of at least 25 µm” (claim 19). Typically, where no upper limit is stated in these types of ranges, the Office would issue a Section 112(a) enablement rejection for lack of enablement for the full scope of the claim, because without an upper limit on the range, theoretically, the upper limit encompasses 1 meter, 1 kilometer, and so on. However, the preamble of claim 1, which claim 5 depends from via claim 4, and the preamble for claim 15, which claim 19 depends from via claim 18, requires a chip-scale package. Chip-scale packages are by definition small, not meter-sized, and certainly not kilometer-sized. The preamble thus limits the upper limit, even if the upper limit is not specifically stated. For these reasons, Section 112(a) scope of enablement rejections were not made.
Claim Objections
Claims 3, 8, 9, and 13 are objected to because of the following informalities:
Claim 3, line 1: Change “IC layer stack” to “conductive structures”.
Claim 3, line 2: Change “comprises” to “comprise”.
Claim 8, line 1: Change “IC layer stack” to “conductive structures”.
Claim 8, line 2: Change “comprises” to “comprise”.
Claim 9, line 1: Change “IC layer stack” to “conductive structures”.
Claim 9, line 2: Change “comprises” to “comprise”.
Claim 13, line 16: Add “first” before “plurality”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3, 8, 9, 13, 14, and 21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 3, which depends from claim 2, which depends from claim 1: Claim 1 has been amended to require “conductive structures that are configured to electrically couple the magnetoresistive sensing element to the conductive contact pad, wherein the conductive structures extend vertically within the IC layer stack and are laterally offset from a sensor area associated with the magnetoresistive sensing element.” (emphasis added). Claim 3 requires:
the IC layer stack comprises a conductive pillar coupled to the conductive contact pad and a conductive layer of the plurality of conductive layers, wherein the conductive pillar vertically extends through the at least one isolation layer, between the conductive contact pad and the conductive layer, and wherein the conductive pillar is laterally offset from the magnetoresistive sensing element.
(emphasis added).
Claim 3’s conductive pillar appears to be directed to the conductive structures which were added in the amendment. Because the claim is vague as to whether the conductive pillar is the same as the conductive structures, claim 3 is rejected as indefinite. For purposes of examination, the conductive pillar of claim 3 is interpreted to be a specific embodiment of the conductive structures defined in claim 1, thus, “IC layer stack” is replaced with “conductive structures”.
Regarding claim 9, which depends from claim 8, which depends from claim 1: The discussion regarding claim 1 from the rejection of claim 3 is incorporated by reference. Claim 9 requires:
wherein the IC layer stack comprises a plurality of conductive vias that connect the conductive contact pad to the one or more conductive layers, wherein the plurality of conductive vias extend vertically into the IC layer stack, and wherein the plurality of conductive vias are arranged laterally offset from the magnetoresistive sensing element.
(emphasis added).
Claim 9’s conductive vias appears to be directed to the conductive structures which were added in the amendment. Because the claim is vague as to whether the conductive vias are the same as the conductive structures, claim 9 is rejected as indefinite. For purposes of examination, the conductive vias of claim 9 are interpreted to be a specific embodiment of the conductive structures defined in claim 1, thus, “IC layer stack” is replaced with “conductive structures”.
Regarding claim 10, which depends from claim 8, which depends from claim 1: The discussion regarding claim 1 from the rejection of claim 3 is incorporated by reference. Claim 10 requires:
wherein the IC layer stack comprises a conductive pillar that connects the conductive contact pad to the one or more conductive layers, wherein the conductive pillar extends vertically into the IC layer stack from the conductive contact pad, and wherein the conductive pillar is arranged laterally offset from the magnetoresistive sensing element.
(emphasis added).
Claim 10’s conductive pillar appears to be directed to the conductive structures which were added in the amendment. Because the claim is vague as to whether the conductive pillar is the same as the conductive structures, claim 10 is rejected as indefinite. For purposes of examination, the conductive pillar of claim 10 is interpreted to be a specific embodiment of the conductive structures defined in claim 1, thus, “IC layer stack” is replaced with “conductive structures”.
Regarding claim 13: This claim requires the following:
a plurality of magnetoresistive sensing elements integrated in the IC layer stack, including a first plurality of magnetoresistive sensing elements arranged in a first sensor area and a second plurality of magnetoresistive sensing elements arranged in a second sensor area, wherein the first sensor area and the second sensor area are laterally separated; a first conductive contact pad arranged on or integrated in the IC layer stack, wherein the first conductive contact pad is arranged over the first sensor area such that the first conductive contact pad and the first sensor area at least partially vertically overlap; a second conductive contact pad arranged on or integrated in the IC layer stack, wherein the second conductive contact pad is arranged over the second sensor area such that the second conductive contact pad and the second sensor area at least partially vertically overlap; and conductive structures that are configured to electrically couple the plurality of magnetoresistive sensing elements to the first conductive contact pad, wherein the conductive structures extend vertically within the IC layer stack and are laterally offset from the first sensor area.
(emphasis added).
First and second pluralities of magnetoresistive sensing elements have been defined, and the first conductive contact pad is associated with the first sensor area, which is associated with the first plurality of magnetoresistive sensing elements. The requirement that “conductive structures that are configured to electrically couple the plurality of magnetoresistive sensing elements to the first conductive contact pad” is vague because the language is not clear which plurality—first or second or both—of magnetoresistive sensing elements should be electrically coupled to the first conductive contact pad. Because the language is unclear, claim 13 is rejected as indefinite. For purposes of examination, the language is interpreted as the conductive structure are configured to electrically couple the first plurality of magnetoresistive sensing elements to the first conductive contact pad.
Claims 14 and 21 are rejected for depending from rejected base claim 13.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 8-12 are rejected under 35 U.S.C. 103 as being unpatentable over Huang, U.S. Pat. Pub. No. 2021/0265291, Figure 2, and further in view of Jenkins, U.S. Pat. Pub. No. 2020/0326361, Figure 1a.
PNG
media_image1.png
345
373
media_image1.png
Greyscale
PNG
media_image2.png
292
402
media_image2.png
Greyscale
Regarding claim 1: Huang Figure 2 discloses a chip-scale package, comprising: a magnetic sensor integrated circuit (IC) comprising: an IC layer stack (105) comprising a plurality of isolation layers (106) (see Huang Figures 3-4, Huang specification ¶¶ 36, 37) and a plurality of conductive layers (108); and a magnetoresistive sensing element (202) integrated in the IC layer stack (105); a conductive contact pad (118) arranged on or integrated in the IC layer stack (105), wherein the conductive contact pad (118) is arranged over the magnetoresistive sensing element (202) such that the conductive contact pad (118) and the magnetoresistive sensing element (202) at least partially vertically overlap; and conductive structures (unnumbered vias) that are configured to electrically couple the magnetoresistive sensing element (202) to the conductive contact pad (118), wherein the conductive structures (unnumbered vias) extend vertically within the IC layer stack (105) and are laterally offset from a sensor area (dashed area around magnetoresistive sensing element (202)) associated with the magnetoresistive sensing element (202). Huang specification ¶¶ 28-32. Huang is silent as to the details of the magnetoresistive sensing element.
Jenkins Figure 1a discloses the magnetoresistive sensing element includes a reference layer (122) having a fixed reference magnetization aligned with a magnetization axis, and a magnetic free layer (120) having a magnetically free magnetization, and wherein the magnetically free magnetization is variable in a presence of an external magnetic field. Jenkins specification ¶¶ 70-76. One having ordinary skill in the art at a time before the effective filing date would be motivated to modify Huang to replace the Huang magnetoresistive sensing element with the Jenkins magnetoresistive sensing element because the modification would have involved the substitution of an equivalent known for the same purpose.
Regarding claim 2, which depends from claim 1: Huang discloses at least one isolation layer (one of the isolation layers of dielectric structure (106)) of the IC layer stack (105) is arranged vertically between the conductive contact pad (118) and the magnetoresistive sensing element (202, as modified by Jenkins). See Huang Figure 2.
Regarding claim 3, which depends from claim 2: Huang discloses the [IC layer stack (105)/conductive structures]1 comprises a conductive pillar (uppermost via (110)) coupled to the conductive contact pad (118) and a conductive layer (uppermost layer (108)) of the plurality of conductive layers (108), wherein the conductive pillar (uppermost via (110)) vertically extends through the at least one isolation layer (uppermost layer or layers (106) covering magnetoresistive sensing element (202)), between the conductive contact pad (118) and the conductive layer (uppermost layer (108)), and wherein the conductive pillar (uppermost via (110)) is laterally offset from the magnetoresistive sensing element (202). See id. To the extent that the interconnect vias (110) are not the same as a conductive pillar, the difference is due to the shape or the manner in which the pillar or via are made and are thus not patentably significant. As to the shape, see In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP § 2144.04(IV)(B). As to the process by which a pillar or a via is made, the process limitation of how a layer is formed has no patentable weight in claims drawn to structure. Note that a product-by-process claim is directed to the product per se, not the process by which the product is made. In re Hirao, 190 USPQ 15 at 17 n. 3 (CCPA 1976). See also In re Brown, 173 USPQ 685, 688 (CCPA 1972); In re Luck, 177 USPQ 523, 525 (CCPA 1973); In re Fessman, 180 USPQ 324, 325-26 (CCPA 1974); In re Avery, 186 USPQ 161, 166-67 (CCPA 1975); In re Wertheim, 191 USPQ 90, 103 (CCPA 1976); and In re Marosi, 218 USPQ 289, 292-93 (Fed. Cir. 1983), all of which make it clear that it is the patentability of the final product per se which must be determined in a product-by-process claim, and not the patentability of the process, and that an old or obvious product by a new method is not patentable as a product, whether claimed in product-by-process claims or not. Note that the applicant has the burden of proof in such cases, according to case law.
Regarding claim 8, which depends from claim 1: Huang discloses the conductive contact pad (118) is electrically coupled to the magnetoresistive sensing element (202) by one or more conductive layers (108) of the plurality of conductive layers (108). See Huang Figure 2.
Regarding claim 9, which depends from claim 8: Huang discloses [IC layer stack (105)/conductive structures]2 comprises a plurality of conductive vias (110) that connect the conductive contact pad (118) to the one or more conductive layers (108), wherein the plurality of conductive vias (110) extend vertically into the IC layer stack (105), and wherein the plurality of conductive vias (110) are arranged laterally offset from the magnetoresistive sensing element (202). See id.
Regarding claim 10, which depends from claim 8: Huang discloses [IC layer stack (105)/conductive structures]3 comprises a conductive pillar (110) that connects the conductive contact pad (118) to the one or more conductive layers (108), wherein the conductive pillar (110) extends vertically into the IC layer stack (105) from the conductive contact pad (118), and wherein the conductive pillar (110) is arranged laterally offset from the magnetoresistive sensing element (202). See id. To the extent that the interconnect vias (110) are not the same as a conductive pillar, the difference is due to the shape or the manner in which the pillar or via are made and are thus not patentably significant. As to the shape, see In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP § 2144.04(IV)(B). As to the process by which a pillar or a via is made, the process limitation of how a layer is formed has no patentable weight in claims drawn to structure. Note that a product-by-process claim is directed to the product per se, not the process by which the product is made. In re Hirao, 190 USPQ 15 at 17 n. 3 (CCPA 1976). See also In re Brown, 173 USPQ 685, 688 (CCPA 1972); In re Luck, 177 USPQ 523, 525 (CCPA 1973); In re Fessman, 180 USPQ 324, 325-26 (CCPA 1974); In re Avery, 186 USPQ 161, 166-67 (CCPA 1975); In re Wertheim, 191 USPQ 90, 103 (CCPA 1976); and In re Marosi, 218 USPQ 289, 292-93 (Fed. Cir. 1983), all of which make it clear that it is the patentability of the final product per se which must be determined in a product-by-process claim, and not the patentability of the process, and that an old or obvious product by a new method is not patentable as a product, whether claimed in product-by-process claims or not. Note that the applicant has the burden of proof in such cases, according to case law.
Regarding claim 11, which depends from claim 8: Huang discloses the conductive contact pad (118) is configured to supply a current to the magnetoresistive sensing element (200). See id.
Regarding claim 12, which depends from claim 1: Huang discloses the conductive contact pad (118) is an uppermost conductive layer of the IC layer stack (105). See Huang specification ¶ 17 (“In other embodiments, portions of the interconnect dielectric structure 106 at least partially surround outer sidewalls of the bond pad 118.”)
Claims 4-7 are rejected under 35 U.S.C. 103 as being unpatentable over Huang and Jenkins, and further in view of Pietambaram, U.S. Pat. Pub. No. 2017/0110422, Figure 2.
PNG
media_image3.png
222
389
media_image3.png
Greyscale
Regarding claim 4, which depends from claim 1: This rejection looks at Huang in two different ways.
First: Huang discloses a solder (124) arranged on the conductive contact pad (118), wherein the conductive contact pad (118) is arranged vertically between the solder (124) and the magnetoresistive sensing element (202). Huang specification ¶¶ 21, 31. Huang does not disclose that the solder (124) is directly arranged on the conductive contact pad (118), or that, specifically, a solder pad is present (unless the under bump metallization (UBM) layer (122) and the conductive core structure (206) are considered to be the solder pad). However, applicants’ disclosure does not indicate that the direct contact/arrangement requirement is critical to the invention. Instead, applicants’ disclosure states that “[i]n some implementations, the solder pad 226 may be arranged directly on the conductive contact pad (e.g., in direct contact with the conductive contact pad 224).” See applicants’ specification, page 13, paragraph 46. The purpose of the solder pad is to make an electrical connection between the connection pad and an electrical supply. Whether that electrical connection is made by direct contact between the solder pad and the conductive contact pad, or if—as in Huang—there are an intervening under bump metallization (UBM) layer (122) and conductive core structure (206), does not make a patentably significant difference.
Second: the Huang conductive contact pad is considered to be bond pad (118), UBM layer (122), and conductive core structure (206), in which case, Huang discloses a solder (124) directly arranged on the conductive contact pad (118, 122, 206), wherein the conductive contact pad (118) is arranged vertically between the solder (124) and the magnetoresistive sensing element (202). Huang specification ¶¶ 21, 31.
As for the difference between the use of a solder and the use of a solder pad and a solder, Pietambaram Figure 2 discloses the use of a solder pad (180) between a copper-based interconnect (170) and a solder (190) as a surface finish to assist making the connection. Pietambaram specification ¶ 16. Here, the solder pad would be on the copper-based conductive core structure (206). One having ordinary skill in the art at a time before the effective filing date would be motivated to modify Huang to include the Pietambaram solder pad (180) because the Pietambaram solder pad (180) improves the connection.
Regarding claim 5, which depends from claim 4: The combination discloses at least one isolation layer (106) of the IC layer stack (105) is arranged vertically between the conductive contact pad (118) and the magnetoresistive sensing element (202), and wherein the solder pad (124) and the magnetoresistive sensing element (202) are separated by a vertical distance of at least 15 μm (total of maximum thicknesses of passivation layer (114) and polymeric protection layer (116), Huang specification ¶¶ 18, 42), plus the thickness of the portion of dielectric structure (106) above magnetoresistive sensing element (202), the thickness of the conductive contact pad (118), the thickness of additional passivation layer (204), the thickness of UBM layer (122), the thickness of conductive core structure (206). Based on Huang Figure 2 and the Huang disclosure, the thickness would be at least 25 µm.
Regarding claim 6, which depends from claim 4: Huang discloses wherein the conductive contact pad (118) is made of at least one of aluminum or copper, Huang specification ¶ 17, and wherein the Pietambaram solder pad (124) is a nickel-phosphorus alloy, Pietambaram specification ¶ 16.
Regarding claim 7, which depends from claim 6: The combination discloses the solder pad (Pietambaram (180)) is made of a nickel-phosphorus-palladium-gold alloy (NiP/Pd/Au). Id.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Huang, Jenkins, and Pietambaram, with evidence from or in the alternative obvious in view of Xu, U.S. Pat. Pub. No. 2015/0349243, Figure 12.
PNG
media_image4.png
202
398
media_image4.png
Greyscale
Regarding claim 5, which depends from claim 4: The discussion of claim 5 is incorporated by reference. To the extent that the argument does not render obvious claim 5, the Office provides Xu Figure 12. Xu discloses that the dielectric layer (206) on the magnetoresistive elements is 6-7 µm, and the conductive layer (207) is 3-5 µm, Xu specification ¶¶ 89, 90, for a total of 9-12 µm. This information, combined with the information in Huang, discloses that the solder pad (124) and the magnetoresistive sensing element are separated by a vertical distance of at least 15 µm plus 9-12 µm, plus the additional thickness of other layers discussed in the earlier rejection of claim 5, which would overlap the “at least 25 µm” requirement. One having ordinary skill in the art at a time before the effective filing date would be motivated to modify the combination to use the Xu thicknesses because the modification would have involved the substitution of an equivalent known for the same purpose.
Allowable Subject Matter
Claims 15-19 are allowed.
Claims 13, 14, and 21 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action, and if the informalities were addressed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 13: Regarding claim 13: Bolognia, U.S. Pat. Pub. No. 2018/0062071, Figure 7 discloses a chip-scale package (12), comprising: a magnetic sensor integrated circuit (IC) (12) comprising: an IC layer; a plurality of magnetoresistive sensing elements integrated in the IC layer, including a first magnetoresistive sensing element arranged in a first sensor area (31a) and a second magnetoresistive sensing element arranged in a second sensor area (31b), wherein the first sensor area (31a) and the second sensor area (31b) are laterally separated. Bolognia specification ¶¶ 88-95. Bolognia does not disclose the details of the IC structure. Bolognia does not state whether there are more than one magnetoresistive sensing element in each sensor area, but states that more than two sensor areas may be included in the device. Id. ¶ 89. If there are two additional sensor areas within the chip scale package, then two adjacent areas can be combined for purposes of this rejection and considered to be the first sensor area with a first plurality of magnetoresistive sensing elements arranged therein, and a second sensor area with a second plurality of magnetoresistive sensing elements arranged therein.
Huang Figure 2 discloses a chip-scale package, comprising: a magnetic sensor integrated circuit (IC) comprising: an IC layer stack (105) comprising a plurality of isolation layers (106) and a plurality of conductive layers (108); and a magnetoresistive sensing element (202) integrated in the IC layer stack (105) in a first sensor area; a first conductive contact pad (118) arranged on or integrated in the IC layer stack (105), wherein the first conductive contact pad (118) is arranged over the first sensor area such that the first conductive contact pad (118) and the first sensor area at least partially vertically overlap; conductive structures (unnumbered vias) that are configured to electrically couple the magnetoresistive sensing element (202) to the conductive contact pad (118), wherein the conductive structures (unnumbered vias) extend vertically within the IC layer stack (105) and are laterally offset from the first sensor area (dashed area around magnetoresistive sensing element (202)) associated with the magnetoresistive sensing element (202). Huang specification ¶¶ 28-32. One having ordinary skill in the art at a time before the effective filing date would be motivated to modify Bolognia to include the Huang magnetic sensor IC because the modification would have involved the substitution of an equivalent known for the same purpose. Once combined, the combination discloses, for each of the other magnetoresistive sensing elements in the sensing areas, a second conductive contact pad arranged on or integrated in the IC layer stack, wherein the second conductive contact pad is arranged over the second sensor area such that the second conductive contact pad and the second sensor area at least partially vertically overlap. However, the combination is silent as to the presence of conductive structures (unnumbered vias) that are configured to electrically couple the [first]4 plurality of magnetoresistive sensing elements (202) to the conductive contact pad (118), wherein the conductive structures (unnumbered vias) extend vertically within the IC layer stack (105) and are laterally offset from a sensor area (dashed area around magnetoresistive sensing element (202)) associated with the magnetoresistive sensing element (202). This is because in Huang, only one magnetoresistive sensing element is in the sensing area and associated with the conductive structures, not more than one magnetoresistive sensing element in the sensing area. This feature is not found in a prior art reference that would be suitable for combining with Bolognia and Huang to render obvious claim 13. For these reasons, claim 13 is allowable.
Regarding claim 15: Xu, U.S. Pat. Pub. No. 2015/0349243, Figures 2-13, disclose a method of manufacturing a chip-scale package, comprising: providing a substrate (100); forming a magnetic sensor integrated circuit (IC) on the substrate (100), wherein the magnetic sensor IC includes: an IC layer stack (203, 204, 205, 206, 207) comprising a plurality of isolation layers (203, 206) and a plurality of conductive layers (205), and a plurality of magnetoresistive sensing elements (204) integrated in a sensor area of the IC layer stack; and forming a conductive contact pad (right conductive interconnect (207)) on or integrated at a top of the IC layer stack, wherein the conductive contact pad (right conductive interconnect (207)) is arranged over the plurality of magnetoresistive sensing elements (204) such that the conductive contact pad (right conductive interconnect (207)) and the plurality of magnetoresistive sensing elements (204) at least partially vertically overlap. Xu specification ¶¶ 54-97. Xu does not disclose forming the magnetic sensor IC further comprising forming conductive structures configured to electrically couple the plurality of magnetoresistive sensing elements to the conductive contact pad, wherein the conductive structures extend vertically within the IC layer stack and are laterally offset from the sensor area. No other prior art reference was identified that would be suitable for combining with Xu to render obvious claim 15.
Huang, U.S. Pat. Pub. No. 2021/0265291, Figures 2-16 disclose a method of manufacturing a chip-scale package, comprising: providing a substrate (102); forming a magnetic sensor integrated circuit (IC) (105, 115) on the substrate (102), wherein the magnetic sensor IC (105, 115) includes: an IC layer stack (115) comprising a plurality of isolation layers (e.g., 106a) and a plurality of conductive layers (108), and a magnetoresistive sensing element (202) integrated in a sensor area (202) of the IC layer stack (105); forming a conductive contact pad (118) on or integrated at a top of the IC layer stack (105), wherein the conductive contact pad (118) is arranged over the magnetoresistive sensing element (202) such that the conductive contact pad (118) and the magnetoresistive sensing element (202) at least partially vertically overlap; and forming the magnetic sensor IC (105, 115) further comprising forming conductive structures (110) configured to electrically couple the magnetoresistive sensing element (202) to the conductive contact pad (118), wherein the conductive structures (110) extend vertically within the IC layer stack (105) and are laterally offset from the sensor area (202). Huang specification ¶¶ 28-69. Huang does not disclose a plurality of magnetoresistive sensing elements. Xu has a different arrangement than that in Huang and is thus not suitable for combining with Huang. No other prior art has been identified which would render obvious claim 15. For these reasons, claim 15 is allowable.
With regard to claim 13: The claim has been found allowable because the prior art of record does not disclose “conductive structures that are configured to electrically couple the [first] plurality of magnetoresistive sensing elements to the first conductive contact pad, wherein the conductive structures extend vertically within the IC layer stack and are laterally offset from the first sensor area”, in combination with the remaining limitations of the claim.
With regard to claims 14 and 21: The claims have been found allowable due to their dependency from claim 13 above.
With regard to claim 15: The claim has been found allowable because the prior art of record does not disclose “wherein the magnetic sensor IC includes: an IC layer stack comprising a plurality of isolation layers and a plurality of conductive layers, and a plurality of magnetoresistive sensing elements integrated in a sensor area of the IC layer stack; forming a conductive contact pad on or integrated at a top of the IC layer stack, wherein the conductive contact pad is arranged over the plurality of magnetoresistive sensing elements such that the conductive contact pad and the plurality of magnetoresistive sensing elements at least partially vertically overlap; and forming the magnetic sensor IC further comprising forming conductive structures configured to electrically couple the plurality of magnetoresistive sensing elements to the conductive contact pad, wherein the conductive structures extend vertically within the IC layer stack and are laterally offset from the sensor area”, in combination with the remaining limitations of the claim.
With regard to claims 16-19: The claims have been found allowable due to their dependency from claim 15 above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTORIA KATHLEEN HALL whose telephone number is (571)270-7567. The examiner can normally be reached Monday-Friday, 8 a.m.-5 p.m.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached at 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Victoria K. Hall/Primary Examiner, Art Unit 2897
1 See the discussion of interpretation of this claim in the Section 112(b) section.
2 See the discussion of interpretation of this claim in the Section 112(b) section.
3 See the discussion of interpretation of this claim in the Section 112(b) section.
4 See the discussion of interpretation of this claim in the Section 112(b) section.
Prosecution Insights