Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 15-16 and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (US 2019/0237431).
Regarding claim 15, Kim discloses a semiconductor package, comprising:
a substrate (100) including signal bond fingers (111) disposed adjacent to a first side (200b), and first power bond fingers (119) and second power bond fingers (119) disposed adjacent to a second side (200c) [Figs. 1A-1B];
a master memory chip (200) stacked over the substrate (100) [Figs. 1A-1E and paragraph 0029]; and
a lower slave memory chip (310 or 300) stacked over the master memory chip[Figs. 1A-1E and paragraph 0033],
wherein the master memory chip (200) [Fig. 1A] includes:
master external pads (211) [Fig. 1B];
master internal pads (212) [Fig. 1B]; and
master power pads (219) electrically connected to the first power bond fingers (119) [Fig. 1B], and
wherein the lower slave memory chip (310 or 300) [Fig. 1A] includes:
lower slave external pads (319) [Fig. 1D];
lower slave internal pads (311) [Fig. 1B]; and
lower slave power pads (319) electrically connected to the second power bond fingers (119) [Fig. 1B], and
wherein: the signal bond fingers (111) are electrically connected to the master external pads (211) through external bonding wires (510), respectively, the master internal pads (212) are electrically connected to the lower slave internal pads (311) through lower internal bonding wires (520), respectively [Figs. 1A-1B], and
the master external pads (211) and the lower slave external pads (319) are not connected through the bonding wires [Figs. 1A-1B and 1D].
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Regarding claim 16, Kim discloses wherein:
the signal bond fingers (111) include a first signal bond finger (along I-I’ line) and a second signal bond finger (along H-H’ line) [See Fig. 1A, annotated above],
the master external pads (211) include a first master external pad (along I-I’ line) and a second master external pad (along H-H’ line) [See Fig. 1A, annotated above],
the master internal pads (212) include a first master internal pad (along I-I’ line) and a second master internal pad (along H-H’ line) [See Fig. 1A, annotated above],
the lower slave external pads (319) include a first slave external pad (along II-II’ line) and a second slave external pad (along M-M’ line) [See Fig. 1A, annotated above],
the lower slave internal pads (311) include a first slave internal pad (along I-I’ line) and a second slave internal pad (along H-H’ line) [See Fig. 1A, annotated above],
the external bonding wires (510) include a first external bonding wire (along I-I’ line) and a second external bonding wire(along H-H’ line) [See Fig. 1A, annotated above],
the lower internal bonding wires (520) include a first lower internal bonding wire (along I-I’ line) and a second lower internal bonding wire (along H-H’ line) [See Fig. 1A, annotated above],
the first signal bond finger (111), the first external bonding wire (510), the first master external pad (211), the first master internal pad (212), the first lower internal bonding wire (520), and the first lower slave internal pad (311) are electrically (250) connected to form a first channel (Z) [Figs. 1B-1C], and
the second signal bond finger (111), the second external bonding wire (510), the second master external pad (211), the second master internal pad (212), the second lower internal bonding wire (520), and the second lower slave internal pad (311) are electrically (250) connected to form a second channel (similar to Z) [Figs. 1A-1C].
Regarding claim 18, Kim discloses:
an upper slave memory chip (340/350/360/370) stacked over the lower slave memory chip (330) [Fig. 2C],
wherein the upper slave memory chip (340/350/360/370) includes:
upper slave external pads (349/359/369/379) [See Figure 1A and paragraphs 0058-0060. For example, see pads (319/329/339) along the direction D3 in Figure 1D, which are similar to 340/350/360/370];
upper slave internal pads (341/351/361/371) [Fig. 2C]; and
upper slave power pads (349/359/369/379) [Fig. 2C],
wherein:
the lower slave internal pads (331) are electrically connected to the upper slave internal pads (341/351/361/371) through upper internal bonding wires (550/560/570/580), respectively [Fig. 2C], and
the master external pads (211) [Fig. 2C], the lower slave external pads (339) [Figs. 1A, 1D and 2C, along the direction D3], and the upper slave external pads (349/359/369/379) [Figs. 1A, 1D and 2C, along the direction D3] are not connected.
Regarding claim 19, Kim discloses:
the master external pads (211) are electrically connected to the master internal pads (212-214) through internal interconnections (Z) in the master memory chip (200) [Figs. 1C, 2B and 2C], and
the lower slave external pads (339) are electrically connected to the lower slave internal pads (331) through internal interconnections (not shown) in the lower slave memory chip (331) [paragraphs 0049-0050 and 0057: “electrically grounded or supplied with power…”].
Allowable Subject Matter
Claims 1-14 are allowed.
Claim 17 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kang (US 2025/0365989) is related to the current application.
Correspondence
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSE R DIAZ whose telephone number is (571)272-1727. The examiner can normally be reached Monday-Friday.
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/Jose R Diaz/Primary Examiner, Art Unit 2815