DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. Applicant’s amendment to the claims, filed on August 13, 2026, is acknowledged. Entry of amendment is accepted and made of record.
Response to Arguments/Remarks
3. Applicant’s arguments/remarks, see pgs. 5-12, with respect to the immediate allowance of the current application have been fully considered but are not persuasive.
Pertaining to the Applicant’s arguments/remarks, pgs. 5-12, regarding the combination of Li, Urata, and Asada:
The arguments present that Li’s use of black, light-absorbing material for the encircling base portion which is not to provide a transparent optical cover or reflective optical member for guiding light emitted from the LED chip. The Examiner notes that the argued limitations are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Regarding the arguments for Asada, the Examiner notes that Asada is not relied on for limitations that have been disclosed and corresponded with Li; rather, Asada is incorporated for the stepped shape of the surrounding structure of the LED. With regards to the differences between the Asada and Li prior art, the Examiner notes that the rejection presented is a 103 for which there will certainly be differences by nature of the rejection. The prior art, however, have in common the LED and the surrounding wall structure which correspond to each other and are considered analogous art.
Regarding the arguments for Urata, the Examiner notes that Urata is not relied on for limitations that have been disclosed and corresponded with Li or Asada.
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Pertaining to the arguments stating that the office action fails to provide reasoning with rational underpinning:
The arguments which state details of the individual references and their differences have not been found persuasive. The arguments have not addressed the specific motivations for combining provided in the office action, nor provided persuasive rationale or evidence that the combination would render the invention inoperable, nor provided persuasive rationale or evidence that the prior art are non-analogous. The Examiner maintains that prima facie obviousness has been properly established in accordance with the MPEP and maintains the outstanding rejections.
Note by the Examiner
4. For clarity, the reference to specific claim numbers are presented in bold. Cited claim limitations are presented in bold the first time they are associated with a particular prior art disclosing the cited limitations, and subsequent reference to the already disclosed claim limitations are presented un-bolded. Certain elements from prior art which are not required by the claims are also presented un-bolded if they are particularly pertinent to understanding how the references are being combined. Item-to-item matching and Examiner explanations for 102 &/or 103 rejections have been provided in parenthesis.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claims 1-2, 5-6, and 9-10 are rejected under 35 U.S.C. 103 as obvious over Li et al. (US 2019/0051799 A1), hereinafter as L1, in view of Urata et al. (US 2012/0292642 A1), hereinafter as U1, in view of Asada et al. (US 2006/0034094 A1), hereinafter as A1
6. Regarding Claim 1, L1 discloses a light-emitting package (see in particular Fig. 4, see [0136] “LED device”), comprising:
a main body (element 22, see [0137] “The base 2 comprises a near-square base 21 with horizontal expansion, and an encircling base portion (also referred to an encircling base portion) 22 that is embedded in the base 21 and extends upwards around the base 21”);
a cavity (opening within element 2) disposed in the main body (see Fig. 4);
a base plane (upper surface plane of element 21) in the cavity; and
a light-emitting element (element 3, see [0136] “LED chip 3”) disposed in the cavity and connected with the base plane (see Fig. 4),
wherein the main body comprises a first step portion (portion abutting element 5) disposed in the cavity and surrounds the light-emitting element (see Fig. 4); wherein the first step portion comprises a first height relative to the base plane (see Fig. 4).
L1 does not disclose wherein the light-emitting element comprises: a substrate comprising a side wall, the side wall comprising a first cutting trace; and a semiconductor stack disposed on the substrate; the first cutting trace comprises a second height relative to the base plane, and the second height is greater than the first height
U1 discloses (see in particular Fig. 2B, 7B) wherein the light-emitting element (see [0056] “semiconductor light emitting diode element of Example 1”) comprises: a substrate (element 10, see [0061] “substrate 10”) comprising a side wall, the side wall comprising a first cutting trace (see Fig. 2B one of the rows of elements 34, 36 see [0057] “property-altered portions 34 and 36”); and a semiconductor stack (see Fig. 7B element 20, see [0064] “nitride semiconductor stacked layers 20”) disposed on the substrate (see Figs. 2B, 7B).
The specific light-emitting element as taught by U1 is incorporated as the specific light-emitting element of L1.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of U1 with L1 because the combination allows for efficiency of light extraction through chip side faces (see U1 [0083]); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known light-emitting element for another to obtain predictable results (see U1 Figs. 2B, 7B).
L1, U1 do not disclose the first cutting trace comprises a second height relative to the base plane, and the second height is greater than the first height.
A1 discloses a plurality of stepped portions (see Fig. 2 plurality of stepped shapes element 32a surrounding the LED element 12).
The multi stepped upward slanting sidewalls surrounding the LED as taught by A1 is incorporated as multi stepped upward slanting sidewalls surrounding the LED of R1, U1, wherein the combination discloses the first cutting trace comprises a second height relative to the base plane, and the second height is greater than the first height (see L1 Fig. 4 a multi stepped sidewall among which the first stepped shape can be selected at a first height can be selected to be lower than a second height within the height of the LED as seen in A1 Fig. 2).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of A1 with L1,U1 because the combination allows for improved light reflection to a forward direction (see A1 [0035]); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known sidewall slanted structure in a similar LED device for another to obtain predictable results (see A1 Fig. 2).
[Ryu et al. (KR 2013/0109743 A, see attached translation document), hereinafter as R2 is utilized herein as evidence]
7. Regarding Claim 2, L1, U1, A1 disclose the light-emitting package claimed in claim 1, wherein the light-emitting element further comprises: an electrode (see U1 Fig. 9 element 72, 74 see [0090] “a source electrode 72, a drain electrode 74”) connected to the base plane (see L1 the incorporated LED chip of U1 electrodes would connect to the base plane for the LED device to have power connection to turn on; also see evidentiary reference R2 Fig. 2 showing how the LED is oriented); and
a first insulating layer (see U1 Fig. 9 element 78 and [0090] “insulating layer 78”) disposed on the semiconductor stack and comprising an opening (see U1 Fig. 9 opening of element 72, 74); wherein the electrode is filled in the opening to electrically connect the semiconductor stack (see U1 Fig. 9).
[Ryu et al. (KR 2013/0109743 A, see attached translation document), hereinafter as R2 is utilized herein as evidence]
8. Regarding Claim 5, L1, U1, A1 disclose the light-emitting package claimed in claim 1, wherein the substrate comprises a top surface far from the base plane, and the side wall further comprises a second cutting trace (see L1 the incorporated LED chip of U1 electrodes would connect to the base plane for the LED device to have power connection to turn on; also see evidentiary reference R2 Fig. 2 showing how the LED is oriented); the first cutting trace is disposed between the second cutting trace and the top surface (see Fig. 2B the first cutting trace is selected to be the one between the second cutting trace and the top surface far from the base plane ).
9. Regarding Claim 6, L1, U1, A1 disclose the light-emitting package claimed in claim 5, wherein the second cutting trace comprises a third height relative to the base plane, and the third height is between the first height and the second height (the second cutting trace is selected as the one closer to the base plane such that it is between the first and second heights).
[Ryu et al. (KR 2013/0109743 A, see attached translation document), hereinafter as R2 is utilized herein as evidence]
10. Regarding Claim 9, L1, U1, A1 disclose the light-emitting package claimed in claim 1, wherein an interface is between the semiconductor stack and the substrate, and the interface comprises a fourth heigh relative to the package base plane; the height is between the second height and the fourth height (see L1 the incorporated LED chip of U1 electrodes would connect to the base plane for the LED device to have power connection to turn on, such that the semiconductor stack would be at a height closer to the base plane than the second height, and see A1 the first height in the multi-steps is selected lower than the fourth height; also see evidentiary reference R2 Fig. 2 showing how the LED is oriented).
11. Regarding Claim 10, L1, U1, A1 disclose the light-emitting package claimed in claim 9, wherein the main body further comprises a second step portion; wherein the second step portion comprises a fifth height relative to the base plane (see A1 a second stepped portion selected with a fifth height relative to the base plane).
12. Claims 3-4, 7-8, and 15 are rejected under 35 U.S.C. 103 as obvious over Li et al. (US 2019/0051799 A1), hereinafter as L1, in view of Urata et al. (US 2012/0292642 A1), hereinafter as U1, in view of Asada et al. (US 2006/0034094 A1), hereinafter as A1, in view of Maeda et al. (US 2007/0298529 A1), hereinafter as M1
13. Regarding Claim 3, L1, U1, A1 disclose the light-emitting package claimed in claim 1.
L1, U1, A1 do not explicilty disclose wherein the side wall further comprises a roughened region; the roughened region is adjacent to the first cutting trace and disposed on a top side and/or a bottom side of the first cutting trace.
M1 discloses (see in particular Figs. 1-4 and 7) wherein the side wall further comprises a roughened region (see the sidewalls have roughened regions above and below the cutting trace rows in real life application); the roughened region is adjacent to the first cutting trace and disposed on a top side and/or a bottom side of the first cutting trace (selected to be the roughened region adjacent to the first cutting trace and disposed on a top side and/or a bottom side of the first cutting trace).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of M1 with L1,U1,A1 because the combination allows for increased light extraction efficiency (external quantum efficiency) (see M1 [0105]); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known side surface area near cutting traces in an LED for another to obtain predictable results (see M1 Figs. 2, 4, 7).
14. Regarding Claim 4, L1, U1, A1, M1 disclose the light-emitting package claimed in claim 3, wherein the substrate comprises a top surface far from the base plane, a bottom surface, and a height located of fifty percent thickness of the substrate relative to the bottom surface, and the roughened region is disposed between the top surface of the substrate and the height of fifty percent thickness of the substrate relative to the bottom surface (see M1 the roughened regions and rows of cutting traces extend in intervals throughout the height of the substrate, among which the roughened region can be selected to be between the top surface of the substrate and the height of fifty percent thickness relative to the bottom surface).
15. Regarding Claim 7, L1, U1, A1 disclose the light-emitting package claimed in claim 5.
L1, U1, A1 do not disclose wherein the side wall further comprises a roughened region; the roughened region is adjacent to the first cutting trace and disposed on a top side and a bottom side of the first cutting trace; a portion of the roughened region is disposed between the first cutting trace and the second cutting trace.
M1 discloses (see in particular Figs. 1-4 and 7) wherein the side wall further comprises a roughened region (see the sidewalls have roughened regions above and below the cutting trace rows in real life application); the roughened region is adjacent to the first cutting trace and disposed on a top side and a bottom side of the first cutting trace (selected to be the roughened region adjacent to the first cutting trace and disposed on a top side and/or a bottom side of the first cutting trace); a portion of the roughened region is disposed between the first cutting trace and the second cutting trace (selected to be the roughened region between the first cutting trace and the second cutting trace).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of M1 with L1,U1,A1 because the combination allows for increased light extraction efficiency (external quantum efficiency) (see M1 [0105]); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known side surface area in an LED with laser for another to obtain predictable results (see Bentley Fig. 5 and [0020]).
16. Regarding Claim 8, L1, U1, A1 disclose the light-emitting package claimed in claim 5, wherein the substrate comprises a bottom surface and a height of fifty percent thickness of the substrate relative to the bottom surface (see U1).
L1, U1, A1 do not explicitly disclose the second cutting trace is disposed between the top surface and the height of fifty percent thickness of the substrate relative to the bottom surface.
M1 discloses (see in particular Figs. 1-4 and 7) the second cutting trace is disposed between the top surface and the height of fifty percent thickness of the substrate relative to the bottom surface (see in particular Figs. 2, 4, 7 roughened regions and rows of cutting traces extend in intervals throughout the height of the substrate, among which the second cutting trace can be selected to be between the top surface and the height of fifty percent thickness of the substrate relative to the bottom surface).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of M1 with L1,U1,A1 because the combination allows for increased light extraction efficiency (external quantum efficiency) (see M1 [0105]); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known side surface area in an LED with laser for another to obtain predictable results (see Bentley Fig. 5 and [0020]).
17. Regarding Claim 15, L1, U1, A1 disclose the light-emitting package claimed in claim 3.
L1, U1, A1 do not explicitly disclose wherein the roughened region is horizontally arranged.
M1 discloses (see in particular Figs. 1-4 and 7) wherein the roughened region is horizontally arranged (see in particular Figs. 2, 4, 7 roughened regions and rows of cutting traces extend in intervals throughout the height of the substrate, among which a roughened region is selected which have both horizontal and vertical arrangements selected as the horizontal ones).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of M1 with L1,U1,A1 because the combination allows for increased light extraction efficiency (external quantum efficiency) (see M1 [0105]); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known side surface area in an LED with laser for another to obtain predictable results (see Bentley Fig. 5 and [0020]).
18. Claim 16 is rejected under 35 U.S.C. 103 as obvious over Li et al. (US 2019/0051799 A1), hereinafter as L1, in view of Urata et al. (US 2012/0292642 A1), hereinafter as U1, in view of Asada et al. (US 2006/0034094 A1), hereinafter as A1, in view of Ryu et al. (US 2007/0090382 A1), hereinafter as R1
19. Regarding Claim 16, L1, U1, A1 disclose the light-emitting package claimed in claim 1.
L1, U1, A1 do not explicitly disclose further comprises an electric conducting structure; the electric conducting structure is embedded in the main body, and the base plane is on the electric conducting structure.
R1 discloses (see Figs. 2a-b) further comprises an electric conducting structure (element 23, see [0036] “lead electrodes 23a and 23b”); the electric conducting structure is embedded in the main body (embedded in element 21, see [0036] “package body 21”), and the base plane is on the electric conducting structure (see Fig. 2a).
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of R1 with L1 because the combination allows for electrical and mechanical connection to the light emitting diode which can provide electrical connection to out regions of the package body (see R1 Fig. 2a and [0035-0036]); and
the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known light-emitting diode electrical connection within a recess for another to obtain predictable results (see R1 Fig. 2a).
Allowable Subject Matter
25. Claims 11-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reason for indicating allowable subject matter:
The prior art made of record, either singularly or in combination, does not disclose or suggest at least the claim limitations of:
26. Claim 11, “the semiconductor stack is supported by the second step portion; the fourth height is between the fifth height of the second step portion and the first height of the first step portion” – as instantly claimed and in combination with the additionally claimed limitations. All claims depending on the current claim incorporate the same subject matter.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL PARK whose telephone number is (303)297-4277. The examiner can normally be reached Normal Schedule: M-F Sometime between 6:30 a.m. - 7:00 p.m..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H. Loke can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SAMUEL PARK/Examiner, Art Unit 2818
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