Prosecution Insights
Last updated: May 29, 2026
Application No. 18/509,035

BONDING STRUCTURES FOR HIGH-DENSITY METAL-TO-METAL BONDING AND METHODS FOR FORMING THE SAME

Non-Final OA §102§103
Filed
Nov 14, 2023
Examiner
ASSOUMAN, HERVE-LOUIS Y
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Western Digital Technologies Inc.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
607 granted / 666 resolved
+23.1% vs TC avg
Minimal +4% lift
Without
With
+4.2%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
25 currently pending
Career history
697
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
83.1%
+43.1% vs TC avg
§102
5.6%
-34.4% vs TC avg
§112
0.7%
-39.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 666 resolved cases

Office Action

§102 §103
Notice of AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al., hereinafter Chen254 (US 2020/0395254 A1). Regarding independent claim 1: Chen254 teaches (e.g., Figs. 2A-2B) a bonded assembly of a first semiconductor die ([0040] and [0050]: bottom die 200) and a second semiconductor die ([0051]: upper die 200’), wherein the first semiconductor die comprises: first dielectric material layers ([0042]-[0043]: 210a/210b/225 and 230a; see [0019]: material is a dielectric material) located on first semiconductor devices ([0042]: 201); first metal interconnect structures ([0043]-[0046]: 234/244) embedded in the first dielectric material layers (210a/210b/225 and 230a) and electrically connected to the first semiconductor devices (200); and a first bonding-level dielectric layer ([0043] and [0045]: 230b/230c) located on the first dielectric material layers and embedding first metallic bonding structures ([0043]-[0044]: 236 and 246) that are electrically connected to a respective one of the first metal interconnect structures ([0043]-[0044]: 234/244), and further embedding first dummy metallic bonding structures ([0043] and [0045]: 238) having a lesser vertical extent than the first metallic bonding structures ([0043]-[0044]: 236 and 246) and electrically isolated ([0045]: 230c/230b used for isolation) from the first metal interconnect structures ([0043]-[0044]: 234/244), wherein the first metallic bonding structures ([0043]-[0044] and [0047]: 236 and 246) have a same composition as the first dummy metallic bonding structures ([0045] and [0047]-[0050]: 238; the dummy metal feature 238 may include copper, copper alloys, nickel, aluminum, tungsten, a combination of thereof. In some embodiments, the first bonding metal layer 232, the second bonding metal layer 242, and the dummy metal feature 238 may have the same material, see [0047]; 242 is a composite of 244 and 246). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-5 and 11-14 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. hereinafter Chen254 (US 2020/0395254 A1) in view of Hou et al., hereinafter Hou562 (US 2022/0246562 A1). Regarding claim 2: Chen254 teaches the claim limitation of the bonded assembly of claim 1, on which this claim depends; Chen254 does not expressly teach that the first metallic bonding structures comprise first metallic via portions; the first dummy metallic bonding structures comprise first dummy metallic via portions having a lesser height than the first metallic via portions; and all top peripheries of the first metallic via portions and all top peripheries of the first dummy metallic via portions are located within a horizontal plane. Hou562 teaches (e.g., Fig. 9; Annotated Fig. 9) a bonded assembly comprising first metallic bonding structures comprise first metallic via portions (Fig. 9; Annotated Fig. 9); the first dummy metallic bonding structures comprise first dummy metallic via (Fig. 9; Annotated Fig. 9) portions having a lesser height than a first metallic via portions (Fig. 9; Annotated Fig. 9); and all top peripheries of the first metallic via portions (Fig. 9; Annotated Fig. 9) and all top peripheries of the first dummy metallic via portions (Fig. 9; Annotated Fig. 9) are located within a horizontal plane (Fig. 9; Annotated Fig. 9). PNG media_image1.png 837 1353 media_image1.png Greyscale It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the bonded assembly of Chen254, the first dummy metallic bonding structures comprising first dummy metallic via portions having a lesser height than the first metallic via portions; and all top peripheries of the first metallic via portions and all top peripheries of the first dummy metallic via portions being located within a horizontal plane, as taught by Hou562, for the benefits of enhancing the anchorage of the bonding pad and increasing the bonding strength of the interconnect structures, thus improve device reliability. Regarding claim 3: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 2, on which this claim depends; wherein the first bonding-level dielectric layer comprises a stack of a first silicate glass layer (Hou562: see [0018]; [0035], [0037] and [0064]) and a first dielectric bonding material layer (Hou562: [0045]: 230c). Regarding claim 4: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 3, on which this claim depends; Chen254 as modified by Hou562 teaches that each of the first metallic bonding structures (Chen254: [0043]-[0046]: 234/244) comprises a respective first metallic pad portion (Chen254: [0043]-[0046]: 236/246) that is connected to a respective one of the first metallic via portions (Chen254: 244/234); and each of the first dummy metallic bonding structures comprises a respective first dummy metallic pad portion (Hou562: Fig. 9; Annotated Fig. 9) that is connected to a respective subset of a plurality of the first dummy metallic via portions (Hou562: Fig. 9; Annotated Fig. 9). Regarding claim 5: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 4, on which this claim depends; Chen254 as modified by Hou562 teaches that a horizontal interface between the first silicate glass layer (Hou: [0018]; [0035], [0037] and [0064]) and the first dielectric bonding material layer is located within the horizontal plane (Hou562: Fig. 9; Annotated Fig. 9). Regarding claim 11: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 3, on which this claim depends. Chen254 as modified by Hou562 teaches that the first metallic bonding structures consist of the first metallic via portions (Chen254: 244 and 234); the first dummy metallic bonding structures consist of the first dummy metallic via portions (Hou562: Annotated Fig. 9). Regarding claim 12: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 11, on which this claim depends. wherein the first dielectric bonding material layer (Chen254: 230c bottom portion) comprises a horizontal surface located within the horizonal plane and bonded to a second dielectric bonding material layer (Chen254: 230c upper portion) within the second semiconductor die by dielectric-to-dielectric bonding. note that a "product claim" is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); In re Fitzgerald, 205 USPQ 594, 596 (CCPA); In re Marosi et al., 218 USPQ 289 (CAFC); and most recently, In re Thorpe et al., 227 USPQ 964 (CAFC, 1985) all of which make it clear that it is the final product per se which must be determined in a "product claim", and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product; MPEP § 2113. Regarding claim 13: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 2, on which this claim depends; Chen254 as modified by Hou562 teaches that the first bonding-level dielectric layer (Chen254: 230c bottom portion) comprises a first silicate glass layer (Hou562: [0018]; [0035], [0037] and [0064]) laterally surrounding first metallic via portions (Chen254: 244; 234) and the first dummy metallic via portions (Hou562: Annotated Fig. 9); and a top surface of the first silicate glass layer (Hou562: [0035], [0037] and [0064]) is located within the horizontal plane (Chen254: Fig. 2B; top surface of 230c bottom portion is located within the horizontal plane) Regarding claim 14: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 13, on which this claim depends; Chen254 as modified by Hou562 teaches that the first silicate glass layer (Hou562: see [0018]; [0035], [0037] and [0064]) is bonded to a second dielectric bonding material layer (Chen254: 230c upper portion) within the second semiconductor die (Chen254: 200”) by dielectric-to-dielectric bonding (note that a "product claim" is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); In re Fitzgerald, 205 USPQ 594, 596 (CCPA); In re Marosi et al., 218 USPQ 289 (CAFC); and most recently, In re Thorpe et al., 227 USPQ 964 (CAFC, 1985) all of which make it clear that it is the final product per se which must be determined in a "product claim", and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product; MPEP § 2113). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. hereinafter Chen254 (US 2020/0395254 A1) in view of Hou et al., hereinafter Hou562 (US 2022/0246562 A1) as applied above and further in view of Hou et al., hereinafter Hou286 (US 2023/0008286 A1). Regarding claim 6: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 4, on which this claim depends; Chen254 as modified by Hou562 teaches that the first metallic pad portions (Chen254: 236) and the first dummy metallic pad portions (Chen254: 238) have a same height or almost a same height of the first dielectric bonding material layer (Chen254: 230c). Chen254 as modified by Hou562 does not expressly teach the same thickness of first dielectric bonding material layer. Hou286 teaches (e.g. Fig.11) a bonded assembly comprising a first metallic pad ([0076]-[0078]: 488 connected to element 980 interconnect structure) portions and a first dummy metallic pad portions ([0076]-[0078]: 370 of dummy portions) having a same height as a thickness of a first dielectric bonding material layer ([0076]-[0078]: 470). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the bonded assembly of Chen254 as modified by Hou562, the first metallic pad portions and the first dummy metallic pad portions having a same height as a thickness of the first dielectric bonding material layer, as taught by Hou286, for the benefits of simplifying the design process and reducing the number of masking steps, thus increasing manufacturing throughput. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. hereinafter Chen254 (US 2020/0395254 A1) in view of Hou et al., hereinafter Hou562 (US 2022/0246562 A1) as applied above and further in view of Chuang et al. (US 2023/0261004 A1). Regarding claim 7: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 4, on which this claim depends, wherein the first dielectric bonding material layer (Chen254: 230c bottom portion) that is bonded to a second dielectric bonding material layer ([0045]: 230c upper portion) in the second semiconductor die (Chen254: [0061]: 200’) via dielectric-to-dielectric bonding (Chen254: [0051]-[0054]). Chen254 as modified by Hou562 does not expressly teach that the first dielectric bonding material layer comprises a first silicon carbide nitride layer. Chuang teaches (e.g., Figs. 1-15) bonded assembly comprising a first dielectric bonding material layer comprising a first silicon carbide nitride layer ([0036]-[0037]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the bonded assembly of Chen254 as modified by Hou562, the first dielectric bonding material layer comprising a first silicon carbide nitride layer, as taught by Chuang, for the benefits of enhancing the bonding strength of the integrated circuit by increasing adhesion, thus, avoiding delamination. Furthermore, it is noted that silicon carbide nitride layer is an art recognized material suitable for bonding. Applicant is reminded that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) (Claims to a printing ink comprising a solvent having the vapor pressure characteristics of butyl carbitol so that the ink would not dry at room temperature but would dry quickly upon heating were held invalid over a reference teaching a printing ink made with a different solvent that was nonvolatile at room temperature but highly volatile when heated in view of an article which taught the desired boiling point and vapor pressure characteristics of a solvent for printing inks and a catalog teaching the boiling point and vapor pressure characteristics of butyl carbitol. "Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). KSR or case law: MPEP 2144.07, Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. hereinafter Chen254 (US 2020/0395254 A1) in view of Hou et al., hereinafter Hou562 (US 2022/0246562 A1) as applied above and further in view of Chen339 (US 2020/0395339 A1). Regarding claim 8: Chen254 and Hou562 teach the claim limitation of the bonded assembly of claim 4, on which this claim depends. wherein each of the first dummy metallic via portions has a respective maximum lateral dimension that is less than 1/3 of a maximum lateral dimension of one of the first metallic via portions. Chen339 teaches (e.g., Figs. 4D-4E) a bonded assembly comprising a first dummy metallic via portions ([0042]: 138) having a respective maximum lateral dimension that is in the range of less than 1/3 of a maximum lateral dimension of one of the first metallic via portions ([0042]: 124). Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the dimensions of the dummy metallic via portions, so that the first dummy metallic via portions have a respective maximum lateral dimension that is less than 1/3 of a maximum lateral dimension of one of the first metallic via portions, for the benefits of reducing the amount of material used for the intended use and based on design constraints and requirements. Allowable Subject Matter Claims 1-20 are objected to as having allowable subject matter and would be allowable if the outstanding rejection is overcome. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 9: the cited prior art of record, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, a bonded assembly comprising: “wherein the respective subset of the plurality of the first dummy metallic via portions comprises a respective two-dimensional array of first dummy metallic via portions each having a lesser maximum lateral extent than any of the first metallic via portions”. Regarding claim 10: the cited prior art of record, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, a bonded assembly comprising: “wherein the respective subset of the plurality of the first dummy metallic via portions comprises a respective set of two or more first dummy metallic via portions that are nested inside one another such that each first dummy metallic via portion within the respective set of two or more first dummy metallic via portions laterally surrounds or is laterally surrounded by any other first dummy metallic via portion within the respective set of two or more first dummy metallic via portions”. Claims 15-20 are allowable. The following is an examiner’s statement of reasons for allowance: Regarding claim 15: the most relevant prior art references (e.g., Figs. 2A-2B of US 2020/0395254 A1 to Chen254 et al.,) substantially teach the method of forming a semiconductor structure, comprising: forming first semiconductor devices ([0040] and [0050]: bottom die 200) over, on or in a first substrate ([0042]: bottom substrate 202); forming first metal interconnect structures ([0043]-[0044]: 234/244) embedded in first dielectric material layers ([0042]-[0043]: 210a/210b/225 and 230a; see [0019]: material is a dielectric material) over the first semiconductor devices; forming a first bonding-level dielectric layer ([0043] and [0045]: 230b/230c) over the first dielectric material layers; forming first metallic bonding structures ([0043]-[0044] and [0047]: 236 and 246) and first dummy metallic bonding structures ([0045] and [0047]-[0050]: 238), wherein each of the first metallic bonding structures is formed in a respective first volume that comprises an entirety of a volume of a respective one via cavities ([0043]-[0045] and [0047]-[0050]), and wherein the first metallic bonding structures have a same composition as the first dummy metallic bonding structures ([0045] and [0047]-[0050]: 238; the dummy metal feature 238 may include copper, copper alloys, nickel, aluminum, tungsten, a combination of thereof. In some embodiments, the first bonding metal layer 232, the second bonding metal layer 242, and the dummy metal feature 238 may have the same material, see [0047]; 242 is a composite of 244 and 246). However, none of the prior art references either singly or in proper combination discloses or fairly suggests, along with the other claimed features, a method of forming a semiconductor structure, comprising: “forming via cavities and dummy via cavities in the first bonding-level dielectric layer, wherein the via cavities vertically extend from a topmost surface of the bonding-level dielectric layer to a bottommost surface of the bonding-level dielectric layer, and the dummy via cavities have a lesser vertical extent than the via cavities; and each of the first dummy metallic bonding structures is formed in a respective second volume that comprises an entirety of a volume of a respective subset of a plurality of the dummy via cavities”. Claims 16-20 depend from claim 15 and therefore, are allowable for the same reason as claim 15. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HERVE-LOUIS Y ASSOUMAN whose telephone number is (571)272-2606. The examiner can normally be reached M-F: 08:30 AM-5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DAVIENNE MONBLEAU can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HERVE-LOUIS Y ASSOUMAN/ Examiner, Art Unit 2812
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Prosecution Timeline

Nov 14, 2023
Application Filed
Apr 08, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
95%
With Interview (+4.2%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 666 resolved cases by this examiner. Grant probability derived from career allowance rate.

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