DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 9-11, and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by HAN et al. (U.S. 2021/0118944 A1, hereinafter refer to HAN).
Regarding Claim 1: HAN discloses a vertical-type light-emitting diode (see HAN, Fig.12 as shown below and ¶ [0002]), comprising:
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a substrate (210) (see HAN, Fig.12 as shown above);
a semiconductor stack layer (243/244/245) disposed on the substrate (210), wherein the semiconductor stack layer (243/244/245) comprises a first semiconductor layer (243), a light-emitting layer (244) and a second semiconductor layer (245) that are sequentially stacked on the substrate (210);
an insulation implant layer (242) formed in the semiconductor stack layer (243/244/245) to divide the semiconductor stack layer (243/244/245) into at least two individual dies (240) (see HAN, Fig.12 as shown above and ¶ [0084]).
Regarding Claim 2: HAN discloses a vertical-type light-emitting diode as set forth in claim 1 as above. HAN further teaches wherein the insulation implant layer (242) extends downwardly from an upper surface of the second semiconductor layer (245) into the first semiconductor layer (243) (see HAN, Fig.12 as shown above and ¶ [0084]).
Regarding Claim 3: HAN discloses a vertical-type light-emitting diode as set forth in claim 1 as above. HAN further teaches wherein the insulation implant layer (242) is directly formed in the semiconductor stack layer (243/244/245) by means of ion implantation (see HAN, Fig.12 as shown above and ¶ [0084]).
Note: patentability of a product does not depend on its method of production.
Regarding Claim 4: HAN discloses a vertical-type light-emitting diode as set forth in claim 1 as above. HAN further teaches wherein a material of the insulation implant layer (242) comprises hydrogen atoms, argon atoms, nitrogen atoms or helium atoms (see HAN, Fig.12 as shown above and ¶ [0084]).
Regarding Claim 5: HAN discloses a vertical-type light-emitting diode as set forth in claim 1 as above. HAN further teaches wherein the at least two individual dies (240) are insulated from each other (see HAN, Fig.12 as shown above).
Regarding Claim 6: HAN discloses a vertical-type light-emitting diode as set forth in claim 1 as above. HAN further teaches wherein each of the individual dies (240) comprises the first semiconductor layer (243), the light-emitting layer (244) and the second semiconductor layer (245) stacked in sequence (see HAN, Fig.12 as shown above).
Regarding Claim 9: HAN discloses a vertical-type light-emitting diode as set forth in claim 1 as above. HAN further teaches wherein a thickness of the insulation implant layer (242, note: the thickness of 242 is equal to the thickness of 240) ranges from 1.5 μm to 2 μm (less than or equal to approximately 7 μm) (see HAN, Fig.12 as shown above and ¶ [0127]).
Regarding Claim 10: HAN discloses a vertical-type light-emitting diode as set forth in claim 1 as above. HAN further teaches wherein a thickness of the semiconductor stack layer (243/244/245) is less than or equal to 2 μm (less than or equal to approximately 7 μm) (see HAN, Fig.12 as shown above and ¶ [0127]).
Regarding Claim 11: HAN discloses a vertical-type light-emitting diode as set forth in claim 1 as above. HAN further teaches wherein a height difference of an upper surface of the vertical-type light-emitting diode is less than 0.5 μm (note: no height difference between individual vertical-type light-emitting diode, which is considered equivalent to the claimed invention limitation) (see HAN, Fig.12 as shown above).
Regarding Claim 16: HAN discloses a vertical-type light-emitting diode as applied to claim 1 above. HAN further teaches a light-emitting device, comprising: a circuit substrate (230) and a vertical-type light-emitting diode (240) (see HAN, Fig.12 as shown above),
wherein the vertical-type light-emitting diode (240) is disposed on the circuit substrate (230), and the vertical-type light-emitting diode (240) adopts the vertical-type light-emitting diode according to claim 1 (see HAN, Fig.12 as shown above).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 7 and 12-15 are rejected under 35 U.S.C. 103 as being unpatentable over HAN et al. (U.S. 2021/0118944 A1, hereinafter refer to HAN) as applied to claim 1 above, and further in view of Applicant Admitted Prior Art (U.S. 2024/0170609 A1, hereinafter refer to AAPA).
Regarding Claim 7: HAN discloses a vertical-type light-emitting diode as applied to claim 1 above. HAN is silent upon explicitly disclosing wherein a spacing between two of the adjacent insulation implant layers is less than or equal to 5 μm.
Before effective filing date of the claimed invention the disclosed spacing between two of the adjacent insulation implant layers were known to be within the recited ranges in order to obtain a very small chip size.
For support see AAPA, which teaches wherein a spacing between two of the adjacent insulation implant layers (PI) is less than or equal to 5 μm (see AAPA, Fig.1F as shown below and ¶ [0005]).
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Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of HAN and AAPA to enable the spacing between two of the adjacent insulation implant layers of HAN to be within the recited ranges as taught by AAPA in order to obtain a very small chip size.
Regarding Claim 12: HAN discloses a vertical-type light-emitting diode as applied to claim 1 above. HAN further teaches wherein the vertical-type light-emitting diode (240) further comprises a first electrode (241) and a second electrode (247) (see HAN, Fig.12 as shown above),
the first electrode (241) is disposed between the semiconductor stack layer (243/244/245) and the substrate (210) (see HAN, Fig.12 as shown above), and
the second electrode (247) is disposed on one side of the semiconductor stack layer (243/244/245) away from the substrate (240) (see HAN, Fig.12 as shown above).
HAN is silent upon explicitly disclosing wherein the at least two individual dies share the first electrode and the second electrode to form a parallel connection structure.
Before effective filing date of the claimed invention the disclosed at least two individual dies were known to share the first electrode and the second electrode to form a parallel connection structure.
For support see AAPA, which teaches wherein the at least two individual dies share the first electrode (N-electrode) and the second electrode (N-electrode) to form a parallel connection structure (see AAPA, Fig.1F as shown above).
Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of HAN and AAPA to enable the at least two individual dies of HAN share the first electrode and the second electrode as taught by AAPA in order to form a parallel connection structure.
Regarding Claim 13: HAN discloses a vertical-type light-emitting diode as set forth in claim 12 as above. The combination of HAN and AAPA further teaches wherein the second electrode (247) adopts a transparent current spreading electrode and/or a metal electrode (see HAN, Fig.12 as shown above and ¶ [0087]).
Regarding Claim 14: HAN discloses a vertical-type light-emitting diode as set forth in claim 12 as above. The combination of HAN and AAPA further teaches wherein the first semiconductor layer (245) is an N-type semiconductor layer, the second semiconductor layer (243) is a P-type semiconductor layer (see HAN, Fig.12 as shown above and ¶ [0124]- ¶ [0126]),
the first electrode (n-electrode) is a common cathode electrode, and the second electrode (p-electrode) is a common anode electrode (see AAPA, Fig.1F as shown above).
Regarding Claim 15: HAN discloses a vertical-type light-emitting diode as set forth in claim 12 as above. The combination of HAN and AAPA further teaches wherein the first semiconductor layer (243) is a P-type semiconductor layer, the second semiconductor layer (245) is an N-type semiconductor layer (see HAN, Fig.12 as shown above and ¶ [0124]- ¶ [0126]),
the first electrode (p-electrode) is a common anode electrode, and the second electrode (P-electrode) is a common cathode electrode (see AAPA, Fig.1F as shown above).
Claim(s) 8 is rejected under 35 U.S.C. 103 as being unpatentable over HAN et al. (U.S. 2021/0118944 A1, hereinafter refer to HAN) as applied to claim 1 above, and further in view of Xia (CN 109004078 B, hereinafter refer to Xia).
Regarding Claim 8: HAN discloses a vertical-type light-emitting diode as applied to claim 1 above. HAN is silent upon explicitly disclosing wherein a width of the insulation implant layer is less than or equal to 2 μm.
Before effective filing date of the claimed invention the disclosed width of the insulation implant layer were known in order to reduce the lateral light leakage of the micro LED and improving the display effect.
For support see Xia, which teaches wherein a width (d) of the insulation implant layer (M) is less than or equal to 2 μm (the width of groove K adjacent between two micro-LED1011 is d, wherein 1μm ≤ d is less than or equal to 5μm) (see Xia, Figs.3, 5, and 8 and page.5).
Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of HAN and Xia to enable the Han insulation implant layer to have the recited width as taught by Xia in order to reduce the lateral light leakage of the micro LED and improving the display effect.
Conclusion
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/BITEW A DINKE/Primary Examiner, Art Unit 2812