Prosecution Insights
Last updated: April 19, 2026
Application No. 18/509,301

DATA STORAGE DEVICE AND OPERATING METHOD THEREOF

Non-Final OA §102§103§112
Filed
Nov 15, 2023
Examiner
NGUYEN, VAN THU T
Art Unit
2824
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SK Hynix Inc.
OA Round
3 (Non-Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
2y 4m
To Grant
89%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
785 granted / 950 resolved
+14.6% vs TC avg
Moderate +7% lift
Without
With
+6.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
31 currently pending
Career history
981
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
44.8%
+4.8% vs TC avg
§102
33.2%
-6.8% vs TC avg
§112
14.5%
-25.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 950 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to 01/23/2026 Amendment and RCE. Claims 16-24, 26-69, 71-76 are pending and examined. Claims 1-15, 25, 70 have been cancelled. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: DATA STORAGE DEVICE AND OPERATING METHOD COMPRISING AUTOMATIC REFRESH AND MANUAL REFRESH OPERATIONS. Claim Rejections - 35 USC § 112 Claim 54 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claim 54, line 2-3, it is not clear if the first refresh operation, second refresh operation are same or different from automatic refresh operation and manual refresh operation in claim 16, lines 4-5. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 16-24, 26-27, 29-33, 35, 37-38, 40-48, 50-53,55, 56-57, 59-61, 63, 65, 68-69, 71-74, 76 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 10,025,514 to Suzuki et al. (hereafter Suzuki). Regarding independent claim 16, Suzuki teaches a data storage device comprising: an interface configured to receive a command from an external device (FIG. 2: NAND I/O interface 11 of FIG. 2 received command from memory controller 5 of FIG. 1, see 13:7-16); a nonvolatile memory device including memory blocks for storing data (FIG. 2: memory array 13); and a device controller (FIG. 2: NAND controller unit 12) configured to activate one of an automatic refresh operation (FIG. 8: step S20 to execute normal refreshing) and a manual refresh operation (FIG. 8: step S40 to execute overwrite refreshing) to recover the data stored in the nonvolatile memory device, wherein the device controller is configured to execute one of the automatic refresh operation and the manual refresh operation when detected errors are within a correctable range (FIG. 8: e.g. overwrite refreshing is executed when number of Th2 ≤ number of error bits of block < Th1 in steps S10 and S30). Regarding dependent claim 17, Suzuki teaches wherein the device controller is configured to activate the manual refresh operation in response to a command of the external device (e.g. execution of overwrite refreshing based on the command XXh, see 13:7-16). Regarding dependent claim 18, Suzuki teaches wherein the device controller is configured to activate the automatic refresh operation based on a predetermined reference (FIG. 8: number of error bits of block ≥ Th1 in step S10). Regarding dependent claim 19, Suzuki teaches wherein the device controller is configured to perform the manual refresh operation activated by a command of the external device in a foreground (e.g. when the overwrite refresh corresponding to a read process in the foreground, and execution of overwrite refreshing based on the command XXh, see 13:7-16). Regarding dependent claim 20, Suzuki teaches wherein the device controller is configured to perform the automatic refresh operation activated by a predetermined reference in a background (i.e. when the normal refresh corresponding to a patrol read in the background, see 11:23-43). Regarding dependent claim 21, Suzuki teaches wherein the device controller is configured to perform a refresh operation in response to a command received from the external device when the manual refresh operation is activated (execution of overwrite refreshing based on the command XXh, see 13:7-16). Regarding dependent claim 22, Suzuki teaches wherein the device controller is configured to receive a command for checking a status of the data or the memory blocks from the external device (e.g. patrol reading based on a read command transmitted from the host, see 11:27-31) before the manual refresh operation is activated. Regarding dependent claim 23, Suzuki teaches wherein the device controller is configured to check a status of the data or the memory blocks regardless of a command of the external device (e.g. in response to patrol read in the background). Regarding dependent claim 24, Suzuki teaches wherein the device controller is configured to execute one of the automatic refresh operation and the manual refresh operation based on at least one of the number of bit errors, a read count, or a program/erase count (in this case, number of error bits). Regarding dependent claim 26, Suzuki teaches wherein the device controller is configured to perform one of the automatic refresh operation and the manual refresh operation to read the data stored in a memory block, detect and correct an error of the data, and store error-corrected data (FIG. 11: step S110 and S120 for overwrite refreshing, see 9:64-10:23 and 13:17-43). Regarding dependent claim 27, Suzuki teaches wherein the device controller is configured to store the error-corrected data in another memory block (for normal refreshing, see 9:48-61). Regarding dependent claim 29, Suzuki teaches wherein to recover the data includes to improve reliability of a damaged data (e.g. execute programming for error cell in step S120 of FIG. 11 to correct data, see 9:64-10:23). Regarding dependent claim 30, Suzuki teaches wherein to recover the data includes to reduce an error of a damaged data (e.g. execute programming for error cell in step S120 of FIG. 11 to correct data, see 9:64-10:23). Regarding dependent claim 31, Suzuki teaches wherein to recover the data includes to correct an error of a damaged data (via ECC unit 23 of FIG. 1). Regarding dependent claim 32, Suzuki teaches wherein to recover the data includes to detect and correct an error of a damaged data, and store error-corrected data (via ECC unit 23 of FIG. 1 and overwrite refreshing, wherein overwrite refreshing comprising programming error cell in step S120 of FIG. 11 to correct data, see 9:64-10:23). Regarding dependent claim 33, Suzuki teaches wherein the error-corrected data includes a result of a ECC decoding operation (via ECC unit 23 of FIG. 1). Regarding dependent claim 35, Suzuki teaches wherein to recover data includes to transfer the data from one memory block to another memory block (for normal refreshing, see 9:48-61). Regarding dependent claim 37, Suzuki implicitly teaches wherein the automatic refresh operation and the manual refresh operation run without conflict when a period of the automatic refresh operation and a period of the manual refresh operation are overlapped at a time (FIG. 8 shows normal refresh and overwrite refresh operating parallel without conflict). Regarding dependent claim 38, Suzuki implicitly teaches wherein, after the automatic refresh operation or an automatic refresh scan operation is initiated (e.g. initiating patrol read), the device controller is configured to receive a command regarding to the manual refresh operation and/or the manual refresh scan operation (execution of overwrite refreshing based on the command XXh, see 13:7-16). Regarding dependent claim 40, Suzuki teaches wherein, before the manual refresh operation is activated, the device controller is configured to temporarily pause the automatic refresh operation (FIG. 9: when the result of step S60 is NO, it is seen that the normal refreshing in step S70 is temporarily paused as overwrite refreshing in step S80 is activated). Regarding dependent claim 41, Suzuki teaches wherein, before performing the refresh operation, the device controller is configured to check a status of the data or reliability of the memory blocks to monitor device lifetime remaining (e.g. issuing patrol reading based on a read command transmitted from the host, see 11:27-31). Regarding dependent claim 42, Suzuki teaches wherein the manual refresh operation is a refresh operation such as a foreground refresh operation or a refresh operation triggered by the external device (e.g. when the overwrite refresh corresponding to a read process in the foreground, and execution of overwrite refreshing based on the command XXh, see 13:7-16). Regarding dependent claim 43, Suzuki implicitly teaches wherein the automatic refresh operation is a refresh operation such as a background refresh operation or a self-refresh operation (e.g. when the normal refresh corresponding to a patrol read in the background, see 11:23-43). Regarding dependent claim 44, Suzuki implicitly teaches wherein, when the foreground refresh operation is selected (i.e. when read process is selected, wherein the read process in the foreground), the device controller is configured to receive a command for manually checking data from the external device and perform the foreground refresh operation (e.g. when the overwrite refresh corresponding to a read process in the foreground, and execution of overwrite refreshing based on the command XXh, see 13:7-16). Regarding dependent claim 45, Suzuki implicitly teaches wherein, when the background refresh operation is selected (e.g. when patrol read process is selected, wherein the patrol read process in the background), the device controller is configured to automatically check the data, and refresh the data (normal refresh operation is seen as self-refresh operation because it doesn’t require to be triggered by an external device). Regarding dependent claim 46, Suzuki teaches wherein, when the background refresh operation is selected, the device controller is configured to check a status of the data or the memory blocks regardless of the command of the external device (e.g. when patrol read process is selected, wherein the patrol read process in the background). Regarding dependent claim 47, Suzuki teaches wherein the device controller is configured to perform the background refresh operation when the data storage device is host idle time which is not used by a user (e.g. when patrol read process is selected, wherein the patrol read process in the background when the memory is in idle). Regarding dependent claim 48, Suzuki teaches wherein the device controller is configured to operate the manual refresh operation when detected errors are within a correctable range and a number of the detected errors is over a predetermined threshold number (FIG. 8: e.g. overwrite refreshing is executed when number of Th2 ≤ number of error bits of block < Th1 in steps S10 and S30). Regarding dependent claim 50, Suzuki implicitly teaches wherein the device controller is configured to manually check the data and refresh the data at periodic interval (because patrol read is seen running automatically or manually in the background during idle system times). Regarding dependent claim 51, Suzuki implicitly teaches wherein the device controller is configured to automatically check the data and refresh the data (because patrol read is seen running automatically or manually in the background during idle system times). Regarding dependent claim 52, Suzuki implicitly teaches wherein the manual refresh operation includes at least one of a passive refresh scan operation and a passive refresh operation (e.g. when the overwrite refresh corresponding to a patrol read process in the background). Regarding dependent claim 53, Suzuki implicitly teaches wherein the automatic refresh operation includes at least one of an active refresh scan operation and an active refresh operation (e.g. when the normal refresh corresponding to a read process in the foreground). Regarding dependent claim 55, Suzuki teaches wherein the manual refresh operation is activated after receiving a scan command (e.g. when patrol reading is in response to a read command transmitted from the host, see 11:27-31), Regarding dependent claim 56, Suzuki implicitly teaches wherein the manual refresh operation is activated regardless of receiving another command from the external device (because execution of overwrite refreshing based on the command XXh, see 13:7-16). Regarding dependent claim 57, Suzuki teaches wherein the device controller is configured to operate the manual refresh operation when a number of the detected errors is over a predetermined threshold number (FIG. 8: e.g. overwrite refreshing is executed when number of Th2 ≤ number of error bits of block < Th1 in steps S10 and S30). Regarding dependent claim 59, Suzuki implicitly teaches wherein the device controller is configured to scan a status of the data or the memory blocks and store device health information related to result of scanning operation (FIG. 1: e.g. block management unit 10b storing the number of times of erasing in units of blocks, see 6:52-60). Regarding dependent claim 60, Suzuki teaches wherein the information is calculated based on at least one of a read count, a program/erase cycles or the number of bit errors (the number of times of erasing in units of blocks). Regarding dependent claim 61, Suzuki wherein the device health information indicating at least one of a read count, a program/erase count, or the number of bit errors (the number of times of erasing in units of blocks. Regarding dependent claim 63, Suzuki teaches wherein the memory block selected to execute the refresh operation has a read count exceeding a predetermined threshold number (FIG. 8: number of error bits of block ≥ Th1 in step S10). Regarding dependent claim 65, Suzuki teaches wherein the device controller is configured to initiate the refresh operation based on a necessity of refreshing the data (FIG. 8: number of error bits of block ≥ Th1 in step S10 is considered necessity of refreshing the data with limit set in FIG. 10). Regarding independent claim 68, Suzuki teaches a data storage device comprising: a nonvolatile memory device including memory blocks for storing data (FIG. 2: memory array 13); and a device controller (FIG. 2: NAND controller unit 12) configured to receive a command of reading the data from an external device (e.g. issuing normal reading or patrol reading based on a read command transmitted from the host, see 11:27-31), execute a refresh operation for the data stored in the nonvolatile memory device (FIG. 8: either normal refreshing in step S20 or overwrite refreshing in step S40), the refresh operation being one of a foreground refresh operation or a background refresh operation, and transfer a recovered data to the external device (when the normal refreshing corresponding to a normal read), wherein the device controller is configured to execute the refresh operation based on at least one of a residual number of errors, a count of program-erase cycles or a read count (FIG. 8: step S10). Regarding dependent claim 69, Suzuki teaches wherein the device controller is configured to execute the refresh operation based on a necessity of refreshing a memory block (FIG. 8: number of error bits of block ≥ Th1 in step S10 is considered necessity of refreshing the data with limit set in FIG. 10). Regarding dependent claim 71, Suzuki teaches wherein the device controller is configured to execute the refresh operation during a read operation for reading the data (e.g. during normal read). Regarding dependent claim 72, Suzuki teaches wherein the device controller is configured to perform the refresh operation to detect and correct an error by reading the data stored in a memory block, and copy the recovered data which is error-corrected data into a new destination block (for normal refreshing, see 9:48-61). Regarding dependent claim 73, Suzuki teaches wherein the refresh operation is transparent to the external device (FIG. 1: because the memory controller 5 controls NAND 10 in normal read). Regarding dependent claim 74, Suzuki teaches wherein, before performing the refresh operation, selection of which refresh operation is activated is executed (FIG. 8: selecting either normal refreshing or overwrite refreshing when the condition is satisfied). Regarding dependent claim 76, Suzuki teaches wherein the device controller is configured to perform the refresh operation on a memory block that is considered to be in need of refresh (FIG. 8: number of error bits of block ≥ Th1 in step S10 is considered necessity of refreshing the data with limit set in FIG. 10). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 28, 34, 36, 49, 58, 64, 66, 67, 75 are rejected under 35 U.S.C. 103 as being unpatentable over Suzuki in view of US 9,252,817 Pan et al. (hereafter Pan). Suzuki teaches, as applied in prior rejection of claim 16, all claimed subject matter except further limitations set forth in the following claims. Regarding dependent claim 28, Pan teaches wherein the device controller is configured to re-program the memory block by erasing the memory block and storing the error-corrected data (see 21:53-57). Since Suzuki and Pan are both from the same field of endeavor, the purpose disclosed by Pan would have been recognized in the pertinent art of Suzuki. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to realize that it is common to refresh a non-volatile memory block by writing the correct-data in different block or in the same block after erasing as suggested by Pan. Regarding dependent claim 34, Pan teaches wherein to recover the data includes to read a damaged data, and store modified data in a memory block (see 21:50-57) of which a read count has reached a predetermined threshold count (see 20:36-66). Regarding dependent claim 36, see rejection applied to claim 28 above. Regarding dependent claim 49, Pan teaches a memory block having a program/erase count exceeding a predetermined threshold number is selected to execute the refresh operation (see 21:35-49). This suggests the manual refresh of Suzuki can be applied to memory block having a program/erase count exceeding a predetermined threshold number, and independent from the number of errors in the data. Regarding dependent claim 58, see rejection applied to claim 49 above. Regarding dependent claim 64, Pan teaches wherein the memory block selected to execute the refresh operation has a program/erase count exceeding a predetermined threshold number (see 21:35-49). Regarding dependent claim 66, see rejection applied to claim 64 above. Regarding dependent claim 67, Pan teaches wherein the device controller is configured to initiate the refresh operation when program/erase cycles increases and/or temperature increases (e.g. program/erase cycle count, see 21:35-22:7). Regarding dependent claim 75, see rejection applied to claim 49 above. Claims 39, 62 are rejected under 35 U.S.C. 103 as being unpatentable over Suzuki in view of PGPub. 2013/0173972 Kubo (hereafter Kubo). Suzuki teaches, as applied in prior rejection of claim 16, all claimed subject matter except further limitations set forth in the following claims. Regarding dependent claim 39, Kubo teaches many patrol read commands may be to a SSD device in parallel (see FIG. 5 and paragraph [0018]). It is seen that with multiple patrol read requests performed concurrently, there are obvious some overlap in timing. Since Suzuki and Kubo are both from the same field of endeavor, the purpose disclosed by Suzuki would have been recognized in the pertinent art of Kubo. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to apply the refreshing technique of Suzuki to the memory system of Kubo in order to reducing damage caused by frequent normal refreshing process (see Suzuki, 9:48-10:23). when there are overlap in timing, it is possible that before the automatic refresh operation is completed for one of the dies in FIG. 4 of Kojima, the device controller is configured to receive a command regarding to the manual refresh operation and/or the manual refresh scan operation for another of the dies. Regarding dependent claim 62, Kubo implicitly teaches wherein the device controller (FIG. 3: SSD controller 320) is configured to transmit the result of scanning operation to the external device (for management purpose). Response to Arguments Applicant’s arguments with respect to claims 16-24, 26-69, 71-76 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VANTHU NGUYEN whose telephone number is (571)272-1881. The examiner can normally be reached M-F: 7:00AM - 3:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Richard Elms can be reached at (571) 272-1869. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. February 16, 2026 /VANTHU T NGUYEN/Primary Examiner, Art Unit 2824
Read full office action

Prosecution Timeline

Nov 15, 2023
Application Filed
Jan 23, 2024
Response after Non-Final Action
Feb 19, 2025
Non-Final Rejection — §102, §103, §112
Jul 14, 2025
Interview Requested
Aug 11, 2025
Response Filed
Oct 21, 2025
Final Rejection — §102, §103, §112
Dec 23, 2025
Response after Non-Final Action
Jan 23, 2026
Request for Continued Examination
Feb 02, 2026
Response after Non-Final Action
Feb 17, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
89%
With Interview (+6.6%)
2y 4m
Median Time to Grant
High
PTA Risk
Based on 950 resolved cases by this examiner. Grant probability derived from career allow rate.

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