DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I and Species 1 (encompassing claims 1-3, 5-7, 10-12, and 14-16) in the reply filed on 2/3/26 is acknowledged.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) was submitted on 2/3/26. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement has been considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “close” in claims 5 and 14 is a relative term which renders the claim indefinite. The term “close” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Close is defined as “being near in time, space, effort, or degree” (Webster’s Online Dictionary) but how “near” does something have to be to be considered sufficiently “close”? For this reason, the claims are rendered indefinite.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 6-7, 10, and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cao et al. (WO 2021/254150; references to U.S. 371 national stage filing U.S. 2022/0293704 as English translation; “Cao”) in view of Choi (U.S. 2013/0069853 A1).
Regarding claim 1, Cao discloses a display panel comprising:
A substrate (10, Fig. 12) ([0059]);
A thin-film transistor layer (11-18, Fig. 12) disposed on the substrate ([0061]-[0067]);
A planarization layer (21, Fig. 12) ([0068]-[0069]);
A protective layer (22, Fig. 12), disposed on a side of the planarization layer away ([0074]-[0075]); and
An anode (31, Fig. 12), disposed on a side of the protective layer away from the planarization layer ([0078]-[0079]); and
Wherein an orthographic projection of the protective layer (22, Fig. 12) on the thin-film transistor layer at least overlaps a portion of an orthographic projection of the anode (31, Fig. 12) on the thin-film transistor layer (11-18, Fig. 12).
Yet, Cao does not disclose the following:
A display area and a non-display area disposed adjacent to the display area;
A passivation layer disposed on the thin-film transistor layer.
Regarding (a), Choi discloses a display panel comprising a display area (AA, Fig. 1) and a non-display area (NDA, Fig. 1) disposed adjacent to the display area ([0030]). The non-display area has the advantage of providing space to house circuits to apply drive voltages to the display area. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Cao with a display area and a non-display area disposed adjacent to the display area, as taught by Choi, so as to house circuits for the display area in the overall display panel.
Regarding (b), Choi discloses a passivation layer (135, Fig. 11) disposed on a thin-film transistor layer (TFT-1, TFT2, 105, 130) ([0044]). This has the advantage of protecting the underlying thin-film transistor within the thin-film transistor layer. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Cao with a passivation layer disposed on the thin-film transistor layer, as taught by Choi, so as to protect an underlying thin-film transistor.
Regarding claim 6, Cao discloses the protective layer (22, Fig. 12) is made of an inert material and the inert material is a zinc oxide (“indium zinc oxide IZO”; [0074]).
Regarding claim 7, Cao discloses the protective layer (22, Fig. 12) implicitly has a thickness ([0075]) but does not disclose it is between 100 angstroms and 400 angstroms. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a protective layer thickness between 100 angstroms and 400 angstroms, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 10, Cao discloses a display device ([0094]) comprising a display panel comprising:
A substrate (10, Fig. 12) ([0059]);
A thin-film transistor layer (11-18, Fig. 12) disposed on the substrate ([0061]-[0067]);
A planarization layer (21, Fig. 12) ([0068]-[0069]);
A protective layer (22, Fig. 12), disposed on a side of the planarization layer away ([0074]-[0075]); and
An anode (31, Fig. 12), disposed on a side of the protective layer away from the planarization layer ([0078]-[0079]); and
Wherein an orthographic projection of the protective layer (22, Fig. 12) on the thin-film transistor layer at least overlaps a portion of an orthographic projection of the anode (31, Fig. 12) on the thin-film transistor layer (11-18, Fig. 12).
Yet, Cao does not disclose the following:
A display area and a non-display area disposed adjacent to the display area;
A passivation layer disposed on the thin-film transistor layer.
Regarding (a), Choi discloses a display panel comprising a display area (AA, Fig. 1) and a non-display area (NDA, Fig. 1) disposed adjacent to the display area ([0030]). The non-display area has the advantage of providing space to house circuits to apply drive voltages to the display area. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Cao with a display area and a non-display area disposed adjacent to the display area, as taught by Choi, so as to house circuits for the display area in the overall display panel.
Regarding (b), Choi discloses a passivation layer (135, Fig. 11) disposed on a thin-film transistor layer (TFT-1, TFT2, 105, 130) ([0044]). This has the advantage of protecting the underlying thin-film transistor within the thin-film transistor layer. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Cao with a passivation layer disposed on the thin-film transistor layer, as taught by Choi, so as to protect an underlying thin-film transistor.
Regarding claim 15, Cao discloses the protective layer (22, Fig. 12) is made of an inert material and the inert material is a zinc oxide (“indium zinc oxide IZO”; [0074]).
Regarding claim 16, Cao discloses the protective layer (22, Fig. 12) implicitly has a thickness ([0075]) but does not disclose it is between 100 angstroms and 400 angstroms. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a protective layer thickness between 100 angstroms and 400 angstroms, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Allowable Subject Matter
Claims 2-3 and 11-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 2 and 11 contain allowable subject matter because of the limitation the second protective layer is disposed in the non-display area and an orthographic projection of the second protective layer on the thin-film transistor layer covers the wiring portion in combination with the other elements of the claim. Claims 3 and 12 depend on claim 2 and 11, respectively.
Conclusion
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/REEMA PATEL/Primary Examiner, Art Unit 2812 3/19/2026
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