Prosecution Insights
Last updated: July 17, 2026
Application No. 18/509,490

INTEGRATED CIRCUIT PROVIDING GALVANIC ISOLATION AND DEVICE INCLUDING THE SAME

Non-Final OA §112
Filed
Nov 15, 2023
Priority
Nov 18, 2022 — RE 10-2022-0155818
Examiner
DUREN, TIMOTHY EDWARD
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Wellang Co. Ltd.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
37 granted / 47 resolved
+10.7% vs TC avg
Moderate +13% lift
Without
With
+12.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
20 currently pending
Career history
84
Total Applications
across all art units

Statute-Specific Performance

§103
82.6%
+42.6% vs TC avg
§102
7.6%
-32.4% vs TC avg
§112
9.4%
-30.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 47 resolved cases

Office Action

§112
DETAILED ACTION 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . General Remarks 2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection. 3. When responding to this office action, applicants are advised to provide the examiner with paragraph numbers in the application and/or references cited to assist the examiner in locating appropriate paragraphs. 4. Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification. Election/Restrictions 5. Applicant's election with traverse of Species II, Claims 10-20 in the reply filed on 5/19/2026 is acknowledged. The traversal is on the ground(s) that Claims 1-9 are generic claims which also read on Species II (Figures 4C and 6C). This is found persuasive because Claims 1-9 comprises of a second inductor, including the remaining limitations of Claims 10-20. The restriction requirement is now withdrawn. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 6. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The preamble of claims 1 and 10 recites “a device comprising…,” wherein “a device” is considered indefinite given that its scope is not reasonably clear to one of ordinary skill in the art. Applicant is advised to amend the preamble of claims 1 and 10 to recite “a galvanic isolator device” over “a device.” For examination on the merits, the claims will be examined according to the Applicant’s disclosure. The dependent claims necessarily inherit the indefiniteness of the claims on which they depend. Allowable Subject Matter 7. Claims 1 and 10 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Regarding claim 1, the closest prior art Kim, Nam Young et al. (Pub No. KR 20160109682 A) (hereinafter, Kim) in view of Canty, Matthew Thomas et al. (Pub No. US 20230275118 A1) (hereinafter, Canty) either singularly or in combination fails to anticipate or render obvious “A device comprising: a first integrated circuit, wherein the first integrated circuit comprises: a first inductor comprising a first pattern disposed in a first conductive layer; and a first capacitor comprising a first electrode disposed in the first conductive layer and electrically connected to the first inductor and a second electrode disposed in a second conductive layer above the first conductive layer and electrically connected to a first bonding wire,” in combination with all other limitations in the claim(s) as claimed and defined by applicant. Regarding claim 10, the closest prior art Kim, Nam Young et al. (Pub No. KR 20160109682 A) (hereinafter, Kim) in view of Canty, Matthew Thomas et al. (Pub No. US 20230275118 A1) (hereinafter, Canty) either singularly or in combination fails to anticipate or render obvious “A device comprising a first integrated circuit, wherein the first integrated circuit comprises: a first inductor comprising a first pattern disposed in a first conductive layer; a second inductor disposed in a second conductive layer above the first conductive layer and inductively coupled to the first inductor; and a first capacitor comprising a first electrode disposed in the first conductive layer and electrically connected to the first inductor and a second electrode disposed in the second conductive layer and electrically connected to a first bonding wire, wherein the second electrode is insulated from the second inductor,” in combination with all other limitations in the claim(s) as claimed and defined by applicant. In the instant case, re claims 1 and 10, Kim discloses a first inductor and second inductor adjacent to each other, within an electrically conductive layer, however, a first capacitor comprising first and second electrodes is not disposed in the first or second conductive layers which connect to a bonding wire. Further, in order to render Kim in view of Canty obvious, Canty is required to disclose a capacitor with first and second electrodes disposed in the first or second conductive layers which the inductor is embedded in. However, referring to Figs 4A/4B, Canty does not disclose a capacitor disposed near adjacent and/or overlapping coils (inductors). Therefore, the prior art does not render obvious the invention of either claims 1 and 10 because the prior art elements cannot be combined to yield predictable results. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. [1] Spina, Nunzio et al. (Pub No. US20170154727A1) discloses a galvanic isolation system which includes a first isolation barrier and a second isolation barrier. The first isolation barrier includes a transformer. The second isolation barrier includes an inductive circuit connected to a secondary winding of the transformer. The first and the second isolation barriers are coupled to form an LC resonant network. [2] Baumgartner, Peter et al. (Pub No. US20230197615A1) discloses a transformer that includes a first coil, a second coil, and a magnetic core coupled to the two coils. The first coil includes a portion or the whole electrically conductive layers at the backside of a support structure. The second coil includes a portion or the whole electrically conductive layers at either the frontside or the backside of the support structure. The two coils may have a lateral coupling, vertical coupling, or other types of couplings. The transformer is coupled to a semiconductor device over or at least partially in the support structure. The semiconductor device may be at the frontside of the support structure. The transformer can be coupled to the semiconductor device by TSVs. The IC device may also include BPRs that facilitate backside power delivery to the semiconductor device. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIMOTHY EDWARD DUREN whose telephone number is (703)756-1426. The examiner can normally be reached 07:30 - 17:00 PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RATISHA MEHTA/Primary Examiner, Art Unit 2817 /T.E.D./ Examiner Art Unit 2817
Read full office action

Prosecution Timeline

Nov 15, 2023
Application Filed
Jun 30, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
91%
With Interview (+12.6%)
3y 4m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 47 resolved cases by this examiner. Grant probability derived from career allowance rate.

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