Prosecution Insights
Last updated: April 19, 2026
Application No. 18/510,063

SEMICONDUCTOR DEVICE INCLUDING TWO-DIMENSIONAL MATERIAL

Non-Final OA §103
Filed
Nov 15, 2023
Examiner
HAN, JONATHAN
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
93%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
1032 granted / 1240 resolved
+15.2% vs TC avg
Moderate +10% lift
Without
With
+9.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
43 currently pending
Career history
1283
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
52.7%
+12.7% vs TC avg
§102
33.7%
-6.3% vs TC avg
§112
9.3%
-30.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1240 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1, 6-8, and 12-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dimitrakopoulos et al. (U.S. Publication No. 2009/0101892 A1; hereinafter Dimitrakopoulos) in view of Kim (U.S. Publication No. 2018/0129043 A1; hereinafter Kim). With respect to claim 1, Dimitrakopoulos discloses a semiconductor device comprising: a channel layer [16] including a two-dimensional material layer (see Column 3, lines 44-51); a source electrode [20] and a drain electrode [20] spaced apart from each other on the channel layer; a gate electrode [12] on the channel layer; a gate dielectric layer [14] between the channel layer and the gate electrode; a self-assembled monolayer [18] between the channel layer and the gate dielectric, the self-assembled monolayer including self-assembled molecules packed side-by-side (See Figure 3 and ¶[0040]). Dimitrakopoulos fails to disclose a two-dimensional material. In the same field of endeavor, Kim teaches a two-dimensional material [140] utilized as a channel layer (see Figure 1; ¶[0129]). Implementation of a two-dimensional material within a channel structure as taught by Kim allows for a channel structure with higher charge mobility and large Fermi velocity (See Kim ¶[0006]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention With respect to claim 6, the combination of Dimitrakopoulos and Kim discloses wherein each of the self-assembled molecules includes a head group with a non-metal bonded with oxygen included in the gate dielectric layer (See Dimitrakopoulos ¶[0048]). With respect to claim 7. The semiconductor device of claim 1, wherein each of the self-assembled molecules includes a head group, the head group including a polar species (see Dimitrakopoulos ¶[0049]). With respect to claim 8, the combination of Dimitrakopoulos and Kim discloses wherein each of the self-assembled molecules includes a head group, the head group including at least one of a thiol group (—SH), an amino group (—NH2), and a hydroxyl group (—OH) (See Dimitrakopoulos ¶[0049]). With respect to claim 12, the combination of Dimitrakopoulos and Kim discloses wherein a thickness of the gate dielectric layer is greater than or equal to a thickness of the self-assembled monolayer (see Dimitrakopoulos Figure 2). With respect to claim 13, the combination of Dimitrakopoulos and Kim fails to disclose wherein a thickness of the gate dielectric layer is at least about 1 nm and about 20 nm or less, however based on the disclosure, this range appears to be noncritical. It has been held that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Therefore it would have been obvious to one of ordinary skill in the art at the time of invention to determine the proper thickness of the gate dielectric based on routine experimentation to provide proper electrical isolation of the gate structure from the channel to prevent short circuiting. With respect to claim 14, the combination of Dimitrakopoulos and Kim discloses wherein the gate dielectric layer is non-porous (see Dimitrakopoulos ¶[0044]). With respect to claim 15, the combination of Dimitrakopoulos and Kim fails to disclose wherein an equivalent oxide thickness (EOT) of the gate dielectric layer is greater than or equal to 0.9 nm however based on the disclosure, this range appears to be noncritical. It has been held that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention to determine the proper equivalent oxide thickness (EOT) of the gate dielectric layer based on routine experimentation to provide proper electrical isolation of the gate structure from the channel to prevent short circuiting. With respect to claim 16, the combination of Dimitrakopoulos and Kim discloses wherein the gate dielectric layer includes at least one of hafnium (Hf), silicon (Si), aluminum (Al), zirconium (Zr), yttrium (Y), lanthanum (La), gadolinium (Gd), and strontium (Sr) (see Dimitrakopoulos ¶[0044]). With respect to claim 17, the combination of Dimitrakopoulos and Kim discloses wherein the two-dimensional material layer includes a transition metal chalcogenide (TMC) (see Kim ¶[0129-0130]). With respect to claim 18, the combination of Dimitrakopoulos and Kim discloses wherein the TMC includes at least one of molybdenum (Mo), tungsten (W), niobium (Nb), vanadium (V), tantalum (Ta), titanium (Ti), zirconium (Zr), hafnium (Hf), technetium (Tc), and rhenium (Re), and a chalcogen element selected from sulfur (S), selenium (Se), and tellurium (Te) (see Kim ¶[0129-0130]). With respect to claim 19, the combination of Dimitrakopoulos and Kim discloses wherein at least one of the source electrode and the drain electrode includes an oxide having conductive properties (see Kim ¶[0125-0126]). Transparent conductive material as taught by Kim are functionally equivalent to metallic materials utilized within the source/drain electrodes of Dimitrakopoulos (see Kim ¶[0125-0126]). With respect to claim 20, the combination of Dimitrakopoulos and Kim discloses wherein the self-assembled monolayer is further included between the two-dimensional material layer and at least one of the source electrode and the drain electrode (See Dimitrakopoulos Figure 3). Claim(s) 2-3 and 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dimitrakopoulos in view of Kim as applied to claim 1 above, and further in view of Keersmaecker et al. (U.S. Publication No. 2005/0053524 A1; hereinafter Keersmaecker). With respect to claim 2, the combination of Dimitrakopoulos and Kim fails to disclose wherein each of the self-assembled molecules includes an end group covalently bonded with the two-dimensional material layer. In the same field of endeavor, Keersmaecker teaches wherein each of the self-assembled molecules includes an end group covalently bonded with the two-dimensional material layer (See ¶[0083]). Implementation of a covalent bonding of the self-assembled monolayer allows for long-term stability within the device (See ¶[0083]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention With respect to claim 3, the combination of Dimitrakopoulos and Kim fails to disclose wherein each of the self-assembled molecules includes an end group with an oxygen bonded with a non-metal included in the two-dimensional material layer. In the same field of endeavor, Keersmaecker teaches each of the self-assembled molecules includes an end group with an oxygen bonded with a non-metal included in the two-dimensional material layer (See ¶[0083-0084]). Implementation of a bonding of the self-assembled monolayer allows for long-term stability within the device (See ¶[0083-0084]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention With respect to claim 5, the combination of Dimitrakopoulos and Kim fails to disclose wherein each of the self-assembled molecules includes a head group covalently bonded with the gate dielectric layer. In the same field of endeavor, Keersmaecker teaches wherein each of the self-assembled molecules includes a head group covalently bonded with the gate dielectric layer (See ¶[0083-0084]). Implementation of a bonding of the self-assembled monolayer allows for long-term stability within the device (See Keersmaecker ¶[0083-0084]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention Claim(s) 4 and 9-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dimitrakopoulos in view of Kim as applied to claim 1 above, and further in view of Chen et al. (U.S. Publication No. 2017/0346010 A1; hereinafter Chen) With respect to claim 4, the combination of Dimitrakopoulos and Kim fails to disclose wherein each of the self-assembled molecules includes an end group, the end group including at least one of an alkoxy, a halide, an alkyl group, and an alkenyl group. In the same field of endeavor, Chen teaches wherein each of the self-assembled molecules includes an end group, the end group including at least one of an alkoxy, a halide, an alkyl group, and an alkenyl group (see ¶[0029]). Implementation of an alkyl group as taught by Chen allows for the modification of surface properties of the channel structure below (see Chen ¶[0029-0030]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention. With respect to claim 9, the combination of Dimitrakopoulos and Kim fails to disclose wherein an interfacial energy of the self-assembled monolayer is higher than an interfacial energy of the two-dimensional material layer. In the same field of endeavor, Chen teaches modifying the SAM structure resulting an interfacial energy of the self-assembled monolayer is higher than an interfacial energy of the two-dimensional material layer (see ¶[0029]). Implementation of surface modifications based on the SAM chain results allows for absorption into surfaces, improving bonding characteristics between the two-dimensional material layer and the SAM while providing increased non-polarity on the end group to result in increased ordering of the SAM (see ¶[0029]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention With respect to claim 10, the combination of Dimitrakopoulos and Kim fails to disclose wherein a water contact angle of the self-assembled monolayer is less than a water contact angle of the two-dimensional material layer. In the same field of endeavor, Chen teaches a SAM chain with hydrophilic properties (see ¶[0029]). Implementation of a hydrophilic SAM chain results in a low water contact angle and allows for absorption into surfaces, improving bonding characteristics (see ¶[0029]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention With respect to claim 11, the combination of Dimitrakopoulos and Kim fails to disclose wherein a water contact angle of the self-assembled monolayer is less than or equal to 75 degrees. In the same field of endeavor, Chen teaches a SAM chain with hydrophilic properties resulting in a low water contact angle (see ¶[0029]). Implementation of a hydrophilic SAM chain results in a low water contact angle and allows for absorption into surfaces, improving bonding characteristics (see ¶[0029]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN HAN whose telephone number is (571)270-7546. The examiner can normally be reached 9.00-5.00PM PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN LOKE can be reached at 571-272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONATHAN HAN/Primary Examiner, Art Unit 2818
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Prosecution Timeline

Nov 15, 2023
Application Filed
Jan 17, 2026
Non-Final Rejection — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
93%
With Interview (+9.7%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1240 resolved cases by this examiner. Grant probability derived from career allow rate.

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