DETAILED ACTION
This Office action responds to the patent application no. 18/510,596 filed on November 15, 2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to because
the right side of the BSCA 116 is not aligned with other structures in FIG. 1C. The specification does not describe how a portion of the BILS 610 becomes a sidewall between the BSCA 116 and the dielectric spacer 130 and does not describe how a “white” space is between the BSCA 1216 and the STI 126 as shown in FIG. 1C.
The specification does not provide any detailed manufacturing procedures to complete the Block 1460 - Form the Via after all the other Blocks 1410-1450 are processed as shown in FIG. 14. According to FIGs. 2A-2C, the deep via is already formed before the substrate 212A is removed which should be presented by Block 1420.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to under 37 CFR 1.83(a) because they fail to show
“The via 114, which is vertically extended from the top contact 112A to the BM1 134, establishes a connection between the top source/drain region 110A to the BM1 134” as described in the paragraph (¶) [0059] of the specification. The vertical lines of Deep VIA 114 in FIGs. 1C and 13C do NOT reach the top surface of the BM1 134.
For examples, the “gate spacers 244 can function as an insulating layers between the gate regions 230 and the bottom source/drain region 218A and the top source/drain region 218B” and “the gate spacers 244 can help prevent current leakage or short circuits between gate regions 230 and the bottom source/drain region 218A and the top source/drain region 218B” are described in ¶ [0081]. However, FIG. 2A does NOT show the gate spacers 244 insulating/isolating the top source/drain region 218B.
Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
The first metal layer M1 track is labeled as 136 in ¶ [0056], but is changed to 134 in ¶ [0071].
The number 244 is being used as the inner gate spacers and the gate spacers in ¶ [0086]. The same number 244 is referred as “inner spacers 246” in ¶ [0073] and [0079], not as inner gate spacers. The “inner gate spacers 244” also appears in ¶ [0088].
What does “BILD” stand for in ¶ [0095]?
According to FIG. 8A, the upper section 812A has narrower width than the lower section 812B. However, “a lower section 812A with a larger width and an upper section with a smaller width in the X-cross section 812B” is described in ¶ [0099].
The specification does not describe how a portion of the BILS 610 becomes a sidewall between the BSCA 116 and the dielectric spacer 130 and does not describe how a “white” space is between the BSCA 1216 and the STI 126 as shown in FIG. 1C.
The specification does not provide any detailed manufacturing procedures to complete the Block 1460 - Form the Via after all the other Blocks 1410-1450 are processed as shown in FIG. 14. According to FIGs. 2A-2C, the deep via is already formed before the substrate 212A is removed which should be presented by Block 1420.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 6 and 14 recite the limitation "a source/drain region" in line 1. It is unclear how this limitation relates to “a source/drain region” in line 5 of Claim 1 or in line 9 of Claim 8.
Claims 5, 12, 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: How does “a gate region” relate to the top transistor and/or the bottom transistor in Claim 1?
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, and 16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim et al. (Kim hereinafter) (US 2024/0313000).
Regarding Claims 1, 2, and 16:
Kim (see FIG. 2A) teaches {1} A semiconductor device, comprising: a top transistor TR2 stacked over a bottom transistor TR1; a backside contact (262, V41) connected to a source/drain region SD21 of the bottom transistor, wherein the backside contact has a T-shape profile; and a via (232, 222) connecting a source/drain region SD22 of the top transistor to a backside power rail (BPR) 273; {2} the backside contact has the T-shape profile through both a first direction D3 and a second direction D2, wherein the first direction is orthogonal to the second direction; and {16} a semiconductor device, comprising a top transistor TR2 stacked over a bottom transistor TR1, wherein a backside contact (262, V41) is connected to a source/drain region SD21 of the bottom transistor, and wherein the backside contact has a T-shape profile through both a first direction D3 and in a second direction D2, wherein the first direction is orthogonal to the second direction.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-7 and 17-20 are rejected under 35 U.S.C. 102(a)(2) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Kim et al. (Kim hereinafter) (US 2024/0313000).
Regarding Claims 3-7 and 17-20:
Kim does not explicitly depict {3, 17} a dielectric spacer over sidewalls of a vertical section of the backside contact; {4} the dielectric spacer is configured to isolate the backside contact from the BPR; {5, 19} a top portion of the backside contact is isolated from a gate region by a bottom dielectric isolation (BDI); {6} a source/drain region of the top transistor is connected to a back end of line (BEOL) through a first contact; {7} the first contact is in contact with a via; {18} the dielectric spacer isolates the backside contact from the BPR; and {20} the source/drain region of the top transistor is connected to a back end of line (BEOL) through a first contact, and wherein the first contact is in contact with the via.
Kim (see ¶ [0036], [0043], [0047], [0063]) teaches “a plurality of interconnects, also referred to as back-end-of-line (BEOL) structures … the interconnects may include 6 1st frontside metal lines M11-M16 … three 2nd frontside metal lines M21-M23, 3rd metal line M3”; “the source/drain SD3 of the 2nd PMOS P2 and the source/drain SD6 of the 2nd NMOS N2 may output respective output signals to the 1st frontside metal lines M15 and M16 through one or more contact structures and/or vias, respectively”; “a backside via … between the backside contact structure 162 and the 4th source/drain region s SD4”; “the backside power rails 271-277 and the backside contact structures 261-263 may be buried in a substrate or backside isolation structure”.
It would have been obvious to a person of ordinarily skilled in the art before the effective filing date of the instant invention to anticipate the teaching of Kim to isolate the backside contacts from the backside power rails and from the gate region of the above transistors and to connect a source/drain region of the top transistor to a back-end-of-line through a contact and a via to meet circuit design requirements.
Allowable Subject Matter
Claims 8-11, and 13 are allowed.
Claims 12 and 14 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claim 8: The prior art of record neither anticipates nor renders obvious a method of forming a semiconductor device, wherein removing a substrate below the bottom transistor, depositing additional sacrificial placeholder material to increase the dimensions of the sacrificial placeholder in a first direction. These features in combination with other elements in the claim are neither disclosed nor suggested by the prior art of record.
Claims 9-15 depend on Claim 8 so they are allowable for the same reson.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Correspondence
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALICE W TANG whose telephone number is (571)272-7227. The examiner can normally be reached Monday-Friday: 8:30 am to 5 pm..
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached at (571)272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ALICE W TANG/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814