DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Claims 1 and 16 stand rejected under Section 102. Claims 2 and 3 stand rejected under Section 103. Claims 13 and 15 stand rejected under Section 112(b). Claims 13 and 15 stand objected to. The specification stands objected to. Claims 4-12, 14, and 17-20 stand objected to for depending from a rejected base claim, but have been indicated as having allowable subject matter if placed in independent form, with claims 13 and 15 being allowable if placed in independent form, and if the informalities and Section 112(b) rejections were addressed.
Applicants amended claims 1, 13, 15, and 16, and provided amendments to the specification. Applicants argue that the application is in condition for allowance.
Turning first to the specification: Applicants’ amendments to the specification address the previously noted specification objections and are accepted and entered. No new matter has been added. The previously noted specification objections are withdrawn.
Claim objections: Applicants’ amendments address the previously noted claim objections and are accepted and entered. No new matter has been added. The previously noted claim objections are withdrawn.
Section 112(b) rejections: Applicants’ amendments address the previously noted Section 112(b) rejections and are accepted and entered. No new matter has been added. The previously noted Section 112(b) rejections are withdrawn.
Section 102 rejections: Applicants’ amendments to claims 1 and 16 overcome the previously noted Section 102 rejections. These rejections are withdrawn. However, another reference anticipates certain claims, as noted below.
Section 103 rejections: Applicants’ amendments to the claims overcome the previously noted Section 103 rejections. These rejections are withdrawn. However, another reference renders obvious certain claims, as noted below.
Claim Objections
Claims 4-15 and 17-20 are objected to because of the following informalities:
Claim 4, last line: Change “accommodate” to “accommodating”.
Claims 5-15 are objected to for depending from objected-to base claim 4.
Claim 17, line 6: Change “accommodate” to “accommodating”.
Claims 18-20 are objected to for depending from objected-to base claim 17.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3 and 16 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipates by or, in the alternative, under 35 U.S.C. 103 as obvious over Hwang, U.S. Pat. Pub. No. 2018/0350747, Figures 12 and 9-11.
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Regarding claim 1: Hwang Figure 12, which incorporates by reference, Hwang Figures 9-11, see Hwang specification ¶ 116, discloses a semiconductor package assembly (300B), comprising: a base (200B) having a top surface and a bottom surface; a semiconductor package (100B) disposed on the top surface of the base (200B); and a capacitor (225) disposed on the semiconductor package (100B) and located between the semiconductor package (100B) and the base (200B), wherein the capacitor (225) has a back surface located away from the semiconductor package (100B), wherein the back surface of the capacitor (225) is higher than the bottom surface of the base (200B) and lower than the top surface of the base (200B), and wherein the capacitor (225) has a side surface directly connected to the back surface and exposed from the base (200B). Hwang specification ¶¶ 115, 116; 59-114. To the extent that Hwang Figure 12 does not incorporate by reference Hwang Figures 9-11, one having ordinary skill in the art at a time before the effective filing date would be motivated to refer to Hwang Figures 9-11 for missing details in the description of Hwang Figure 12 because Hwang Figure 12 and Hwang Figures 9-11 are fan-out packages.
Regarding claim 2, which depends from claim 1: Hwang discloses first contact pads (160, at the edge of the package) and second contact pads (160, in the center) disposed on the semiconductor package (100B) and close to the base (200B); and conductive structures (170) disposed on the first contact pads (160, at the edge of the package) and electrically connected between the semiconductor package (100B) and the base (200B), wherein the capacitor (225) is disposed on the second contact pads (160, in the center) and surrounded by the conductive structures (170). Id.
Regarding claim 3, which depends from claim 2: Hwang discloses a first height of the capacitor (225) is greater than a second height of the conductive structures (170). See Hwang Figure 12.
Regarding claim 16: Hwang Figure 12, which incorporates by reference, Hwang Figures 9-11, see Hwang specification ¶ 116, discloses a semiconductor package assembly (300B), comprising: a base (200B) having a top surface; a semiconductor package (100B) disposed on the top surface of the base (200B) by conductive structures (170), wherein the conductive structures (170) are connected between the top surface of the base (200B) and the semiconductor package (100B); and a capacitor (225) disposed on the semiconductor package (100B) and surrounded by the conductive structures (170), wherein the capacitor (225) partially overlaps the base (200B) in a direction substantially parallel with the top surface of the base (200B), and wherein the capacitor (225) has a back surface located away from the semiconductor package (100B) and a side surface directly connected to the back surface and exposed from the base (200B). Hwang specification ¶¶ 115, 116; 59-114. To the extent that Hwang Figure 12 does not incorporate by reference Hwang Figures 9-11, one having ordinary skill in the art at a time before the effective filing date would be motivated to refer to Hwang Figures 9-11 for missing details in the description of Hwang Figure 12 because Hwang Figure 12 and Hwang Figures 9-11 are fan-out packages.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang, and further in view of Chiu, U.S. Pat. Pub. No. 2016/0071780, Figure 1.
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Regarding claim 4, which depends from claim 1: Hwang discloses that the base comprises: a build-up layer structure (211) having a top surface close to the semiconductor package (200B); and a first conductive layer (212b) disposed on the top surface of the build-up layer structure (211), a first insulating layer (241) disposed on the first conductive layer (212b), wherein the top surface of the base (200B) is a top surface of the first insulating layer (241), and wherein the first insulating layer (241) has a first opening (240H) for accommodat[ing] at least a portion of the capacitor (225). Hwang specification ¶¶ 115, 116; 59-114. Hwang does not disclose that the first insulating layer (241) is a first solder mask layer.
Chiu Figure 1, directed to similar subject matter, discloses a base (1) that comprises: a build-up layer structure (130); and a first conductive layer (132) disposed on the top surface of the build-up layer structure (130), a first solder mask layer (16) disposed on the first conductive layer (132), wherein the top surface of the base (1) is a top surface of the first solder mask layer (16). Chiu specification ¶¶ 5-7. One having ordinary skill in the art at a time before the effective filing date would be motivated to modify Hwang to use the Chiu first solder mask layer (16) in place of the Hwang first insulating layer (241) because the modification would have involved the substitution of an equivalent known for the same purpose.
Regarding claim 17, which depends from claim 16: Hwang discloses that the base comprises: a build-up layer structure (211) having a top surface close to the semiconductor package (200B); and a first conductive layer (212b) disposed on the top surface of the build-up layer structure (211), a first insulating layer (241) disposed on the first conductive layer (212b); wherein the first insulating layer (241) has a first opening (240H) for accommodat[ing] at least a portion of the capacitor (225), and wherein the capacitor (225) partially overlaps the first insulating layer (241) of the base (200B) in the direction substantially parallel with the top surface of the base (200B). Hwang specification ¶¶ 115, 116; 59-114. Hwang does not disclose that the first insulating layer (241) is a first solder mask layer.
Chiu Figure 1, directed to similar subject matter, discloses a base (1) that comprises: a build-up layer structure (130); and a first conductive layer (132) disposed on the top surface of the build-up layer structure (130), a first solder mask layer (16) disposed on the first conductive layer (132). Chiu specification ¶¶ 5-7. One having ordinary skill in the art at a time before the effective filing date would be motivated to modify Hwang to use the Chiu first solder mask layer (16) in place of the Hwang first insulating layer (241) because the modification would have involved the substitution of an equivalent known for the same purpose.
Allowable Subject Matter
Claims 5-15 and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and if the informalities in claims 4 and 17 are addressed.
The following is a statement of reasons for the indication of allowable subject matter:
With regard to claim 5: The claim has been found allowable because the prior art of record does not disclose “wherein the first conductive layer has a second opening aligned to the first opening, and wherein the at least a portion of the capacitor further extends to the second opening”, in combination with the remaining limitations of the claim.
With regard to claims 6, 7, and 9-15: The claims have been found allowable due to their dependency from claim 5 above.
With regard to claim 8: The claim has been found allowable because the prior art of record does not disclose “wherein the back surface of the capacitor is higher than a top surface of the first conductive layer and lower than the top surface of the first solder mask layer”, in combination with the remaining limitations of the claim.
With regard to claim 18: The claim has been found allowable because the prior art of record does not disclose “wherein the first conductive layer has a second opening aligned to the first opening, wherein the capacitor partially overlaps the first solder mask layer and the first conductive layer of the base in the direction”, in combination with the remaining limitations of the claim.
With regard to claims 19 and 20: The claims have been found allowable due to their dependency from claim 18 above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTORIA KATHLEEN HALL whose telephone number is (571)270-7567. The examiner can normally be reached Monday-Friday, 8 a.m.-5 p.m.
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/Victoria K. Hall/Primary Examiner, Art Unit 2897
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