DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species A (Fig. 3A and 3B; Claims 1-15) in the reply filed on 04/16/2026 is acknowledged. The traversal is on the ground(s) that. This is not found persuasive because it should be no undue burden on the Examiner to consider all claims in the single application. Moreover, because at least generic claim 1 should be in condition for allowance.
The Examiner notes that there is a search and/or examination burden for the patentably distinct species as set forth above because at least the following reason(s) apply:
the species require a different field of search (e.g., searching different classes/subclasses or electronic resources, or employing different search queries)
the prior art applicable to one species would not likely be applicable to the other species.
The requirement is still deemed proper and is therefore made FINAL.
Claim 16-20 withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Invention II, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 04/16/2026.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites “the first pattern is substantially rectangular and the third pattern has a third rounded corner, and the first pattern has several diagonals not overlapping with the third pattern”
The Examiner notes the term rectangular or “substantially rectangular” geometrically possesses exactly two diagonals. The use of indefinite plural descriptor “several” implies a variable count greater that two, which directly contradicts the geometry of a rectangle. Therefore, the limitation “several diagonals” is indefinite.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 5-9, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh et al. (US 2022/0302346 A1).
Regarding Claim 1, Hsieh (Fig. 2A, 2B) discloses an optoelectronic semiconductor element, comprising:
a semiconductor stack (102) comprising a first portion (104) and a second portion (110, 108, 106) on the first portion (104), and the second portion comprising an active region (108); and
a first metal layer (114)) located on the first portion and electrically connected to the first portion (104); wherein,
from a top view (2A) of the optoelectronic semiconductor element, the first portion (104) has a first pattern (pattern of 104), the second portion has a second pattern (pattern of 110, 108, 106), and the first metal layer has a third pattern (pattern 114), wherein
a first area ratio of the third pattern (an area of pattern 114) to the first pattern (pattern of 104). (See Fig. 104)
Hsieh does not explicitly disclose ratio of 0.5% to 10%.
However, Hsieh discloses varying area for semiconductor device to achieve ratio of the length to the width of the semiconductor device in a range of 0.3 to 1. [0024].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify length and width to achieve ratio of 0.5% to 10% since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern” “a first pattern”. the Examiner selected “a first area” to satisfy limitation a first area ratio of the third pattern to the first pattern is from 0.5% to 10%.
Regarding Claim 2, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 1, wherein
the first pattern (pattern of 104) has a first rounded corner with a first curvature radius R1, and the second pattern (pattern of 110, 108, 106) has a second rounded corner with a second curvature radius R2, and R1≥R2. (See Fig. 2A)
Regarding Claim 3, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 2, wherein
the third pattern (114) has a third rounded corner with a third curvature radius R3, and R1≥R3. (See Fig. 2A)
Regarding Claim 5, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 1, wherein
the first pattern (104) is substantially rectangular and the third pattern (114) has a third rounded corner, and the first pattern (104) has several diagonals not overlapping with the third pattern (114). (Fig. 2A)
Regarding Claim 6, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 1, further comprising:
a second metal layer (116) located on the second portion (110, 108, 106) and electrically connected to the second portion (110, 108, 106), wherein
the first metal layer (114) and the second metal layer (116) are on the same side of the semiconductor stack (top).
Regarding Claim 7, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 6, further comprising:
a first electrode (120) electrically connected to the first metal layer (114); and
a second electrode (122) electrically connected to the second metal layer (116); wherein
the first electrode has a first top surface (top of 120) and the second electrode has a second top surface (top of 122), and the first top surface and the second top surface have the same elevation. (See Fig. 2B).
Regarding Claim 8, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 1, wherein
the optoelectronic semiconductor element comprises a device width W (W2), and a second shortest distance W2 is between the first pattern (104) and the second pattern, (110, 108, 106).
Hsieh does not explicitly disclose W/W2 is 3-80.
However, Hsieh discloses varying area for semiconductor device to achieve ratio of the length to the width of the semiconductor device in a range of 0.3 to 1. [0024].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify length and width to W/W2 is 3-80 since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern” “a first pattern”. the Examiner selected “a first area” to satisfy limitation W/W2 is 3-80.
Regarding Claim 9, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 8.
Hsieh does not explicitly disclose W/W2 is 15-30.
However, Hsieh discloses varying area for semiconductor device to achieve ratio of the length to the width of the semiconductor device in a range of 0.3 to 1. [0024].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify length and width to W/W2 is 3-80 since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern”, “a first pattern”. the Examiner selected “a first area” to satisfy limitation W/W2 is 15-30.
Regarding Claim 12, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 1, wherein
the optoelectronic semiconductor element comprises a device width W (W2), and a fourth shortest distance W4 is between the first pattern (pattern 104) and the third pattern (pattern 114).
Hsieh does not explicitly disclose W/W4 is 2.5-30.
However, Hsieh discloses varying area for semiconductor device to achieve ratio of the length to the width of the semiconductor device in a range of 0.3 to 1. [0024].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify length and width to achieve W/W4 is 2.5-30 since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern” “a first pattern”. the Examiner selected “a first area” to satisfy limitation W/W4 is 2.5-30.
Claim(s) 10, 11 and 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh et al. (US 2022/0302346 A1) in view of Chen et al. (US 2021/0305456 A1).
Regarding Claim 10, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 8, wherein
the second shortest distance W2 is 0.2 μm-5 μm.
Hsieh does not explicitly disclose W2 is 0.2 μm-5 μm.
Chen (Fig. 1B) discloses W2 is 0.2 μm-5 μm. [d1, 0018]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the optoelectronic semiconductor element in Hsieh in view of Chen the second shortest distance W2 is 0.2 μm-5 μm in order to prevent occurrence of short circuit [0018] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern”, “a first pattern”. the Examiner selected “a first portion” and “a second portion”, “a third pattern” to satisfy limitation.
Regarding Claim 11, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 8, wherein
a third shortest distance W3 is between the second pattern (pattern 110, 108, 106) and the third pattern (pattern 114), and W3≥W2.
Hsieh does not explicitly disclose W3≥W2.
Chen (Fig. 1B, 5b-5d) discloses optimizing W2 [d1, 0018].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the optoelectronic semiconductor element in Hsieh in view of Chen and optimize W2 such that W3≥W2 in order to prevent occurrence of short circuit [0018] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern”, “a first pattern”. the Examiner selected “a first portion” and “a second portion”, “a third pattern” to satisfy limitation.
Regarding Claim 13, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 12, wherein
a second shortest distance W2 is between the first pattern (pattern of 104) and the second pattern (pattern of 110, 108, 106),
Hsieh does not explicitly disclose W4≥W2.
Chen (Fig. 1B, 5b-5d) discloses optimizing W2 [d1, 0018].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the optoelectronic semiconductor element in Hsieh in view of Chen and optimize W2 such that W4≥W2 in order to prevent occurrence of short circuit [0018] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern”, “a first pattern”. the Examiner selected “a first portion” and “a second portion”, “a third pattern” to satisfy limitation.
Regarding Claim 14, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 12, wherein
Hsieh does not explicitly disclose the fourth shortest distance W4 is 0.5 μm-6 μm.
Hsieh does not explicitly disclose W4 is 0.5 μm-6 μm.
Chen (Fig. 1B, 5A-5D) discloses W4 is 0.5 μm-6 μm. [d1, 0018]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the optoelectronic semiconductor element in Hsieh in view of Chen such that W4 is 0.5 μm-6 μm in order to prevent occurrence of short circuit [0018] and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern”, “a first pattern”. the Examiner selected “a first portion” and “a second portion”, “a third pattern” to satisfy limitation.
Regarding Claim 15, Hsieh (Fig. 2A, 2B) discloses the optoelectronic semiconductor element as claimed in claim 1, wherein
the optoelectronic semiconductor element comprises a device width W, and the third pattern (pattern 114) comprises a fifth width W5.
Hsieh does not explicitly disclose W/W5 is 1.1-10.
However, Hsieh discloses varying area for semiconductor device to achieve ratio of the length to the width of the semiconductor device in a range of 0.3 to 1. [0024].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify length and width to achieve W/W4 is 2.5-30 since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 276 (CCPA 1980).
The Examiner notes that since the Applicant did explicitly specified metes and bounds for “a first area”, “a first portion” and “a second portion”, “a third pattern” and “a first pattern”. the Examiner selected third pattern to satisfy limitation W/W5 is 1.1-10.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRIY YEMELYANOV whose telephone number is (571)270-7920. The examiner can normally be reached M-F 9a.m.-6p.m.
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/DMITRIY YEMELYANOV/Examiner, Art Unit 2891
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