Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 1-15 and 19 withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 1/7/2025.
After reviewing Applicant’s arguments, it is determined that the inventions mentioned in Restriction Requirement, filed 1/7/2026, should be examined separately for reasons outlined in Restriction Requirement, filed 1/7/2026, namely distinctness of inventions (as exemplified in independent claims 1 and 16), as well as undue search burden that would be endured if both inventions were examined together (claims 1 and 16 being classified separately, as shown in Restriction Requirement, filed 1/7/2026).
For at least this reason, elected claims 16-18 will be examined and claims 1-15 and 19 will be withdrawn.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 16 recites the limitation "the liner oxide layer". There is insufficient antecedent basis for this limitation in the claim.
Claim 16 recites the limitation "the gate oxide layer". There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 16-18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Bobde (20230238440) .
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Regarding claim 16, Bobde teaches a trench-gate semiconductor device (please see figure above) comprising
a trench (please see fig. 5J which shows the totality of the two trenches) that when seen in a vertical direction from a top layer side towards a bottom layer side of a single epitaxial (EPI) layer (502; par. 26 teaches 502 being an epi layer),
is divided into a first trench (please see top trench in fig. 5J) having a depth formed from the top layer side towards a first trench bottom and a second trench (please see bottom trench in fig. 5J) having a depth formed from the first trench bottom towards the bottom layer side (please see above),
further comprising a source poly (105; par. 20 teaches 105 is coupled to the source voltage and is made of poly) arranged in the second trench and a gate poly (106; par. 19 teaches a gate made of poly) arranged in the first trench and separated from the source poly by a inter poly oxide layer,
wherein the second trench has a width that is larger than the width of the first trench (please see trench widths in fig. 5J) and the depth of the second trench is larger than the depth of the first trench (par. 33 teaches widening and deepening the bottom trench seen in 5J, when compared to the top trench) and the liner oxide layer (please see 112 rejection above) is thicker than the gate oxide layer (please see 112 rejection above).
Regarding claim 17, Bobde teaches a trench-gate semiconductor device according to claim 16, wherein the first trench width to the second trench width ratio is in a range from 1:1.7 to 1:2 (par. 28, 30 and 33).
Regarding claim 18, Bobde teaches a trench-gate semiconductor device according to claim 16, wherein 18. source poly width to gate poly width ratio is in a range from 0.7:1 to 1.2:1 (par. 28, 30 and 33).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri.
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/CALEB E HENRY/Primary Examiner, Art Unit 2818