Prosecution Insights
Last updated: October 02, 2026
Application No. 18/511,581

HgZnTe DETECTOR ON SILICON SUBSTRATE

Non-Final OA §102§103
Filed
Nov 16, 2023
Priority
Nov 17, 2022 — provisional 63/384,132
Examiner
HOQUE, MOHAMMAD M
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
RAYTHEON Company
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
650 granted / 763 resolved
+17.2% vs TC avg
Moderate +10% lift
Without
With
+9.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
30 currently pending
Career history
789
Total Applications
across all art units

Statute-Specific Performance

§103
55.9%
+15.9% vs TC avg
§102
25.8%
-14.2% vs TC avg
§112
16.7%
-23.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 763 resolved cases

Office Action

§102 §103
DETAILED ACTION Examiner’s Note The prior arts cited in PTO-892 but not used in the current rejection are related to the claimed novelty. Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182. Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Election/Restrictions Applicant’s election with traverse of Invention I (semiconductor device), reflected in claims 1-12 in the reply filed on 06/03/2026 is acknowledged. Claims 13-20 are withdrawn from further consideration pursuant to 37 CFR 1.142 (b), as being drawn to the nonelected group. Applicant's election with traversal is on the ground(s) that ‘search and examination of all claims can be made without serious burden to the Examine’. This is not found persuasive because this application includes two inventions requiring a different field of search (different CPC groups as described in the restriction requirement). The requirement is still deemed proper and is therefore made FINAL. Drawings Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 5-6 and 11-12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by de Lyon (US 5399206 A). Regarding independent claim 1, de Lyon teaches, “A detector assembly (‘infrared photovoltaic detector’, fig. 1-2, see related description), comprising: a silicon substrate (12, ‘silicon substrate’, fig. 2, column 3, lines 63-64); a HgZnTe-based buffer layer (18, ‘II-VI buffer layer’, ‘HgZnTe’, column 4, lines 51-60) grown on the silicon substrate (12); and a HgZnTe detector (16, ‘HgZnTe’, column 4, lines 32-39) grown on the HgZnTe-based buffer layer (18)”. Regarding claim 5, de Lyon further teaches, “The detector assembly according to claim 1, wherein any one of the HgZnTe-based buffer layer, the HgZnTe detector and the passivation layer are grown using molecular-beam epitaxy (column 4, lines 24-27)”. Regarding claim 6, de Lyon further teaches, “The detector assembly according to claim 1, wherein the HgZnTe-based buffer layer includes a strained layer superlattice of HgZnTe (column 4, lines 51-60)”. Regarding claim 11, de Lyon further teaches, “The detector assembly according to claim 1, wherein the HgZnTe-based buffer layer includes a superlattice of at least one HgZnTe superlattice layer and at least one HgCdTe superlattice layer (column 4, lines 51-60)”. Regarding claim 12, de Lyon further teaches, “The detector assembly according to claim 11, wherein the HgZnTe-based buffer layer includes a superlattice of a plurality of HgZnTe superlattice layers respectively alternating with a plurality of HgCdTe superlattice layers (column 4, lines 51-60)”. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 2-4 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over de Lyon as applied to claim 1 above, and further in view of Rajavel et al. (US 5742089 A, hereinafter Rajavel’089). Regarding claim 2, Rajavel’089 teaches all the limitations described in claim 1. But de Lyon is silent upon the provision of wherein the silicon substrate includes a silicon layer, a ZnTe layer and a CdTe layer. However, Rajavel’089 teaches a similar detector assembly (fig. 1), wherein passivation layer 16 and initiation layer 18 are placed between silicon substrate (14) and buffer layer (20). The passivation layer (16) and the initiation layer (18) are made of II-VI compounds e.g., ZnTe, CdTe (see column 3, lines 64-67 and column 4, lines 1-24). de Lyon and Rajavel’089 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify de Lyon with the features of Rajavel’089 because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of de Lyon and Rajavel’089 to include passivation layers between Si substrate and the buffer layer according to the teachings of Rajavel’089 with a motivation of passivating the Si substrate and facilitates the epitaxial deposition of the layers above in the stack. See Rajavel’089, column 3, lines 64-67. Regarding claim 3, de Lyon modified with Rajavel’089 further teaches, “The detector assembly according to claim 1, further comprising a passivation layer (16, 18, fig. 1)”. Regarding claim 4, de Lyon modified with Rajavel’089 further teaches, “The detector assembly according to claim 3, wherein the passivation layer (16, 18) includes ZnTe”. Regarding claim 11, de Lyon modified with Rajavel’089 further teaches, “The detector assembly according to claim 1, wherein the HgZnTe-based buffer layer includes a superlattice of at least one HgZnTe superlattice layer and at least one HgCdTe superlattice layer (Rajavel’089, column 3, lines 4-9)”. Claims 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over de Lyon as applied to claim 1 above, and further in view of Mitra Prodip (GB 2326762 A, hereinafter Mitra’762). Regarding claim 7, de Lyon teaches all the limitations described in claim 1. But de Lyon is silent upon the provision of wherein the HgZnTe-based buffer layer includes a strained layer superlattice of at least one short-wave HgZnTe superlattice layer and at least one short-medium wave HgZnTe superlattice layer. However, Mitra’762 teaches a similar Infrared Detector (see title) wherein the HgZnTe-based buffer layer includes a strained layer superlattice of at least one short-wave HgZnTe superlattice layer and at least one short-medium wave HgZnTe superlattice layer (see claim 7, ‘mercury cadmium zinc telluride’, ‘short wave’, ‘medium wave’, ‘long wave’ etc.). de Lyon and Mitra’762 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify de Lyon with the features of Mitra’762 because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of de Lyon and Mitra’762 to form the detector functioning of multiple bands of infrared radiation according to the teachings of Mitra’762 with a general motivation of supporting of wide range of signal detection. Regarding claim 8, de Lyon modified with Mitra’762 further teaches, “The detector assembly according to claim 7, wherein the HgZnTe-based buffer layer includes a strained layer superlattice of a plurality of short-wave HgZnTe superlattice layers respectively alternating with a plurality of short-medium wave HgZnTe superlattice layers (see claim 7, ‘mercury cadmium zinc telluride’, ‘short wave’, ‘medium wave’, ‘long wave’ etc.)”. Regarding claim 9, de Lyon modified with Mitra’762 further teaches, “The detector assembly according to claim 1, wherein the HgZnTe-based buffer layer includes a strained layer superlattice of at least one short-wave HgZnTe superlattice layer and at least one medium-wave HgZnTe superlattice layer (see claim 7, ‘mercury cadmium zinc telluride’, ‘short wave’, ‘medium wave’, ‘long wave’ etc.)”. Regarding claim 10, de Lyon modified with Mitra’762 further teaches, “The detector 10. The detector assembly according to claim 9, wherein the HgZnTe-based buffer layer includes a strained layer superlattice of a plurality of short-wave HgZnTe superlattice layers respectively alternating with a plurality of medium-wave HgZnTe superlattice layers (see claim 7, ‘mercury cadmium zinc telluride’, ‘short wave’, ‘medium wave’, ‘long wave’ etc.)”. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached on (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Nov 16, 2023
Application Filed
Aug 11, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
95%
With Interview (+9.5%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 763 resolved cases by this examiner. Grant probability derived from career allowance rate.

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