DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Status
Previous action: 1m 3 through 11 and 13 through 20 rejected, claims 2 and 12 objected.
Present action: Claims 1, 3 through 11 and 13 through 20 rejected, claim 12 objected
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized and struck through claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s).
Claim(s) 1, 3, and 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chuang (US 2020/0357955) in view of Weng (US 2013/0049050).
Regarding claim 1.
Chuang teaches:
a micro light-emitting chip structure (fig 1b:1; [para 0042]), comprising: a first-type semiconductor layer (fig 1b:38; [para 0044]);
a light-emitting layer (fib 1b:36; [para 0044]) disposed on the first-type semiconductor layer (fig 1b:38; [para 044]);
a second-type semiconductor layer (fig 1b:34; [para 0044]) disposed on one side of the light-emitting layer (fig 1b:36; [para 0044]) that is opposite the first-type semiconductor layer (fig 1b:38; [para 0044]), wherein the second-type semiconductor layer (fig 1b:36; [para 0044]) has a peripheral surface and an end surface that is connected to the peripheral surface (fig 1b annotated);
a first insulating layer (fig 1a:40; [para 0047]) covering at least the peripheral surface and the end surface;
a reflective layer (fig 1a:44; [para 0047]) disposed on the first insulating layer (fig 1b:40; [para 0047]) and covering at least the peripheral surface and the end surface;
a second insulating layer (fig 1a:42; [para 0047]) disposed on the reflective layer (fig 1a:44; [para 0047]) and covering at least the peripheral surface and the end surface;
and an electrode (fig 1b:14,20; [para 0055]) disposed on the end surface and connected to the second-type semiconductor layer (fig 1b:34; [para 0055]), wherein a gap is formed between the electrode (fig 1b:14,20; [para 0055]) and the reflective layer (fig 1b:44; [para 0047]), so as to electrically insulate the electrode (fig 1b:14,20; [para 0055]) from the reflective layer (fig 1b:44; [para 0047]).
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Chuang does not teach the gap comprises an air gap.
Weng teaches:
A micro light-emitting chip structure (fig 2:10a[0044]), comprising:
wherein a gap (fig 2:191[0044]) is formed between the electrode (fig 2:15[0048]) and the reflective layer (fig 2:19[0053]), so as to electrically insulate the electrode (fig 2:15[0048]) from the reflective layer (fig 2:19[0053]), and the gap is an air gap (fig 2:191[0044])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make the gap an air gap in order to decrease the dielectric constant of the material
Regarding claim 3.
Chuang in view of Weng teaches the micro light-emitting chip structure (fig 1b:1; [para 0042]) as claimed in claim 1,
Chuang teaches:
wherein the ratio of a shortest distance between the electrode (fig 1b:14,20; [para 0055]) and the reflective layer (fig 1b:44; [para 0055]) in the gap to a thickness of the reflective layer (fig 1b:44; [para 0055]) in a thickness direction perpendicular to the end surface is greater than or equal to 1.
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Regarding claim 4
Chuang in view of Weng teaches the micro light-emitting chip structure (fig 1b:1; [para 0042]) as claimed in claim 3,
Chuang teaches:
the ratio of the shortest distance between the electrode (fig 1b:14,20; [para 0055]) and the reflective layer (fig 1b:44; [para 0055]) in the gap to the thickness of the reflective layer (fig 1b:44; [para 0055]) in the thickness direction perpendicular to the end surface is less than 7.
Claim(s) 1, 5, 6, 7, 8, 9, 10, 11, 13, and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Saito (US 2016/0358972) in view of Weng (US 2013/0049050).
Regarding claim 1.
Saito teaches:
a micro light-emitting chip structure (fig 3:1; [para 0071]), comprising: a first-type semiconductor layer (fig 3:221; [para 0091]);
a light-emitting layer (fig 3:23; [para 0091]) disposed on the first-type semiconductor layer (fig 3:221; [para 0091]);
a second-type semiconductor layer (fig 3:212; [para 0089]) disposed on one side of the light-emitting layer (fig 3:23; [para 0091]) that is opposite the first-type semiconductor layer (fig 3:221; [para 0091]), wherein the second-type semiconductor layer (fig 3:212; [para 0089]) has a peripheral surface and an end surface that is connected to the peripheral surface; a first insulating layer (fig 3:51; [para 0102]) covering at least the peripheral surface and the end surface;
a reflective layer (fig 3:53; [para 0102]) disposed on the first insulating layer (fig 3:51; [para 0102]) and covering at least the peripheral surface and the end surface;
a second insulating layer (fig 3:52; [para 0103])
disposed on the reflective layer (fig 3:53; [para 0102]) and covering at least the peripheral surface and the end surface;
and an electrode (fig 3:720,730; [para 0102])
disposed on the end surface and connected to the second-type semiconductor layer (fig 3:212; [para 0089]), wherein a gap is formed between the electrode (fig 3:720,730; [para 0102]) and the reflective layer (fig 3:53; [para 0102]), so as to electrically insulate the electrode (fig 3:720,730; [para 0102]) from the reflective layer (fig 3:53; [para 0102]), .
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Saito does not teach an air gap
Weng teaches:
A micro light-emitting chip structure (fig 2:10a[0044]), comprising:
wherein a gap (fig 2:191[0044]) is formed between the electrode (fig 2:15[0048]) and the reflective layer (fig 2:19[0053]), so as to electrically insulate the electrode (fig 2:15[0048]) from the reflective layer (fig 2:19[0053]), and the gap is an air gap (fig 2:191[0044])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make the gap an air gap in order to decrease the dielectric constant of the material
Regarding claim 5
Saito teaches in view of Weng teaches the micro light-emitting chip structure as claimed in claim 1,
Saito teaches:
the ratio of an area of an orthogonal projection of the reflective layer (fig 3:53; [para 0102]) to an area of an orthogonal projection of the first-type semiconductor layer (fig 3:51; [para 0103]) on a reference plane parallel to the light-emitting layer (fig 3:23[90]) is between 0.6 and 0.85.
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Further, given the teaching of the references, it would have been obvious to determine the optimum ratio of the layers involved. See In re Aller, Lacey and Hall (10 USPQ 233-237) It is not inventive to discover optimum or workable ranges by routine experimentation. Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff, 919 f.2d 1575,1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 6.
Saito in view of Weng teaches the micro light-emitting chip structure (fig 3:1; [para 0071]) as claimed in claim 1,
Saito teaches:
wherein the electrode (fig 3:720,730; [para 0102]) comprises: an electrode pillar (fig 3:733; [para 0102]) connected to the second-type semiconductor layer (fig 3:212; [para 0089]);
and an electrode pad connected to the electrode pillar (fig 3:733; [para 0102]) and disposed on the second insulating layer (fig 3:52; [para 0102]).
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Regarding claim 7.
Saito in view of Weng teaches the micro light-emitting chip structure (fig 3:1; [para 0071]) as claimed in claim 6,
Saito teaches:
wherein an orthogonal projection of the electrode pad covers an orthogonal projection of the gap on a reference plane parallel to the light-emitting layer (fig 3:23; [para 0088]).
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Regarding claim 8.
Saito in view of Weng teaches the micro light-emitting chip structure (fig 3:1; [para 0071]) as claimed in claim 6,
Saito teaches:
in a cross-sectional view, the electrode pillar (fig 3:733; [para 0111]) has a variable width.
Regarding claim 9.
Saito in view of Weng teaches the micro light-emitting chip structure (fig 3:1; [para 0071]) as claimed in claim 1,
Saito teaches:
the first insulating layer (fig 3:51; [para 0102]) and the second insulating layer each (fig 3:52; [para 0103]) have an annular (circular) contact surface with the electrode (fig 3:720,730; [para 0094]) on the end surface, and the annular contact surface of the first insulating layer (fig 3:51; [para 0102]) has an offset relative to the annular contact surface of the second insulating layer (fig 3:52; [para 0103]) in a thickness direction (fig 3:Z; [para 0083]) of the end surface.
Regarding claim 10.
Saito in view of Weng teaches the micro light-emitting chip structure (fig 3:1; [para 0071]) as claimed in claim 1,
Saito teaches:
a dielectric structure disposed in the gap (annotated fig 3).
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Regarding claim 11.
Saito in view of Weng teaches the micro light-emitting chip structure (fig 3:1; [para 0071]) as claimed in claim 10,
Saito teaches:
the dielectric structure is in direct contact (annotated fig 3) with the electrode (fig 3:720,730; [para 0110]).
Regarding claim 13.
Saito in view of Weng teaches the micro light-emitting chip structure (fig 3:1; [para 0071]) as claimed in claim 10,
Saito teaches:
the dielectric structure is in direct contact with the reflective layer (fig 3:53; [para 0104]).
Regarding claim 14
Saito in view of Weng teaches the micro light-emitting chip structure (fig 3:1; [para 0071]) as claimed in claim 1,
Saito teaches:
the peripheral surface is an inclined surface, and the first insulating layer (fig 3:51; [para 0103]), the reflective layer (fig 3:53; [para 0104]), and the second insulating layer (fig 3:52; [para 0103]) conformally cover the peripheral surface and a part of the end surface (annotated figure 3).
Claim(s) 15 through 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yeon (US 2021/0366981) in view of Weng (US 2013/0049050) in view of Chen (US 2018/0090058).
Regarding claim 15.
Yeon teaches:
micro display structure (fig 5:100; [para 0071]), comprising: a display substrate (fig 5:300; [para 0070]);
micro light-emitting chip structures (fig 5:LS; [para 0058]) arranged on the display substrate (fig 5:300; [para 0070]), wherein each of the micro light-emitting chip structures (fig 5:LS; [para 0058]) comprises: a first-type semiconductor layer (fig 5:122; [para 0059]);
a light-emitting layer (fig 5:125; [para 0059]) disposed on the first-type semiconductor layer (fig 5:122; [para 0059]);
a second-type semiconductor layer (fig 5:127; [para 0059]) disposed on one side of the light-emitting layer (fig 5:125; [para 0059]) that is opposite the first-type semiconductor layer (fig 5:122; [para 0059]), wherein the second-type semiconductor layer (fig 5:127; [para 0059]) has a peripheral surface and an end surface that is connected to the peripheral surface;
a first insulating layer (fig 5:131; [para 0063]) covering at least the peripheral surface and the end surface;
a reflective layer (fig 5:135; [para 0063]) disposed on the first insulating layer (fig 5:131; [para 0063]) and covering at least the peripheral surface and the end surface;
a second insulating layer (fig 5:141; [para 0063]) disposed on the reflective layer (fig 5:135; [para 0063]) and covering at least the peripheral surface and the end surface;
and an electrode (fig 5:151; [para 0066]) disposed on the end surface and connected to the second-type semiconductor layer (fig 5:127; [para 0059]), wherein a gap is formed between the electrode (fig 5:151; [para 0066]) and the reflective layer (fig 5:135; [para 0063]), so as to electrically insulate the electrode (fig 5:151; [para 0066]) from the reflective layer (fig 5:135; [para 0063]), wherein the first-type semiconductor layers (fig 5:122; [para 0059]) of the micro light-emitting chip structures (fig 5:LS; [para 0058]) are connected.
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Yeon does not teach the gap is an air gap
Weng teaches:
A micro light-emitting chip structure (fig 2:10a[0044]), comprising:
wherein a gap (fig 2:191[0044]) is formed between the electrode (fig 2:15[0048]) and the reflective layer (fig 2:19[0053]), so as to electrically insulate the electrode (fig 2:15[0048]) from the reflective layer (fig 2:19[0053]), and the gap is an air gap (fig 2:191[0044])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to make the gap an air gap in order to decrease the dielectric constant of the material
Yeon does not teach the light emitting chip structures are connected to each other to form a common electrode.
Chen teaches:
the micro light-emitting chip structures (fig 5:320; [para 0040]) are connected with each other to form a common electrode structure (fig 14c:1435; [para 0055]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the light emitting chip structures with a common electrode in order to energize multiple LEDs with a simplified wiring structure thereby reduce the number of connections that need to be made.
Regarding claim 16.
Yeon in view of Weng in view of Chen teaches the micro display structure (fig 5:100; [para 0071]) as claimed in claim 15, further
Yeon teaches:
the first insulating layers (fig 5:131; [para 0063]), the reflective layers (fig 5:135; [para 0063]), and the second insulating layers (fig 5:141; [para 0063]) of the micro light-emitting chip structures (fig 5:LS; [para 0058]) are connected with each other.
Regarding claim 17.
Yeon in view of Weng in view of Chen teaches the micro display structure (fig 5:100; [para 0071]) as claimed in claim 16, further:
Yeon teaches:
the first insulating layers (fig 5:131; [para 0063]), the reflective layers (fig 5:135; [para 0063]), and the second insulating layers (fig 5:141; [para 0063]) form a protruding structure at a junction of adjacent two of the micro light-emitting chip structures (fig 5:LS; [para 0058]), and the protruding structure has at least one inclined surface (annotated figure 5).
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Regarding claim 18.
Yeon in view of Weng in view of Chen teaches the micro display structure (fig 5:100; [para 0071]) as claimed in claim 17, further:
Yeon teaches:
an included angle between the inclined surface and a reference plane parallel to the light-emitting layer (fig 5:125; [para 0059]) is between 15° and 75°.
Given the teaching of the references, it would have been obvious to determine the optimum slope of the layers involved. See In re Aller, Lacey and Hall (10 USPQ 233-237) It is not inventive to discover optimum or workable ranges by routine experimentation. Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff, 919 f.2d 1575,1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 19.
Yeon in view of Weng in view of Chen teaches the micro display structure (fig 5:100; [para 0071]) as claimed in claim 17, further:
Yeon teaches:
the protruding structure reflects a light from one of the micro light-emitting chip structures (fig 5:LS; [para 0058]).
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Regarding claim 20.
Yeon in view of Weng in view of Chen teaches the micro display structure (fig 5:100; [para 0071]) as claimed in claim 15, further:
Yeon teaches:
the micro-light-emitting chip structures (fig 5:LS; [para 0058]) emit light of the same color (blue; [para 0058]), and the micro display structure further comprises: color conversion structures (fig 5:192,193; [para 0057]) disposed on some of the micro light-emitting chip structures (fig 5:LS; [para 0058]), wherein the color conversion structures (fig 5:192,193; [para 0057]) convert the light emitted by the micro light-emitting chip structures (fig 5:LS; [para 0058]) into light of different colors .
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
The newly applied reference Weng (US 2013/0049050). In combination with prior art anticipates the claims.
Allowable Subject Matter
Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not teach in combination with the other elements of the claim a micro light-emitting chip structure, comprising:a second insulating layer disposed on the reflective layer and covering at least the peripheral surface and the end surface; and an electrode disposed on the end surface and connected to the second-type semiconductor layer, wherein a gap is formed between the electrode and the reflective layer, so as to electrically insulate the electrode from the reflective layer, and the gap is an air gap, a dielectric structure disposed in the gap, the dielectric structure is separated from the reflective layer.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
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/D.J.G/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
Prosecution Insights