Prosecution Insights
Last updated: July 17, 2026
Application No. 18/512,686

PHOTONIC DEVICE FORMED USING SELF-ALIGNED PROCESSES

Non-Final OA §102§103
Filed
Nov 17, 2023
Priority
Aug 14, 2023 — provisional 63/519,509
Examiner
WEILAND, ADAM DAVID
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
94%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allowance Rate
33 granted / 35 resolved
+26.3% vs TC avg
Moderate +9% lift
Without
With
+9.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
39 currently pending
Career history
88
Total Applications
across all art units

Statute-Specific Performance

§103
89.9%
+49.9% vs TC avg
§102
7.3%
-32.7% vs TC avg
§112
2.8%
-37.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 35 resolved cases

Office Action

§102 §103
DETAILED ACTION This action is responsive to U.S. Patent Application No. 18/512,686 filed on 17 November 2023. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement Acknowledgment is made of Applicant' s Information Disclosure Statement(s) (IDS). The IDS(es) has/have been considered. Election/Restrictions Applicant’s election without traverse of the Group I Species 1 (FIG. 11) embodiment in the reply filed on 16 March 2026 is acknowledged. Regarding Applicant’s listing of claims 1-13 and 21-27 as readable on the elected species, however, the Examiner respectfully notes that claim 10 does not belong to the elected Group I Species 1 embodiment. Claim 10 recites the limitation “a first dielectric spacer disposed over the P-type doped component and on a first side surface of the optical absorption layer; and a second dielectric spacer disposed over the charging layer and on a second side surface of the optical absorption layer.” Accordingly, claim 10 appears to be drawn to the FIG. 18 embodiment, depicting species 2, rather than the elected FIG. 11 embodiment, depicting species 1. Accordingly, claim 10 is withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-5, 7-9, 11-13, 21, and 23-26 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Publication No. 2022/0013682 (filed July 8, 2021) (hereinafter “Srinivasan”). Regarding independent claim 1, Srinivasan discloses: A photonic device (FIG. 21, depicting an APD device 20, [0093]), comprising: a substrate (FIGS. 5/21, silicon substrate layer 51, [0077]); a P-type doped component disposed over the substrate (FIGS. 5/21, either of the first or second contact regions 21/22, [0065]); an N-type doped component disposed over the substrate (FIGS. 5/21, either of the first or second contact regions 21/22, [0065]); an optical absorption layer (FIGS. 5/21, absorption region 27, [0072]) disposed over the substrate and between the P-type doped component and the N-type doped component (FIGS. 5/21, depicting wherein the absorption region 27 is disposed between the first and second contact regions 21/22), wherein the optical absorption layer and the substrate have different material compositions (FIGS. 5/21, [0094]: “In particular, the semiconductor layer 23 may comprise silicon. . . . The absorption region 27 may comprise germanium.”); and a charging layer disposed over the substrate (FIGS. 5/21, charge region 26, [0069]) and between the P-type doped component and the N-type doped component (FIGS. 5/21, depicting wherein the charge region 26 is disposed between the first and second contact regions 21/22), wherein the charging layer has a first side surface that is substantially linear (FIGS. 5/21, depicting wherein the side of the charge region 26 includes a plurality of linear sides), and wherein the first side surface is in direct contact with the optical absorption layer (FIGS. 5/21, depicting wherein one of a plurality of substantially linear sides of the charge region 26 is in direct contact with the absorption region 27). Regarding claim 2, Srinivasan further discloses wherein the charging layer has a second side surface opposite the first side surface (FIGS. 5/21, depicting wherein the side of the charge region 26 includes a plurality of linear sides, including a side opposite the side in direct contact with the absorption region 27); and the second side surface is substantially linear (FIGS. 5/21, depicting wherein the side of the charge region 26 opposite the side in direct contact with the absorption region 27 is substantially linear). Regarding claim 3, Srinivasan further discloses wherein the charging layer is doped with a P-type dopant (FIGS. 4/5/21, [0074]: “Generally, the first contact region 21 is p-doped and the highly-doped region 21 a is accordingly highly p-doped, and the second contact region 22 is n-doped and the highly-doped region 22 a is highly n-doped. In this case also the charge region 26 is p-doped. For instance, the charge region 26 may be p-doped to a lower extend as the first contact region 21.”); and a dopant concentration level of the charging layer is less than a dopant concentration level of the P-type doped component disposed over the substrate (FIGS. 4/5/21, [0074]: “Generally, the first contact region 21 is p-doped and the highly-doped region 21 a is accordingly highly p-doped, and the second contact region 22 is n-doped and the highly-doped region 22 a is highly n-doped. In this case also the charge region 26 is p-doped. For instance, the charge region 26 may be p-doped to a lower extend as the first contact region 21.”). Regarding claim 4, Srinivasan further discloses a multiplication layer (FIGS. 4/5/21, second region 25, [0067]) disposed between the charging layer and the N-type doped component (FIGS. 4/5/21, depicting wherein the second region 25 is disposed between the charge region 26 and the second contact region 22). Regarding claim 5, Srinivasan further discloses wherein the substrate has a silicon material composition (FIGS. 5/21, disclosing a silicon substrate layer 51, [0077]), and the optical absorption layer has a germanium material composition (FIGS. 5/21, [0094]: “In particular, the semiconductor layer 23 may comprise silicon. . . . The absorption region 27 may comprise germanium.”). Regarding claim 7, Srinivasan further discloses a silicon component (FIGS. 4/5/21, first region 24 of the semiconductor layer 23, [0066]) disposed below the optical absorption layer and between the P-type doped component and the charging layer (FIGS. 4/5/21, depicting wherein the first region 24 of the semiconductor layer 23 is disposed below the absorption region 27 and between the contact region 21 and the charge region 26). Regarding claim 8, Srinivasan further discloses wherein the silicon component and the optical absorption layer have substantially co-planar side surfaces (FIGS. 4/5/21, depicting wherein a side surface of the first region 24 shares a plane with a side surface of the absorption region 27). Regarding claim 9, Srinivasan further discloses one or more mask layers (FIG. 21, first mask layer 11, [0066]) disposed over the optical absorption layer (FIG. 21, depicting wherein the first mask layer is disposed over the absorption layer 27). Regarding independent claim 11, Srinivasan discloses: A structure (FIG. 21, depicting an APD device 20, [0093]), comprising: a substrate (FIGS. 5/21, silicon substrate layer 51, [0077]); a P-type contact disposed over the substrate in a vertical direction, wherein the P-type contact contains silicon (FIGS. 5/21, first contact region 21, [0065], [0094]: “In particular, the semiconductor layer 23 may comprise silicon. . . . The absorption region 27 may comprise germanium.”); an N-type contact disposed over the substrate in the vertical direction, wherein the N-type contact contains silicon (FIGS. 5/21, second contact region 22, [0065], [0094]: “In particular, the semiconductor layer 23 may comprise silicon. . . . The absorption region 27 may comprise germanium.”); an optical absorption layer disposed over the substrate in the vertical direction (FIGS. 5/21, absorption region 27, [0072]) and between the P-type contact and the N-type contact in a horizontal direction (FIGS. 5/21, depicting wherein the absorption region 27 is disposed between the first and second contact regions 21/22), wherein the optical absorption layer contains germanium (FIGS. 5/21, [0094]: “In particular, the semiconductor layer 23 may comprise silicon. . . . The absorption region 27 may comprise germanium.”); and a charging layer disposed over the substrate in the vertical direction (FIGS. 5/21, charge region 26, [0069]) and between the optical absorption layer and the N-type contact in the horizontal direction (FIGS. 5/21, depicting wherein the charge region 26 is disposed between the first and second contact regions 21/22), wherein the charging layer contains silicon that is doped with a P-type dopant (FIGS. 4/5/21, [0074]: “Generally, the first contact region 21 is p-doped and the highly-doped region 21 a is accordingly highly p-doped, and the second contact region 22 is n-doped and the highly-doped region 22 a is highly n-doped. In this case also the charge region 26 is p-doped. For instance, the charge region 26 may be p-doped to a lower extend as the first contact region 21.”), and wherein an interface between the optical absorption layer and the charging layer extends substantially in the vertical direction (FIGS. 5/21, depicting wherein an interface between the charge region 26 and the absorption region 27 extends substantially in a vertical direction). Regarding claim 12, Srinivasan further discloses a silicon layer disposed over the optical absorption layer in the vertical direction (FIGS. 5/21, depicting a semiconductor layer 23 including regions 24 and 25, which may be formed from silicon, wherein the region 24 is disposed over the absorption region 27, [0077]); a silicon oxide layer disposed over the silicon layer in the vertical direction (FIGS. 5/21, depicting an insulator layer 52 disposed over the semiconductor layer 23, which may be formed from silicon oxide, [0077]); and a polysilicon layer disposed over the silicon oxide layer in the vertical direction (FIGS. 5/21, depicting a mask layer 11 disposed over the insulator layer 52, which may be formed from polysilicon, [0079]). Regarding claim 13, Srinivasan further discloses an undoped silicon component disposed underneath the optical absorption layer in the vertical direction (FIGS. 4/5/21, first region 24 of the semiconductor layer 23, wherein the first region 24 is underneath the absorption region 27 in a vertical direction and which is masked to prevent doping, [0066], [0004]), wherein the P-type contact and the charging layer are in direct contact with opposite side surfaces of the undoped silicon component (FIGS. 4/5/21, depicting wherein the first contact region 21 and the charge region 26 are in direct contact with opposite sides of the first region 24). Regarding claim 21, Srinivasan further discloses an insulator layer (FIGS. 5/21, insulator layer 52, [0077]) disposed above the substrate (FIGS. 5/21, depicting wherein the insulator layer 52 is disposed above the silicon substrate layer 51) and below the P-type contact, the N-type contact, the optical absorption layer, and the charging layer (FIGS. 5/21, depicting wherein the insulator layer 52 is disposed below the first and second contact regions 21/22, the absorption region 27, and the charge region 26). Regarding claim 23, Srinivasan further discloses a semiconductor layer (FIGS. 4/5/21, second region 25 of the semiconductor layer 23, [0067]) disposed between the charging layer and the N-type contact in the horizontal direction (FIGS. 4/5/21, depicting wherein the second region 25 is disposed between the charge region 26 and the second contact region 22). Regarding independent claim 24, Srinivasan discloses: A photonic device (FIG. 21, depicting an APD device 20, [0093]), comprising: a substrate that contains a semiconductive material (FIGS. 5/21, silicon substrate layer 51, [0077]); an insulator layer located over the substrate (FIGS. 5/21, depicting an insulator layer 52 disposed on the silicon substrate layer 51, [0077]); a P-type contact located over the insulator layer (FIGS. 5/21, first contact region 21, [0065], [0094]); an N-type contact located over the insulator layer FIGS. 5/21, second contact region 22, [0065], [0094]; a first semiconductor component located over the insulator layer and between the P-type contact and the N-type contact (FIGS. 4/5/21, first region 24 of the semiconductor layer 23, disposed between the first and second contact regions 21/22, [0066]); an optical absorption layer (FIGS. 5/21, absorption region 27, [0072]) located over the first semiconductor component (FIGS. 5/21, depicting wherein the absorption region 27 is located over the first region 24 of the semiconductor layer 23), wherein the optical absorption layer contains germanium (FIGS. 5/21, [0094]: “In particular, the semiconductor layer 23 may comprise silicon. . . . The absorption region 27 may comprise germanium.”); and a charging layer (FIGS. 5/21, charge region 26, [0069]) located over the insulator layer and between the optical absorption layer and the N-type contact (FIGS. 5/21, depicting wherein the charge region 26 is located over the insulator 52 and between the absorption region 27 and the second contact region 22), wherein the charging layer is doped with a P-type dopant (FIGS. 4/5/21, [0074]: “Generally, the first contact region 21 is p-doped and the highly-doped region 21 a is accordingly highly p-doped, and the second contact region 22 is n-doped and the highly-doped region 22 a is highly n-doped. In this case also the charge region 26 is p-doped. For instance, the charge region 26 may be p-doped to a lower extend as the first contact region 21.”), and wherein the charging layer and the optical absorption layer collectively define a first interface that is substantially linear (FIGS. 5/21, depicting wherein an interface between the charge region 26 and the absorption region 27 is substantially linear). Regarding claim 25, Srinivasan further discloses wherein a second semiconductor component (FIGS. 5/21, second region 25 of the semiconductor layer 23, [0067]) located over the insulator layer and between the charging layer and the N-type contact (FIGS. 5/21, depicting wherein the second region 25 is located over the insulator 52 and between the charge region 26 and the second contact region 22), wherein the charging layer and the second semiconductor component collectively define a second interface that is substantially linear (FIGS. 5/21, depicting wherein an interface between the charge region 26 and the second region 25 is substantially linear). Regarding claim 26, Srinivasan further discloses wherein a P-type dopant concentration level of the charging layer is less than a P-type dopant concentration level of the P-type contact (“Generally, the first contact region 21 is p-doped and the highly-doped region 21 a is accordingly highly p-doped, and the second contact region 22 is n-doped and the highly-doped region 22 a is highly n-doped. In this case also the charge region 26 is p-doped. For instance, the charge region 26 may be p-doped to a lower extend as the first contact region 21.”). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Srinivasan. Regarding claim 6, Srinivasan further discloses wherein: the P-type doped component or the N-type doped component has a recess (FIGS. 5/21, depicting where either of the first or second contact regions 21/22 have recesses), the recess having a bottom surface that faces upwards in a vertical direction (FIGS. 5/21, depicting where either of the first or second contact regions 21/22 have recesses, wherein the recesses have bottom surfaces that face upwards in a vertical direction). Srinivasan does not specifically disclose wherein a bottommost surface of the optical absorption layer has a lower vertical elevation than the bottom surface of the recess. Regarding the relative elevations of the bottom surfaces, however, it is well-established that “when there is motivation to solve a problem and there are a finite number of identified, predictable solutions, a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to anticipated success, it is likely the product not of innovation but of ordinary skill and common sense.” MPEP § 2143(I)(E) (quoting KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, (2007)). Currently, there is a recognized need in the art to create display devices that maximize performance and minimize cost, often accomplished by using fewer and/or smaller amounts of materials in each layer comprising the device such that the layers are thin enough to reduce material costs and to shorten the production process, but thick enough to meet desired performance specifications. In the present case, there are a finite number of identified, predictable potential solutions for meeting the abovementioned need in the context of material usage, including forming the device such that the bottom surface of the recess has a lower vertical elevation than the bottommost surface of the absorption region, forming the device such that the bottommost surfaces have the same vertical elevation, or forming the device such that the bottom surface of the recess has a higher vertical elevation than the bottommost surface of the absorption region, each having a reasonable expectation of success regardless of which known potential solution is pursued. Accordingly, it would have been obvious to try forming the bottommost surfaces such that a bottommost surface of the absorption region has a lower vertical elevation than the bottom surface of the recess. Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Srinivasan in view of U.S. Patent Publication No. 2020/0313021 (filed Mar. 12, 2020) (hereinafter “Fujikata”). Regarding claim 22, Srinivasan further discloses a passivation layer (FIGS. 5/18/21, sacrificial layer 111, which may be formed from silicon oxide, [0083]) disposed over the P-type contact, the N-type contact, the optical absorption layer, and the charging layer (FIGS. 5/18/21, depicting wherein the sacrificial layer is disposed over the first and second contact regions 21/22, the absorption region 27, and the charge region 26). Srinivasan does not specifically disclose wherein the P-type contact defines a first recess; the N-type contact and the charging layer collectively define a second recess; a first portion of the passivation layer is disposed in the first recess; and a second portion of the passivation layer is disposed in the second recess. In the same field of endeavor, Fujikata discloses a structure (FIGS. 6A-C, depicting a photodetector 400, [0093]), wherein a semiconductor layer (FIGS. 6A-C, p-Si region 608, n-Si region 606, and i-Si region 610, [0093]) is shaped such that a first portion of the semiconductor layer forms a first recess (FIGS. 6A-C, depicting wherein the p-Si region 608 defines a first recess, [0093]), and a second portion of the semiconductor layer forms a second recess (FIGS. 6A-C, depicting wherein the n-Si region 606 defines a second recess, [0093]). Regarding the shape of the Si regions, in [0071], Fujikata states: “In the photodetector 400, the light absorbing layer may be optically coupled to an optical waveguide that is formed by the Si layer stacked on the BOX layer 404. In such a case, the photodetector 400 is configured to receive an optical signal from the optical waveguide.” Fujikata further states in [0095]: “Next, as shown in FIG. 6C, by using the SiNx hard mask 614 and the oxide-film mask 612 as masks, the Si layer comprising the n-Si region 606 and the p-Si region 608 is subjected to patterning, and the rib-shaped waveguide structure is constructed thereby.” Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the APD device of Srinivasan by substituting the shape of the Si regions of Fujikata in order to form a waveguide, in order allow the APD device to receive optical signals from the waveguide. See Fujikata [0071], [0095]. Moreover, substitution of the shape of the Si regions of Fujikata would result in a configuration wherein the P-type contact defines a first recess (Srinivasan FIGS. 5/21; Fujikata FIGS. 6A-C; depicting wherein the shape of the p-Si 608 region has a recess, such that the first contact region 21 would have a recess); the N-type contact and the charging layer collectively define a second recess (Srinivasan FIGS. 5/21; Fujikata FIGS. 6A-C; depicting wherein the shape of the n-Si 606 region has a recess, such that the second contact region 22 and the charge region 26 would have collectively have a recess); a first portion of the passivation layer is disposed in the first recess (Srinivasan FIGS. 5/21; Fujikata FIGS. 6A-C; depicting wherein the shape of the p-Si 608 region has a recess, such that the first contact region 21 would have a recess, and further wherein the sacrificial layer 111 would be disposed in the recess just as the oxide cladding 620 is disposed in the recess); and a second portion of the passivation layer is disposed in the second recess (Srinivasan FIGS. 5/21; Fujikata FIGS. 6A-C; depicting wherein the shape of the n-Si 606 region has a recess, such that the second contact region 22 and the charge region 26 would have collectively have a recess, and further wherein the sacrificial layer 111 would be disposed in the recess just as the oxide cladding 620 is disposed in the recess). Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Srinivasan in view of U.S. Patent Publication No. 2021/0223478 (published July 22, 2021) (hereinafter “Song”). Regarding claim 27, Srinivasan does not specifically disclose a silicon layer disposed over the optical absorption layer; a dielectric layer disposed over the silicon layer; and a polysilicon layer disposed over the dielectric layer. In the same field of endeavor, Song discloses a silicon layer (FIGS. 6/7, capping layer 50, which may be a layer containing silicon, [0023]) disposed over the optical absorption layer (FIG. 7, depicting wherein the capping layer 50 is disposed over germanium region 46). Regarding the capping layer, in [0024], Song states: “The material and the formation process of capping layer 50 can be configured to allow capping layer 50 to apply a stress on the underlying germanium region 46. In accordance with some embodiment, the stress is tensile. In accordance with some embodiment, the stress is compressive. The stress may be higher than about 1 Gpa, and may be in the range between about 0.2 Gpa and about 1.7 Gpa. Other values are also within the scope of the present disclosure. A tensile stress can effectively reduce the direct bandgap of Germanium, which translates to an extension of the strong absorption band toward the longer wavelength.” Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the APD device of Srinivasan by adding the capping layer of Song in order to reduce the bandgap and extend the absorption band toward a longer wavelength. See Song [0024]. Moreover, addition of the capping layer of Song would result in a configuration wherein a dielectric layer is disposed over the silicon layer (Song FIGS. 6/7; Srinivasan FIGS. 5/18/21; depicting wherein the sacrificial layer 111, which is a dielectric layer, would be disposed over the capping layer 50); and a polysilicon layer is disposed over the dielectric layer (Song FIGS. 6/7; Srinivasan FIGS. 5/18/21; depicting wherein the mask layer 11, which may be formed from polysilicon, would be disposed over the sacrificial layer 111). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM D WEILAND whose telephone number is (703)756-4760. The examiner can normally be reached Monday - Friday 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ADAM D WEILAND/Examiner, Art Unit 2813 /STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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Prosecution Timeline

Nov 17, 2023
Application Filed
May 28, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Expected OA Rounds
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Grant Probability
99%
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