Prosecution Insights
Last updated: August 17, 2026
Application No. 18/513,303

REDUCED RESISTIVITY FOR ACCESS LINES IN A MEMORY ARRAY

Non-Final OA §102§103§112
Filed
Nov 17, 2023
Priority
Aug 14, 2020 — divisional of 11/830,816
Examiner
PARKER, JOHN M
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
787 granted / 855 resolved
+24.0% vs TC avg
Minimal +1% lift
Without
With
+0.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
26 currently pending
Career history
870
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
45.2%
+5.2% vs TC avg
§102
32.1%
-7.9% vs TC avg
§112
13.7%
-26.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 855 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 2-18 in the reply filed on 10 July 2026 is acknowledged. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “removing an oxidized portion of the via before forming the first metal layer” limitation as described in claim 13 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 13, it is unclear how a portion of the via is oxidized before forming the first metal layer when the oxidation step of the claim from which it depends requires the first metal layer to be present. Claim 13 has not been rejected over the prior art because, in light of the 35 U.S.C. 112 rejections supra, there is a great deal of confusion and uncertainty as to the proper interpretation of the limitations of the claims; hence, it would not be proper to reject the claims on the basis of prior art. As stated in In re Steele, 305 F.2d 859, 134 USPQ 292 (CCPA 1962), a rejection under 35 U.S.C. 103 should not be based on considerable speculation about the meaning of terms employed in a claim or assumptions that must be made as to the scope of the claims. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 2, 7-9, 11, 12, 15 and 18 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Schricker et al. (US Pat. Pub. 2009/0001342). Regarding claim 2, Schricker teaches a method of manufacturing a memory device comprising: Forming a via that extends through one or more materials for the memory device [fig. 2c, 208 of memory cell 218]; Forming a first metal layer above the via [fig. 2c, 206 of upper cell 220]; Oxidizing the first metal layer [fig. 2c, 212, paragraph [0040] teaches oxidizing to form 212]; and Forming, after oxidizing the first metal layer, a second metal layer above the first metal layer, wherein the second metal layer is for one or more access lines of the memory device [fig. 2c, 208 of upper cell 220]. Regarding claim 7, Schricker discloses the method of claim 2, wherein: the via is in contact with the first metal layer [fig. 2c, 208 of memory cell 218 is in electrical contact with metal layer 206 of 220]; and the first metal layer is in contact with the second metal layer [fig. 2c, metal layer 206 of 220 is in electrical contact with second metal layer 208 of 220]. Regarding claim 8, Schricker teaches the method of claim 2, wherein the first mal layer is for the one or more access lines of the memory device [fig. 2c, 206 of memory cell 220 is an access line (word line or bit line)]. Regarding claim 9, Schricker discloses the method of claim 2, wherein oxidizing the first metal layer comprises exposing the first metal layer to oxygen for a duration [paragraph [0049]]. Regarding claim 11, Schricker teaches the method of claim 2, wherein forming the first metal layer comprises: Depositing the first metal layer via a physical vapor deposition process, a chemical vapor deposition process or any combination thereof [paragraph [0065] teaches forming 406 (206 equivalent) by CVD or PVD]. Regarding claim 12, Schricker discloses the method of claim 2, wherein forming the second metal layer comprises: Depositing the second metal layer via a PVD process, CVD process or combination thereof [paragraph [0082] teaches 440 (208 equivalent) by CVD or PVD]. Regarding claim 15, Schricker teaches a method of manufacturing a memory device comprising: Forming a via that extends in a first direction through one or more material within the memory device [fig. 4b, 406 extends in a first direction (into the page) through material 410]; Forming a line of metal oxide contacting the via and extending in a second direction within the memory device different than the first direction [fig. 4b, 413 extends into the page as well as horizontally left to right in a second direction, paragraph [0071] teaches 413 is a metal oxide, it contacts the via through layer 407]; and Forming a set of memory cells coupled with an access line that extends in the second direction, the access line comprising a metal contacting the line of metal oxide [fig. 4d, memory cells are the combination of 408, 420 and 436, access line 436 contacting 413 through 420, paragraphs [0060-0083] describe figs 4a-4d as a fabrication process for a memory cell, paragraph [0082] teaches 440 (of 436) is a metal layer]. Regarding claim 18, Schricker discloses the method of claim 15, wherein the line of metal oxide comprises an oxide of a second metal that is different than the metal of the access line [paragraph [0082] teaches the access line metal can be tungsten, paragraph [0071] teaches 413 is titanium oxide]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 5 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schricker as applied to claims 2, 7-9, 11, 12, 15 and 18 above, and further in view of Murooka (US Pat. Pub. 2013/0148400). Regarding claim 5, Schricker fails to teach the second metal layer has a thickness greater than the first metal layer. However, Murooka teaches a memory cell array with a variable resistance material, the first metal lines having a first thickness, second metal lines having a second thickness and the second thickness being greater than the first [fig. 23, WL 52 as the first metal layer, GBL as the second metal layer, paragraphs [0107 and 0115] teach 52 has a thickness of 10nm and GBL has a thickness of 150nm]. It would have been obvious to one of ordinary skill in the art at the time of the invention to incorporate the teachings of Murooka into the method of Schricker by forming the second metal layer with a thickness greater than the first metal layer. The ordinary artisan would have been motivated to modify Schricker in the manner set forth above for at least the purpose of adjusting parameters of the memory array by configuring sheet resistance and parasitic capacitance [paragraphs [ 0107 and 0204-207]. Regarding claim 6, Schricker in view of Murooka discloses the method of claim 5, wherein the first metal layer and the second metal layer are both formed using a same material [Schricker, paragraph [0042] tungsten]. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schricker as applied to claims 2, 7-9, 11, 12, 15 and 18 above, and further in view of Nomura et al. (US Pat. Pub. 2008/0001143). Regarding claim 10, while Schricker teaches an oxidation step they fail to teach oxidizing the first metal layer using a plasma that comprises oxygen, instead teaching thermal oxidation. However, Nomura teaches a memory cell device with a metal layer oxidized by an oxygen plasma as an alternative to thermal oxidation [paragraph [0078]]. It would have been obvious to one of ordinary skill in the art at the time of the invention to incorporate the teachings of Nomura into the method of Schricker by oxidizing the first metal layer by exposing the first metal layer to a plasma that comprises oxygen for a duration. The ordinary artisan would have been motivated to modify Schricker in the manner set forth above for at least the purpose of utilizing known successful layer formation techniques to ensure successful device fabrication. Furthermore, thermal oxidation and plasma oxidation are shown to be alternative processes to one another and art recognized suitability for an intended purpose has been recognized to be motivation to combine. MPEP 2144.07. Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schricker as applied to claims 2, 7-9, 11, 12, 15 and 18 above, and further in view of Gallo et al. (US Pat. #8,829,482). Regarding claim 14, Schricker fails to teach forming the first metal layer, the oxidizing step and the second metal layer all occur within vacuum. However, Gallo teaches a memory device in which at least some layers are formed within a vacuum [column 7, lines 64-67]. It would have been obvious to one of ordinary skill in the art at the time of the invention to incorporate the teachings of Gallo into the method of Schircker by forming the first metal layer, oxidizing the first metal layer and forming the second metal layer all within a vacuum. The ordinary artisan would have been motivated to modify Schricker in the manner set forth above for at least the purpose of preventing exposure to ambient air and any reactive materials in said air [Gallo, column 7, lines 64-67]. Preventing exposure to ambient air would also ensure proper layer formation free from contaminants. Allowable Subject Matter Claims 3, 4, 16 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN M PARKER whose telephone number is (571)272-8794. The examiner can normally be reached M-F 7:30am - 3:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN M PARKER/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Nov 17, 2023
Application Filed
Jul 27, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
93%
With Interview (+0.9%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 855 resolved cases by this examiner. Grant probability derived from career allowance rate.

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