DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with regard to the prior art rejection have been considered but are moot in view of the new grounds of rejection necessitated by claim amendments.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 5, 7-9, 12, 14-16, 19, 21 are rejected under 35 U.S.C. 103 as being unpatentable over D11 in view of Gallarda et al2 and further in view of Hung et al.3
With regard to claim 1, D1 teach computer-implemented method comprising: receiving a sample image of a first printed circuit board assembly (PCBA), wherein the first PCBA includes a first printed circuit board (PCB) and a first plurality of electronic components mounted on the first PCB (see ¶ 60: X-ray image of integrated circuit); receiving a baseline image for a second PCBA, wherein the second PCBA includes a second PCB and a second plurality of electronic components mounted on the second PCB (see ¶ 60: reference image); comparing, utilizing differential analysis, the sample image to the baseline image (see ¶ 60: comparing images); identifying, based on the comparing, a first area of a first anomaly associated with the first PCBA (see ¶ 60: identifying differences); and displaying a see ¶ 16: display one or more of the at least one X-ray image of the one or more ICs showing differences between the one or more of the at least one X-ray image and the one or more reference images).
D1 fail to explicitly teach generating a generating a composite image highlighting the first area of the first anomaly associated with the first printed circuit board assembly, wherein the composite image utilizes the baseline image as a foundational image, wherein the highlighting includes at least one pixel that is not present in the sample image and present in the baseline image and displaying the composite image, however Gallarda et al. teach the missing feature (see fig. 20, col 7 lines 15-30: test image (sample image) overlaid on the reference image (baseline image) which shows the differences or defects, at least one pixel not present in the test image is present in the reference image).
One skilled in the art would have found it obvious to combine the teachings to arrive at the claimed invention. In particular, it would have been obvious to incorporate known teachings of generating a composite image as taught by Gallarda et al. into the configuration of D1 yielding predictable and enhanced visualization of the differences, thereby highlighting the potential defect or fraudulent component of the integrated circuit. By overlaying the images, i.e., composite image, it would have been easy for a person to visualize the differences between the sample image and the reference image, which would be indicate of defects or anomaly.
D1 and Gallarda et al. fail to explicitly teach cropping a portion of the composite image that includes the first area of the first anomaly; and displaying, with an enhanced magnification, the portion of the composite image that includes the first area of the first anomaly, however Hung et al. teach the missing features (see ¶ 54, fig. 1: defect region extracted and enlarged).
One skilled in the art would have found it obvious to combine the teachings to arrive at the claimed invention. In particular, it would have been obvious to incorporate known teachings of cropping and enlarging a defect region as taught in Hung et al. into the configuration of D1 yielding predictable results. The motivation would have been to enhance visualization of the defect region.
With regard to claim 2, D1 teach computer-implemented method of claim 1, wherein comparing, utilizing the differential analysis, the sample image to the baseline image further comprises: subtracting, utilizing a variance script, each pixel that is present in the sample image and the baseline image (see ¶ 60: subtracting to determine the difference or variance); and highlighting, utilizing the variance script, each pixel that is not present in the sample image or the baseline image (see ¶ 16: highlighting or showing the difference).
With regard to claim 5, D1 teach computer-implemented method of claim 3, wherein the sample image, the baseline image, and the composite image are 2D x-ray images (see ¶¶ 39, 45: x-ray images).
With regard to claim 7, D1 teach computer-implemented method of claim 1, wherein the first anomaly associated with the first PCBA represents a variation with respect to the second PCBA (see ¶ 60: difference or variation).
With regard to claim 8, see discussion of corresponding claims above. D1 inherently teaches a computer processor and a memory (see ¶ 50: computer).
With regard to claims 9, 12, 14, see discussion of corresponding claims above.
With regard to claims 15-16, 19, 21 see discussion of corresponding claims above. D1 inherently teaches a computer processor and a memory (see ¶ 50: computer).
Claims 6, 13 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over D1 in view of Gallarda et al. in view of Hung et al. and further in view of Zhang et al.4
With regard to claim 6, D1 teach computer-implemented method of claim 1, but fails to teach responsive to determining the baseline image does not exist, generating a median image for the baseline image based on a plurality of image samples of a plurality of PCBAs, wherein the plurality of PCBAs include a plurality of PCBs and a plurality of electronic components mounted on each of the plurality of PCBs, however Zhang et al. teach the missing feature (see ¶¶ 5, 144: reference image generated by determining a median or average of multiple images).
One skilled in the art before the effective filing date would have found it obvious to combine the teachings to arrive at the claimed invention. In particular, it would have been obvious to incorporate known teachings of generating a reference or baseline image based on a median of a plurality of images as taught by Zhang et al. into the configuration of D1 for generating a baseline image. The motivation would have been to enhance the accuracy of the reference or baseline image by combining a plurality of reference or baseline images.
With regard to claims 13 and 20, see discussion of claim 6.
Pertinent Art
Sakai et al.5 is related to determining defects in wafer by generating difference image.
Regner6 is related to detecting tampering of electronic system by determining difference image between field scan and a baseline scan.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AVINASH YENTRAPATI whose telephone number is (571)270-7982. The examiner can normally be reached on 8AM-5PM.
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/AVINASH YENTRAPATI/Primary Examiner, Art Unit 2672
1 US Publication No. 2015/0078518.
2 US Patent No. 6,539,106.
3 US Publication No. 2004/0120569.
4 US Publication No. 2023/0118839.
5 US Publication No. 2011/0182496.
6 US Publication No. 2020/04110473
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