Prosecution Insights
Last updated: July 17, 2026
Application No. 18/515,000

DISPLAY DEVICE

Non-Final OA §102§103§112
Filed
Nov 20, 2023
Priority
Dec 13, 2022 — RE 10-2022-0173276
Examiner
HALL, VICTORIA KATHLEEN
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
693 granted / 827 resolved
+15.8% vs TC avg
Strong +19% interview lift
Without
With
+18.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
33 currently pending
Career history
854
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
64.4%
+24.4% vs TC avg
§102
4.6%
-35.4% vs TC avg
§112
18.7%
-21.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 827 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Drawings Figures 7A-8 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated, per applicants’ specification, page 14, paragraph 1115. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: H1 (Figure 7B); S31 (Figure 12); PT41 (Figure 13D); W1 (Figure 19B). (The specification objections section, below, includes suggested changes to address the first 3 of this objections.) Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The disclosure is objected to because of the following informalities: Page 9, paragraph 81, last line of the paragraph: What does the symbol ú stand for? Check the translation. Page 14, paragraph 116, line 4: Add H1 after “pores” if this is a suitable place for this reference number. See the drawing objections. Page 15, paragraph 120, line 6: Change ES111 to ES11. Page 15, paragraph 124, lines 3-4: Check the phrase “the etching solution may not be in contact with the first inorganic insulating film IOL1.” From the drawings, the etching solution appears to contact IOL1. Compare with page 16, paragraph 125. Page 16, paragraph 128, line 4: Add S31 after “center portion” if this is a suitable place for this reference number. See the drawing objections. Page 17, paragraph 135, line 1: Change P42 to PT41. Compare with the figures. This would address one of the drawing objections. Page 23, paragraph 176, last line of the paragraph: Delete “and” and place a comma after “film 105”. At the end of the line, before the period, add another comma and add “and upper gate insulating layer 137”. Compare with Figure 15. Page 24, paragraph 181, line 1: Change “TL” to “TL1, TL2”. See Figure 17. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 8 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 8, which depends from claim 1: Claim 1 defines a signal wiring in line 3. Claim 8, which depends from claim 1, defines a plurality of signal wirings in line 2. However, the relationship between the plurality of signal wirings of claim 8 and the signal wiring of claim 1 is unclear. Compare the definition of a test wiring in claim 1, line 4 and the relationship between the test wiring and a plurality of test wirings defined in claim 8, lines 1-2. Because the relationship between the signal wiring of claim 1 and the plurality of signal wirings in claim 8 is unclear, claim 8 is rejected as indefinite. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-3, 5-9, and 20 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Yeo, U.S. Pat. Pub. No. 2019/0198582, Figures 1-7B, with evidence from Yang, U.S. Pat. Pub. No. 2016/0013209. PNG media_image1.png 1147 837 media_image1.png Greyscale PNG media_image2.png 510 828 media_image2.png Greyscale Yang, Figure 4: PNG media_image3.png 202 417 media_image3.png Greyscale Regarding claim 1: Yeo Figures 1-7B disclose a display device (10) comprising: a substrate (SUB) including a display region (AA) and a non-display region (region outside display region (AA)); a signal wiring (DL, VDL, GL) connected to the display region (AA); a test wiring (TL) connected to the signal wiring (DL, VDL, GL); and a buffer insulating layer (110), which may comprise a single layer of silicon oxide or silicon nitride, or a multi-layered structure of silicon oxide and silicon nitride, disposed below the test wiring (TL), wherein a width of the buffer insulating layer (110) is greater than a width of the test wiring (TL). Yeo specification ¶¶ 39-117. Yeo is silent as to whether the buffer insulating layer is an etch stop layer. Yang, directed to a display device, discloses an etch stop layer (5) that comprises silicon oxide, silicon nitride, or a composite layer formed by silicon oxide and silicon nitride. Yang specification ¶ 14. Thus, the Yeo buffer insulating layer, made of the same materials as the Yang etch stop layer, would have etch stop properties and therefore, would also be capable of being an etch stop layer. Regarding claim 2, which depends from claim 1: Yeo discloses the etch stop layer/buffer insulating layer (110) includes a center region overlapping the test wiring (TL) and an edge region not overlapping the test wiring (TL). See Yeo Figure 5B. Regarding claim 3, which depends from claim 2: Yeo discloses a width of the edge region is less than a width of the center region. See id. Regarding claim 5, which depends from claim 2: Yeo discloses a first inorganic insulating film (120) disposed between the etch stop layer/buffer insulating layer (110) and the test wiring (TL). See id.; see Yeo specification ¶ 69. Regarding claim 6, which depends from claim 5: Yeo discloses an organic insulating film (160) disposed on the test wiring (TL) and covering the edge region and a side surface of the etch stop layer/buffer insulating layer (110). See Yeo Figure 7B; Yeo specification ¶¶ 78, 110-116. Regarding claim 7, which depends from claim 6: Yeo discloses a second inorganic insulating film (150) disposed between the organic insulating film (160) and the test wiring (TL). See Yeo Figure 7B; Yeo specification ¶¶ 77, 113-116 Regarding claim 8, which depends from claim 1: Yeo discloses the test wiring (TL) includes a plurality of test wirings (TL) connected to a plurality of signal wirings (DL, VDL, GL), and the etch stop layer/buffer insulating layer (110) overlaps one or more test wirings (TL) of the plurality of test wirings (TL). See Yeo Figures 1, 4, 5B; Yeo specification ¶¶ 42-47, 50-53, 92-99, 104-108. Regarding claim 9, which depends from claim 5: Yeo discloses an inorganic insulating pattern layer (130) disposed on the edge region of the etch stop layer/buffer insulating layer (110), wherein a material of the inorganic insulating pattern layer (130) is a same material of the first inorganic insulating film (120). Yeo specification ¶¶ 69, 72. Regarding claim 20: Yeo discloses a display device (10) comprising: a substrate (SUB) including a display region (AA) and a non-display region (region outside display region (AA)); a test wiring (TL) connected to a circuit in the display region (AA); and a buffer insulating layer (110) disposed below the test wiring (TL); and a coating layer (160) on the substrate (SUB) and in contact with the buffer insulating layer (110), a side surface of the coating layer (160) being coplanar with a side surface of the buffer insulating layer (110). Yeo specification ¶¶ 39-117. Yeo is silent as to whether the buffer insulating layer is an etch stop layer. Yang, directed to a display device, discloses an etch stop layer that comprises silicon oxide, silicon nitride, or a composite layer formed by silicon oxide and silicon nitride. Yang specification ¶ 14. Thus, the Yeo buffer insulating layer, made of the same materials as the Yang etch stop layer, would have etch stop properties and therefore, would also be capable of being an etch stop layer. Claims 1, 2, 5-8, 11-13, and 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by its Bai, Chinese Pat. Pub. No. CN116417436, Figures 1-4, or Figures 1, 2, 7-9. Applicant cannot rely upon the certified copy of the foreign priority application to overcome this rejection because a translation of said application has not been made of record in accordance with 37 CFR 1.55. When an English language translation of a non-English language foreign application is required, the translation must be that of the certified copy (of the foreign application as filed) submitted together with a statement that the translation of the certified copy is accurate. See MPEP §§ 215 and 216. Claims 1, 2, 5-8, 11-13, and 16-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Paek, U.S. Pat. Pub. No. 2023/0216005, Figures 1-4 or Figures 1, 2, 7-9, Paek being the U.S. counterpart to the Bai publication. The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. Note: For purposes of citation, this Office cites to Paek, the U.S. publication. Because Bai is the Chinese counterpart to Paek, these rejections are also applicable to the corresponding figures and paragraphs in Bai. PNG media_image4.png 937 827 media_image4.png Greyscale PNG media_image5.png 739 706 media_image5.png Greyscale Regarding claim 1: Paek Figures 1-4 disclose a display device (100) comprising: a substrate (110) including a display region (DA) and a non-display region (NDA); a signal wiring (SL) connected to the display region (DA); a test wiring (TL) connected to the signal wiring (SL); and an etch stop layer (200) disposed below the test wiring (TL), wherein a width of the etch stop layer (200) is greater than a width of the test wiring (TL). Paek specification ¶¶ 80-149. Regarding claim 2, which depends from claim 1: Paek discloses the etch stop layer (200) includes a center region overlapping the test wiring (TL) and an edge region not overlapping the test wiring (TL). See Paek Figure 3. Regarding claim 1: Paek Figures 1, 2, 7, and 8 disclose a display device (100) comprising: a substrate (110) including a display region (DA) and a non-display region (NDA); a signal wiring (SL) connected to the display region (DA); a test wiring (TL) connected to the signal wiring (SL); and an etch stop layer (200) disposed below the test wiring (TL), wherein a width of the etch stop layer (200) is greater than a width of the test wiring (TL). Paek specification ¶¶ 80-122; 155-174. Regarding claim 2, which depends from claim 1: Paek discloses the etch stop layer (200) includes a center region overlapping the test wiring (TL) and an edge region not overlapping the test wiring (TL). See Paek Figure 8. Regarding claim 5, which depends from claim 2: Paek discloses a first inorganic insulating film (800) disposed between the etch stop layer (200) and the test wiring (TL). See id.; see Paek specification ¶ 168. Regarding claim 6, which depends from claim 5: Paek discloses an organic insulating film (310) disposed on the test wiring (TL) and covering the edge region and a side surface of the etch stop layer (200). See Paek Figure 9; see Paek specification ¶ 174. Here, the term “cover” is interpreted broadly such that the organic insulating film (310) covers the edge region and side surface of the etch stop layer (200) in plan view. Regarding claim 7, which depends from claim 6: Paek discloses a second inorganic insulating film (210) disposed between the organic insulating film (310) and the test wiring (TL). Paek Figure 9; Paek specification ¶¶ 119, 174. Regarding claim 8, which depends from claim 1: Paek discloses the test wiring (TL) includes a plurality of test wirings (TL) connected to a plurality of signal wirings (SL), and the etch stop layer (200) overlaps one or more test wirings (TL) of the plurality of test wirings (TL). Paek Figures 1, 2; Paek specification ¶¶ 98, 117. Regarding claim 11, which depends from claim 1: Paek discloses a side surface of the substrate (100) has an inclination, and the etch stop layer (200) protrudes further outward than the side surface (301) of the substrate (110). Paek Figures 3, 4; Paek specification ¶ 127. Regarding claim 12, which depends from claim 11: Paek discloses a coating layer (300) disposed on a lower surface of the substrate (110), the side surface (301) of the substrate (110), and a lower surface of the etch stop layer (200) protruding from the side surface (301) of the substrate (110). Paek Figures 3, 4; Paek specification ¶¶ 128-131. Regarding claim 13, which depends from claim 12: Paek discloses a side surface of the coating layer (300) is coplanar with a side surface of the etch stop layer (200). See Paek Figures 3, 4. Regarding claim 16: Paek Figures 1-4 disclose a display device (100) comprising: a substrate (110) including a display region (DA) and a non-display region (NDA); a test wiring (TL) connected to the display region (DA); and an etch stop layer (200) disposed below the test wiring (TL), wherein the etch stop layer (200) protrudes further outward than a side surface (301) of the substrate (110). Paek specification ¶¶ 80-149. Regarding claim 17, which depends from claim 16: Paek discloses the test wiring (TL) protrudes further outward than the side surface (301) of the substrate (110). See Paek Figures 3, 4. Regarding claim 18, which depends from claim 17: Paek discloses a coating layer (300) disposed on a lower surface of the substrate (110), the side surface of the substrate (110), and a lower surface of the etch stop layer (200) protruding from the side surface of the substrate (110). See id.; Paek specification ¶¶ 128-131. Regarding claim 19, which depends from claim 18: Paek discloses a side surface of the coating layer (300) is coplanar with a side surface of the etch stop layer (200). See Paek Figures 3, 4. Regarding claim 20: Bai Figures 1-3 disclose a display device (100) comprising: a substrate (110) including a display region (DA) and a non-display region (NDA); a test wiring (TL) connected to a circuit in the display region (DA); and an etch stop layer (200) disposed below the test wiring (TL); and a coating layer (300) on the substrate (110) and in contact with the etch stop layer (200), a side surface of the coating layer (300) being coplanar with a side surface of the etch stop layer (200). Paek specification ¶¶ 80-149. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Yeo, with evidence from Yang. Regarding claim 4, which depends from claim 2: Yeo does not disclose that a thickness of the edge region is less than a thickness of the center region. However, the application is silent as to the patentable significance of this shape variation, which is the result of a process step. Because the disclosure is silent as to the patentable significance of this shape difference, claim 4 is rejected as a patentably insignificant shape variation over the prior art. Regarding claim 10, which depends from claim 9: Yeo does not disclose that a thickness of the inorganic insulating pattern layer (130) is different from a thickness of the first inorganic insulating film (120). However, the application is silent as to the patentable significance of this shape variation. Because the disclosure is silent as to the patentable significance of this shape difference, claim 10 is rejected as a patentably insignificant shape variation over the prior art. Allowable Subject Matter Claims 14 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: With regard to claim 14: The claim has been found allowable because the prior art of record does not disclose “the etch stop layer is formed on a same layer as the first gate electrode”, in combination with the remaining limitations of the claim. With regard to claim 15: The claim has been found allowable due to its dependency from claim 14 above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTORIA KATHLEEN HALL whose telephone number is (571)270-7567. The examiner can normally be reached Monday-Friday, 8 a.m.-5 p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached at 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Victoria K. Hall/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Nov 20, 2023
Application Filed
May 15, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+18.9%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 827 resolved cases by this examiner. Grant probability derived from career allowance rate.

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