Prosecution Insights
Last updated: April 19, 2026
Application No. 18/515,009

CAPACITOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

Non-Final OA §103
Filed
Nov 20, 2023
Examiner
AHMAD, KHAJA
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
750 granted / 928 resolved
+12.8% vs TC avg
Strong +27% interview lift
Without
With
+26.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
36 currently pending
Career history
964
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
58.3%
+18.3% vs TC avg
§102
28.7%
-11.3% vs TC avg
§112
5.3%
-34.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 928 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This office action is in response to the application filed on 11/20/2023. Currently, claims 1-20 are pending in the application. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 6-16 and 19-20 are rejected under 35 U.S.C. 103 as being obvious over SONG et al (US 20210265458 A1) in view of Matsuura (US 20140134754 A1). Regarding claim 1, Figure 6 of SONG discloses a capacitor comprising: a first electrode (100, [0081]) comprising a conductive layer; a second electrode (400, [0081]) spaced apart from the first electrode; a dielectric layer (200, [0081]) electrically separating the first electrode and the second electrode; and an interfacial layer (500, [0085]) between the first electrode and the dielectric layer, wherein the conductive layer comprises a material including a first element, a second element, and a third element (MM’N, [0083]), the first element comprises Ti or Al, the second element comprises at least one of Ti, Al, Hf, Zr, Ta, Cr, Y, Sc, Si, Nb, Mo, V, W, Mn, Ni, or Co, the third element comprises N, and the first element and the second element are different from each other. SONG does not teach that the conductive layer has a rock salt crystal structure. However, Matsuura is a pertinent art which teaches a capacitor, wherein Figure 11 of Matsuura teaches a capacitor electrode having rock salt crystal structure ([0160]-[0162]) in order to improve the crystallinity of the dielectric layer formed on the electrode ([0164]-[0165]). Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to use the conductive layer (100, Figure 6 of SONG) having a rock salt crystal structure in the device of SONG according to the teaching of Matsuura in order to improve the crystallinity of the dielectric layer formed on the electrode ([0164]-[0165], Matsuura). Further, it has been held to be within the general skill of a worker in the art to select a known material such as an electrode of conductive material having rock salt crystal structure on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416 (CCPA 1960). Regarding claim 14, Figure 6 of SONG discloses a semiconductor device comprising: a transistor ([0105]-[0106], source/drain and gate comprising the transistor) comprising a substrate (1100, [0104]) comprising a source region (1210, [0105]), a drain region (1220), and a channel region (under 1320 in 1100) between the source region and the drain region and a gate stack (1300, [0106]) over the channel region; and a capacitor (2, [0114]) electrically connected to the transistor, wherein the capacitor comprises a first electrode (100, [0082]) comprising a conductive layer, a second electrode (400, [0082]) spaced apart from the first electrode, a dielectric layer (200, [0081]) electrically separating the first electrode and the second electrode, and an interfacial layer (500, [0102]) between the first electrode and the dielectric layer, the conductive layer comprises a material including a first element, a second element, and a third element, the first element comprises Ti or Al, the second element comprises at least one of Ti, Al, Hf, Zr, Ta, Cr, Y, Sc, Si, Nb, Mo, V, W, Mn, Ni, or Co, the third element comprises N, and the first element and the second element are different from each other ([0083]-[0085]). SONG does not explicitly teach that the conductive layer has a rock salt crystal structure. However, Matsuura is a pertinent art which teaches a capacitor, wherein Figure 11 of Matsuura teaches a capacitor electrode having rock salt crystal structure ([0160]-[0162]) in order to improve the crystallinity of the dielectric layer formed on the electrode ([0164]-[0165]). Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to use the conductive layer (100, Figure 6 of SONG) having a rock salt crystal structure in the device of SONG according to the teaching of Matsuura in order to improve the crystallinity of the dielectric layer formed on the electrode ([0164]-[0165], Matsuura). Further, it has been held to be within the general skill of a worker in the art to select a known material such as an electrode of conductive material having rock salt crystal structure on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416 (CCPA 1960). Regarding claims 2 and 15, Figure 6 of SONG does not explicitly teach that the capacitor of claim 1 (or claim 14), wherein the conductive layer includes Al, and a composition ratio of the Al is 63 at % or less. However, SONG teaches that the bottom electrode includes a metal nitride represented by MM′N, wherein a composition ratio of M to M′ to N in the metal nitride, MM′N, is x:y:z (e.g., the metal nitride may be M.sub.xM.sub.′yN.sub.z), 0<x≤2, 0<y≤2, and 0<z≤4 may be satisfied ([0083]-[0085]). Thus, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to use the above claimed ranges in order to form a capacitor having improved properties of leakage current and capacitance ([0158] of SONG) with low cost since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Aller, 105 USPQ 233. Further, it has been held to be within the general skill of a worker in the art to select a known material such as Al as an electrode of conductive material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416 (CCPA 1960). Regarding claims 3 and 16, Figure 6 of SONG discloses that the capacitor of claim 1 (or claim 14), wherein the interfacial layer (500) includes an oxide of the material included in the conductive layer ([0102]). Regarding claims 6-8, Figure 6 of SONG does not explicitly teach that the capacitor of claim 1, wherein a thickness of the conductive layer is within a range of about 10 Å to about 100 Å. Or The capacitor of claim 1, wherein a thickness of the interfacial layer is within a range of 5 Å to about 20 Å. Or The capacitor of claim 1, wherein a thickness of the dielectric layer is within a range of 10 Å to about 100 Å. However, SONG teaches that the thickness is determined by the desired capacitance ([0022] and [0087]). Thus, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to use the above claimed ranges in order to form a capacitor having improved properties of leakage current and capacitance ([0158] of SONG) with low cost since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claims 9 and 19, Figure 6 of SONG in view of Matsuura taches that the capacitor of claim 1 ( or claim 14), wherein the conductive layer is a first conductive layer, and the first electrode further includes a second conductive layer including TiN (TiN/TiAlN, [0160]-[0165] of Matsuura, for improved crystal orientation). Regarding claim 10, Figure 6 of SONG in view of Matsuura do not explicitly teach that the capacitor of claim 9, wherein a thickness of the second conductive layer is within a range of about 30 to about 500. However, SONG teaches that the thickness is determined by the desired capacitance ([0022] and [0087]). Thus, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to use the above claimed ranges in order to form a capacitor having improved properties of leakage current and capacitance ([0158] of SONG) with low cost since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working range involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claims 11 and 20, Figure 6 of SONG discloses that the capacitor of claim 1 (or claim 14), wherein the second electrode (400) includes a same material as the material included in the conductive layer ([0081]-[0082]). Regarding claim 12, Figure 6 of SONG discloses that the capacitor of claim 1, further comprising: a second interfacial layer (300, [0081]) between the second electrode (400) and the dielectric layer (200). Regarding claim 13, Figure 6 of SONG discloses that the capacitor of claim 12, wherein the second interfacial layer (300) includes an oxide of a material constituting the second electrode ([0088]). Claims 4-5 and 17-18 are rejected under 35 U.S.C. 103 as being obvious over SONG et al (US 20210265458 A1) in view of Matsuura (US 20140134754 A1) as applied to claim above, and further in view of NAWANO (US 20080225569 A1). Regarding claims 4 and 17, Figure 6 of SONG in view of Matsuura do not teach that the capacitor of claim 1 (or claim 14), wherein the dielectric layer includes an oxide having a perovskite-type crystal structure. However, NAWANO is a pertinent art which teaches a ferroelectric capacitor that includes a ferroelectric film, and a lower electrode and an upper electrode interposing the ferroelectric film, wherein the ferroelectric film includes a first ferroelectric layer of ferroelectric material having a perovskite type crystal structure for making nonvolatile memory devices capable of low voltage and high-speed operation, using spontaneous polarization of the ferroelectric material, and their memory cells can be each formed from one transistor and one capacitor (1T/1C). Accordingly, ferroelectric memory devices can achieve integration at the same level of that of DRAM, and are therefore expected as large-capacity nonvolatile memories ([0005]-[0007]). Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to use the dielectric layer includes an oxide having a perovskite-type crystal structure in the device of SONG in view of Matsuura according to the teaching of NAWANO in order for making nonvolatile memory devices capable of low voltage and high-speed operation, using spontaneous polarization of the ferroelectric material, and their memory cells can be each formed from one transistor and one capacitor (1T/1C). Accordingly, ferroelectric memory devices can achieve integration at the same level of that of DRAM, and are therefore expected as large-capacity nonvolatile memories ([0005]-[0007], NAWANO). Regarding claims 5 and 18, Figure 6 of SONG discloses that the capacitor of claim 4 (or claim 17), wherein the dielectric layer (200) includes at least one of Sr, Ba, Ti, Hf, Y or O ([0087]). Examiner Notes A reference to specific paragraphs, columns, pages, or figures in a cited prior art reference is not limited to preferred embodiments or any specific examples. It is well settled that a prior art reference, in its entirety, must be considered for all that it expressly teaches and fairly suggests to one having ordinary skill in the art. Stated differently, a prior art disclosure reading on a limitation of Applicant's claim cannot be ignored on the ground that other embodiments disclosed were instead cited. Therefore, the Examiner's citation to a specific portion of a single prior art reference is not intended to exclusively dictate, but rather, to demonstrate an exemplary disclosure commensurate with the specific limitations being addressed. In re Heck, 699 F.2d 1331, 1332-33,216 USPQ 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006, 1009, 158 USPQ 275, 277 (CCPA 1968)). In re: Upsher-Smith Labs. v. Pamlab, LLC, 412 F.3d 1319, 1323, 75 USPQ2d 1213, 1215 (Fed. Cir. 2005); In re Fritch, 972 F.2d 1260, 1264, 23 USPQ2d 1780, 1782 (Fed. Cir. 1992); Merck& Co. v. BiocraftLabs., Inc., 874 F.2d 804, 807, 10 USPQ2d 1843, 1846 (Fed. Cir. 1989); In re Fracalossi, 681 F.2d 792,794 n.1, 215 USPQ 569, 570 n.1 (CCPA 1982); In re Lamberti, 545 F.2d 747, 750, 192 USPQ 278, 280 (CCPA 1976); In re Bozek, 416 F.2d 1385, 1390, 163 USPQ 545, 549 (CCPA 1969). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAJA AHMAD whose telephone number is (571)270-7991. The examiner can normally be reached on Monday-Friday, 8:00 AM - 5:00 PM (Eastern Time). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, GAUTHIER STEVEN B, can be reached on (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice . Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KHAJA AHMAD/Primary Examiner, Art Unit 2813
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Prosecution Timeline

Nov 20, 2023
Application Filed
Feb 21, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+26.9%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 928 resolved cases by this examiner. Grant probability derived from career allow rate.

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