Prosecution Insights
Last updated: April 19, 2026
Application No. 18/515,334

IMAGE SENSOR AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103§112
Filed
Nov 21, 2023
Examiner
CHANG, JAY C
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
537 granted / 635 resolved
+16.6% vs TC avg
Moderate +14% lift
Without
With
+14.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
43 currently pending
Career history
678
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
38.5%
-1.5% vs TC avg
§102
32.3%
-7.7% vs TC avg
§112
25.8%
-14.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 635 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 11/21/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 10-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 10 recites the terms “about” in line 2 of the claim, which is a relative term which renders the claim indefinite. The terms “about” are not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For example, one of ordinary skill in the art could not make a clear determination of whether or not a specific value reasonably constitutes as being “about 0.8” without clear upper and lower limits defined for the term “about”. Claim 11 recites the terms “about” in line 2 of the claim, which is a relative term which renders the claim indefinite. The terms “about” are not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For example, one of ordinary skill in the art could not make a clear determination of whether or not a specific value reasonably constitutes as being “about 150 µm” without clear upper and lower limits defined for the term “about”. A. Prior-art rejections based at least in part by Lee Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-9, 12-16 and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US 2018/0190690 A1, hereinafter “Lee”). Regarding independent claim 1, Figures 3 and 5 of Lee disclose an image sensor comprising: a substrate structure that comprises a sensor array region APS (“sensor array region”- ¶0051) and a pad region PAD (“pad region”- ¶0051) adjacent to the sensor array region APS, wherein the substrate structure comprises a first substrate structure 100/200’ (collectively 100 “substrate” and 200’ (“anti-reflection layer”- ¶¶0057, 0108) and a second substrate structure 162 (“insulating layers”- ¶0078), and wherein the first substrate structure 100/200’ is on the second substrate structure 162; and a penetrating structure 310’/320’ (collectively 310’ and 320’) comprising a first conductive material layer 320’ (“conductive pad”- ¶0107) and a second conductive material layer 310’ (“wiring layer”- ¶0107) in at least a portion of the first substrate structure 100/200’, wherein the second conductive material layer 310’ is on and electrically connected to the first conductive material layer 320’, and wherein the second conductive material layer 310’ extends into the first substrate structure 100/200’. Regarding claim 2, Figures 3 and 5 of Lee disclose wherein the second conductive material layer 310’ at least partially surrounds a sidewall of the first conductive material layer 320’. Regarding claim 3, Figures 3 and 5 of Lee disclose wherein: the image sensor further comprises a first protective layer 202 (“anti-reflection layer”- ¶¶0082-0083), a surface insulation layer 201 (“anti-reflection layer”- ¶¶0082-0083), and a connection structure 312’ (“plug”- ¶0107), the first protective layer 202 is on the surface insulation layer 201, the connection structure 312’ is on the first protective layer 202, since structure 312’ is indirectly on the underside of layer 202 in a diagonal direction, and the second conductive material layer 310’ is between the first protective layer 202 and the connection structure 312’ in a diagonal direction. Regarding claim 4, Figures 3 and 5 of Lee disclose wherein: the first substrate structure 100/200’ comprises a lower substrate 100 and an upper substrate 200’ on the lower substrate 100, and the penetrating structure 310’/320’ extends into the upper substrate 200’. Regarding claim 5, Figures 3 and 5 of Lee disclose wherein the penetrating structure 310’/320’ extends into the lower substrate 100. Regarding claim 6, Figures 3 and 5 of Lee disclose wherein the penetrating structure 310’/320’ is electrically connected to a metal line pattern 161 (“lines… metal”- ¶0080, specifically the uppermost 161) on an uppermost portion of the second substrate structure 162. Regarding claim 7, Figures 3 and 5 of Lee disclose the image sensor further comprising a wire structure 161 (“lines… metal”- ¶0080, specifically the uppermost 161) on the lower substrate 100, wherein the wire structure 161 electrically connects the first substrate structure 100/200’ and the second substrate structure 162 (¶0097). Regarding claim 8, Figures 3 and 5 of Lee disclose wherein the penetrating structure 310’/320’ extends in a thickness direction (i.e., vertical direction) of the first conductive material layer 320’. Regarding claim 9, Figures 3 and 5 of Lee disclose the image sensor further comprising a plurality of the penetrating structures TG (“transfer gates- ¶0041), wherein the plurality of penetrating structures 41 extend in a thickness direction (i.e., vertical direction) of the first conductive material layer 320’. Regarding claim 12, Figures 3 and 5 of Lee disclose wherein: the first substrate structure 100/200’ comprises a lower substrate 100 and an upper substrate 200’ on the lower substrate 100, and at least a portion of the first conductive material layer 320’ is in the upper substrate 200’. Regarding claim 13, Figures 3 and 5 of Lee disclose wherein the second conductive material layer 310’ comprises at least one of tungsten, copper, aluminum, gold, silver, and alloys thereof (¶0096). Regarding independent claim 14, Figures 3 and 5 of Lee disclose an image sensor comprising: a substrate structure that comprises a sensor array region APS (“sensor array region”- ¶0051) and a pad region PAD (“pad region”- ¶0051) adjacent to the sensor array region APS, wherein the substrate structure comprises a first substrate structure 100/200’ (collectively 100 “substrate” and 200’ (“anti-reflection layer”- ¶¶0057, 0108) and a second substrate structure 162 (“insulating layers”- ¶0078), wherein the first substrate structure 100/200’ is on the second substrate structure 162, wherein the first substrate structure 100/200’ comprises an upper substrate 200’ and a lower substrate 100, and wherein the second substrate structure 162 comprises wire patterns 161 (“lines”- ¶0080); and a penetrating structure 310’/312’/320’ (collectively 310’, 312’ and 320’) that extends into the first substrate structure 100/200’, wherein the penetrating structure 310’/312’/320’ comprises a first conductive material layer 320’ (“conductive pad”- ¶0107) in at least a portion of the first substrate structure 100/200’ in the pad region PAD, wherein the penetrating structure 310’/312’/320’ comprises a second conductive material layer 310’ (“wiring layer”- ¶0107) that is on the first conductive material layer 320’ and extends into the upper substrate 200’ and the lower substrate 100’, and wherein the penetrating structure 310’/312’/320’ comprises a connection structure 312’ (“plug”- ¶0107) that is electrically connected to the wire patterns 161 (¶0097). Regarding claim 15, Figures 3 and 5 of Lee disclose wherein the second conductive material layer 310’ at least partially surrounds a sidewall of the first conductive material layer 320’. Regarding claim 16, Figures 3 and 5 of Lee disclose wherein: the image sensor further comprises a first protective layer 202 (“anti-reflection layer”- ¶¶0082-0083) and a surface insulation layer 201 (“anti-reflection layer”- ¶¶0082-0083), the first protective layer 202 is on the surface insulation layer 201, the connection structure 312’ is on the first protective layer 202, since structure 312’ is indirectly on the underside of layer 202 in a diagonal direction, and the second conductive material layer 310’ is between the first protective layer 202 and the connection structure 312’ in a diagonal direction. Regarding independent claim 18, Figures 3 and 5 of Lee disclose an image sensor comprising: a substrate structure that comprises a first substrate structure 100/200’ (collectively 100 “substrate” and 200’ (“anti-reflection layer”- ¶¶0057, 0108) and a second substrate structure 162 (“insulating layers”- ¶0078) on an underside of the first substrate structure 100/200’; and a penetrating structure 310’/312’/320’ (collectively 310’, 312’ and 320’) comprising a first conductive material layer 320’ (“conductive pad”- ¶0107) and a second conductive material layer 310’ (“wiring layer”- ¶0107) that is on and electrically connected to the first conductive material layer 320’, wherein the first substrate structure 100/200’ comprises a lower substrate 100 and an upper substrate 200’ on the lower substrate 100, and wherein the second conductive material layer 310’ extends into at least one of the lower substrate 100 and the upper substrate 200’ and at least partially surrounds a sidewall of the first conductive material layer 320’. Regarding claim 19, Figures 3 and 5 of Lee disclose wherein: the second substrate structure 162 further comprises wire patterns 161 (“lines”- ¶0080), and the penetrating structure 310’/312’/320’ comprises a connection structure 312’ (“plug”- ¶0107) that is electrically connected to the wire patterns 161 (¶0097). Regarding claim 20, Figures 3 and 5 of Lee disclose wherein: the image sensor further comprises a first protective layer 202 (“anti-reflection layer”- ¶¶0082-0083) and a surface insulation layer 201 (“anti-reflection layer”- ¶¶0082-0083), the first protective layer 202 is on the surface insulation layer 201, the connection structure 312’ is on the first protective layer 202, since structure 312’ is indirectly on the underside of layer 202 in a diagonal direction, and the second conductive material layer 310’ is between the first protective layer 202 and the connection structure 312’ in a diagonal direction. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 10-11 and 17 are rejected under 35 U.S.C. 103 as being unpatentable and obvious over Lee. Regarding claim 10, Figures 3 and 5 of Lee disclose a ratio of a length of a long axis of the pad region PAD and a length of a short axis of the pad region PAD. Lee does not expressly disclose wherein the ratio of the length of the long axis of the pad region and the length of the short axis of the pad region is about 0.8 to about 1.7. However, it would have been obvious to form the length of the long axis of the pad region and the length of the short axis of the pad region such that the ratio of the length of the long axis of the pad region and the length of the short axis of the pad region within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)). Regarding claim 11, Lee does not expressly disclose wherein the length of the long axis of the pad region is about 90 to about 150 µm. However, it would have been obvious to form the length of the long axis of the pad region within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)). Regarding claim 17, Figures 3 and 5 of Lee disclose a ratio of a length of a long axis of the pad region PAD and a length of a short axis of the pad region PAD. Lee does not expressly disclose wherein the ratio of the length of the long axis of the pad region and the length of the short axis of the pad region is 0.8 to 1.7. However, it would have been obvious to form the length of the long axis of the pad region and the length of the short axis of the pad region such that the ratio of the length of the long axis of the pad region and the length of the short axis of the pad region within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)). B. Prior-art rejections based at least in part by Lee 457 Claim Rejections - 35 USC § 102 Claims 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US 2019/0148457 A1, hereinafter “Lee 457”) Regarding independent claim 18, Figure 5A of Lee 457 discloses an image sensor comprising: a substrate structure 101/120/205 (collectively 101, 120 and 205) that comprises a first substrate structure 101/205 (collectively 101 and 205) and a second substrate structure 120 (“insulating layer”- ¶0048) on an underside of the first substrate structure 101/205; and a penetrating structure 150/160/220 (collectively 150, 160 and 220) comprising a first conductive material layer 220 (“contact plugs”- ¶0048) and a second conductive material layer 150 (“contact vias”- ¶0048) that is on and electrically connected to the first conductive material layer 220, wherein the first substrate structure 101/205 comprises a lower substrate 101 (“substrate”- ¶0048) and an upper substrate 205 (“antireflective layer”- ¶0048) on the lower substrate 101, and wherein the second conductive material layer 150 extends into at least one of the lower substrate 101 and the upper substrate 205 and at least partially surrounds a sidewall of the first conductive material layer 220. Regarding claim 19, Figure 5A of Lee 457 discloses wherein: the second substrate structure 120 further comprises wire patterns 140, and the penetrating structure 150/160/220 comprises a connection structure 160 that is electrically connected to the wire patterns 140. Regarding claim 20, Figure 5A of Lee 457 discloses wherein: the image sensor further comprises a first protective layer 155 (“insulating layers- ¶0052) and a surface insulation layer 157 (“insulating layer”- ¶0057), the first protective layer 155 is on the surface insulation layer 157, the connection structure 160 is on the first protective layer 155, and the second conductive material layer 150 is between the first protective layer 155 and the connection structure 160. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Lee et al. (US 2016/0056188 A1), which discloses an image sensor comprising a penetration structure within a substrate structure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAY C CHANG/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Nov 21, 2023
Application Filed
Jan 08, 2026
Non-Final Rejection — §102, §103, §112
Mar 06, 2026
Interview Requested
Mar 18, 2026
Examiner Interview Summary
Mar 18, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+14.5%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 635 resolved cases by this examiner. Grant probability derived from career allow rate.

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