Prosecution Insights
Last updated: October 02, 2026
Application No. 18/515,550

DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME

Final Rejection §102
Filed
Nov 21, 2023
Priority
Mar 29, 2023 — RE 10-2023-0041433
Examiner
SENGDARA, VONGSAVANH
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
4m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
683 granted / 946 resolved
+4.2% vs TC avg
Strong +18% interview lift
Without
With
+18.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
78 currently pending
Career history
1018
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
51.8%
+11.8% vs TC avg
§102
27.3%
-12.7% vs TC avg
§112
17.9%
-22.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 946 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) rejected have been considered but are moot because the new ground of rejection does not rely on AJIKI et al. 20200020878 applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3, 5-13 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by AJIKI et al. 20200020878. PNG media_image1.png 641 1136 media_image1.png Greyscale Regarding claims 1 and 13, fig. 19 of AJIKI discloses a display device comprising: a transistor layer (transistor layer) disposed on a substrate 2100x (par [0246]) and comprising at least one transistor; an insulating layer 2118 disposed on the transistor layer; a first pixel electrode 2119/2120AR disposed on the insulating layer; a first pixel defining layer 2522YA/YB covering a side surface of the first pixel electrode and a side surface (top side side) of the insulating layer and defining a first emission area 2522zR; a first light emitting layer 2123R disposed in the first emission area on the first pixel electrode; a first common electrode 2125 disposed on the first light emitting layer; and a bank disposed (as labeled by examiner above - a slope, mass, or mound of a particular substance) on the insulating layer and surrounding the first pixel electrode, wherein the first pixel electrode and the bank are disposed on a same layer (layer 2119) and comprise a same material (pixel electrode material), wherein the bank comprises: a first bank 2119/2120AG/2120BG disposed on the insulating layer; a second bank 2121G disposed on the first bank; and a third bank 2123G disposed on the second bank, wherein a height of the first light emitting layer 2123R from the substrate corresponds to a height of the third bank 2123G from the substrate, and wherein the third bank 2123G comprises a tip protruding from a side surface (sharp tip surface at the top) of the second bank toward the first light emitting layer. Regarding claim 3, fig. 19 of AJIKI discloses wherein a side surface of the first bank and the side surface of the second bank are recessed inward from a side surface of the third bank. Regarding claim 5, fig. 19 of AJIKI discloses wherein the first common electrode covers the first pixel defining layer and the insulating layer and extends to a side surface of the first bank. Regarding claim 6, AJILI discloses wherein the first pixel electrode 2119/2120 comprises: a first layer 2119 disposed on the insulating layer; and a second layer 2120 disposed on the first layer. Regarding claim 7, fig. 19 of AJIKI discloses wherein the first layer of the first pixel electrode and the first bank are disposed on a same layer and comprise a same material, and the second layer of the first pixel electrode and the second bank are disposed on a same layer and comprise a same material. Regarding claim 8, fig. 19 of AJIKI discloses further comprising: a second pixel electrode (that of 2522zB) disposed on the insulating layer; a second pixel defining layer 2522YB/YA covering a side surface of the insulating layer and a side surface of the second pixel electrode and defining a second emission area; a second light emitting layer 2123B disposed in the second emission area on the second pixel electrode; and a second common electrode 2125 disposed on the second light emitting layer. Regarding claim 9 and 15 (see clam 7 rejection), fig. 19 of AJIKI discloses wherein the second pixel electrode comprises: a first layer, the first layer and the first bank disposed on a same layer and comprising a same material; and a second layer, the second layer and the second bank disposed on a same layer and comprising a same material. Regarding claim 10, fig. 19 of AJIKI discloses wherein the first and second common electrodes are electrically connected through the first bank (it through the in between region which is that of the first bank). Regarding claim 11, fig. 19 of AJIKI discloses further comprising: an electrode pattern (pattern of common electrode) disposed on the third bank, the electrode pattern and the first common electrode comprising a same material. Regarding claim 12, fig. 19 of AJIKI discloses further comprising: a first encapsulation layer 2126 disposed on the first common electrode and the electrode pattern, and covering side surfaces of the first and second banks. Regarding claim 15 (see rejection of claims 7 and 9), AJIKI discloses wherein the first pixel electrode comprises: a first layer, the first layer and the first bank disposed on a same layer and comprising a same material; and a second layer, the second layer and the second bank disposed on a same layer and comprising a same material. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VONGSAVANH SENGDARA whose telephone number is (571)270-5770. The examiner can normally be reached 9AM-6PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VONGSAVANH SENGDARA/ Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Nov 21, 2023
Application Filed
May 15, 2026
Non-Final Rejection mailed — §102
Aug 14, 2026
Response Filed
Sep 01, 2026
Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
72%
Grant Probability
91%
With Interview (+18.4%)
3y 3m (~4m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 946 resolved cases by this examiner. Grant probability derived from career allowance rate.

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