DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/21/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Group I in the reply filed on 3/13/2026 is acknowledged.
Claims 13-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 3/13/2026.
A. Prior-art rejections based at least in part by Baba
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Baba et al. (US 2015/0221694 A1, hereinafter “Baba”).
Regarding independent claim 1, Figure 4 of Baba discloses an image sensor comprising:
a first chip (i.e., the “semiconductor chip” associated with substrate 31 and as shown in Fig. 5- ¶¶0106, 0118, 0155, not including portions of the bonding portion 58/99a/99b);
a second chip (i.e., the “semiconductor chip” associated with substrate 45 and as shown in Fig. 6- ¶¶0106, 0118, 0155, not including portions of the bonding portion 58/99a/99b) stacked on the first chip; and
a bonding portion 58/99a/99b (collectively 58, 99a and 99b) provided between the first chip and the second chip,
wherein the first chip comprises:
a first semiconductor substrate 31 (“semiconductor substrate”- ¶0099) comprising a first surface and a second surface opposing the first surface;
a photoelectric conversion region PD (“photodiode”- ¶0102) in the first semiconductor substrate 31; and
a first circuit interconnection layer 41 (“wiring layer”- ¶0113) provided on the first surface and adjacent to the photoelectric conversion region PD,
wherein the second chip comprises:
a second semiconductor substrate 45 (“semiconductor substrate”- ¶0118) comprising a third surface and a fourth surface facing the first surface and opposing the third surface; and
a second circuit interconnection layer 55 (“wiring layer”- ¶0126) provided on the fourth surface, and
wherein the bonding portion 58/99a/99b comprises:
a bonding layer 58 (“adhesive layer”- ¶0133) provided between the first circuit interconnection layer 41 and the second circuit interconnection layer 55 and configured to connect the first chip and the second chip, since bonding layer 58 would be positioned between layers 99a and 99b to bond the first and second chips together (¶0133); and
a diffusion barrier layer 99b (“diffusion prevention film”- ¶0151) provided between the second circuit interconnection layer 55 and the bonding layer 58 and configured to inhibit diffusion of at least one of hydrogen or deuterium (¶¶0128, 0151), since bonding layer 58 would be positioned between layers 99a and 99b to bond the first and second chips together (¶0133).
Regarding claim 2, Figure 4 of Baba discloses wherein the diffusion barrier layer 99b comprises at least one of an aluminum oxide, a silicon nitride (¶0128), a zirconium oxide, a titanium oxide, or a hafnium oxide.
Regarding claim 3, Figure 4 of Baba discloses the image sensor further comprising:
a first passivation layer 68 (“passivation film”- ¶0141) provided on the first circuit interconnection layer 41; and
a second passivation layer 76 (“passivation film”- ¶0148) provided on the second circuit interconnection layer 55,
wherein the diffusion barrier layer 99b is provided between at least one of (i) the first passivation layer and the bonding layer or (ii) the second passivation layer 76 and the bonding layer 58.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable and obvious over Baba.
Regarding claim 11, Baba does not expressly disclose wherein the diffusion barrier layer has a diffusion coefficient of 1.0 x 10-14 cm2/s or less.
However, the ordinary artisan would have recognized the diffusion coefficient of the diffusion barrier layer to be a result effective variable affecting suppression of the movement of hydrogen atoms/molecules between the stacked semiconductor substrates (Baba ¶0151). Thus, it would have been obvious to modify the recognized the diffusion coefficient of the diffusion barrier layer to be within the claimed range, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art (In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)).
Regarding claim 12, Baba does not expressly disclose wherein the diffusion barrier layer has a thickness of 10 angstroms to 10,000 angstroms.
However, it would have been obvious to form the thickness of the diffusion barrier layer within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)).
B. Prior-art rejections based at least in part by Baba (different interpretation)
Claim Rejections - 35 USC § 102
Claims 1-4 and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Baba (different interpretation).
Regarding independent claim 1, Figure 4 of Baba discloses an image sensor comprising:
a first chip (i.e., the “semiconductor chip” associated with substrate 31 and as shown in Fig. 5- ¶¶0106, 0118, 0155, not including portions of the bonding portion 57/99a/99b);
a second chip (i.e., the “semiconductor chip” associated with substrate 45 and as shown in Fig. 6- ¶¶0106, 0118, 0155, not including portions of the bonding portion 57/99a/99b) stacked on the first chip; and
a bonding portion 57/99a/99b (collectively 57, 99a and 99b) provided between the first chip and the second chip,
wherein the first chip comprises:
a first semiconductor substrate 31 (“semiconductor substrate”- ¶0099) comprising a first surface and a second surface opposing the first surface;
a photoelectric conversion region PD (“photodiode”- ¶0102) in the first semiconductor substrate 31; and
a first circuit interconnection layer 41 (“wiring layer”- ¶0113) provided on the first surface and adjacent to the photoelectric conversion region PD,
wherein the second chip comprises:
a second semiconductor substrate 45 (“semiconductor substrate”- ¶0118) comprising a third surface and a fourth surface facing the first surface and opposing the third surface; and
a second circuit interconnection layer 55 (“wiring layer”- ¶0126) provided on the fourth surface, and
wherein the bonding portion 58/99a/99b comprises:
a bonding layer 57 (“film”- ¶0131, which is used to bond the first and second chips together- ¶0131, specifically the top film 57) provided between the first circuit interconnection layer 41 and the second circuit interconnection layer 55 and configured to connect the first chip and the second chip, since bonding layer 58 would be positioned between layers 99a and 99b to bond the first and second chips together (¶0133); and
a diffusion barrier layer 99a/99b (collectively 99a and 99b- “diffusion prevention film”- ¶0151) provided between the second circuit interconnection layer 55 and the bonding layer 57 and configured to inhibit diffusion of at least one of hydrogen or deuterium (¶¶0115, 0128, 0151).
Regarding claim 2, Figure 4 of Baba discloses wherein the diffusion barrier layer 99a/99b comprises at least one of an aluminum oxide, a silicon nitride (¶0128), a zirconium oxide, a titanium oxide, or a hafnium oxide.
Regarding claim 3, Figure 4 of Baba discloses the image sensor further comprising:
a first passivation layer 68 (“passivation film”- ¶0141) provided on the first circuit interconnection layer 41; and
a second passivation layer 76 (“passivation film”- ¶0148) provided on the second circuit interconnection layer 55,
wherein the diffusion barrier layer 99a/99b is provided between at least one of (i) the first passivation layer and the bonding layer or (ii) the second passivation layer 76 and the bonding layer 57.
Regarding claim 4, Figure 4 of Baba discloses wherein the bonding layer 57 comprises at least one of a silicon carbon nitride, a silicon nitride (¶0131), or a silicon oxide.
Regarding claim 8, Figure 4 of Baba discloses wherein the diffusion barrier layer 99a/99b comprises multiple layers 99a, 99b.
Allowable Subject Matter
Claims 5-7 and 9-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 5 (which claims 6-7 depend from), the prior art of record including Baba, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “the image sensor further comprising: a first planarization layer provided between the first passivation layer and the bonding layer; and a second planarization layer provided between the second passivation layer and the bonding layer”.
Regarding claim 9 (which claim 10 depends from), the prior art of record including Baba, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “, wherein the diffusion barrier layer comprises: a first layer comprising a first material; and a second layer comprises a second material different from the first material”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Onuki et al. (US 2020/0303444 A1), which discloses an image sensor comprising a diffusion barrier layer.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm.
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/JAY C CHANG/Primary Examiner, Art Unit 2817
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